GM25Q64APIG

3.3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI For Industrial & Industrial Plus Grade ChuangFeiXin-Technology GM25Q64A 1 GENERAL DESCRIPTIONS ..............................................................................................................................1 2 FEATURE............................................................................................................................................................1 3 PACKAGE TYPES AND PIN CONFIGURATIONS ............................................................................................2 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 Pin Configuration SOIC 208-mil ..................................................................................................................2 Pad Configuration WSON 6x5-mm/ 8x6-mm ..............................................................................................2 Pin Description SOIC 208-mil, WSON 6x5-mm / 8x6-mm ..........................................................................2 Pin Configuration SOIC 300-mil ..................................................................................................................3 Pin Description SOIC 300-mil ......................................................................................................................3 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ........................................................................4 Ball Description TFBGA 8x6-mm .................................................................................................................4 Ball Configuration WLCSP ..........................................................................................................................5 Ball Description WLCSP24 ..........................................................................................................................5 PIN DESCRIPTIONS ..........................................................................................................................................6 4.1 4.2 4.3 4.4 4.5 Chip Select (/CS) .........................................................................................................................................6 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ...........................................................6 Write Protect (/WP) ......................................................................................................................................6 HOLD (/HOLD) ............................................................................................................................................6 Serial Clock (CLK) .......................................................................................................................................6 5 BLOCK DIAGRAM .............................................................................................................................................7 6 FUNCTIONAL DESCRIPTIONS .........................................................................................................................8 6.1 6.2 6.3 6.4 Standard SPI Instructions ............................................................................................................................8 Dual SPI Instructions ...................................................................................................................................8 Software Reset ............................................................................................................................................8 Write Protection ...........................................................................................................................................9 6.4.1 7 Write Protect Features............................................................................................................................................. 9 STATUS AND CONFIGURATION REGISTERS ............................................................................................. 10 7.1 Status Registers ....................................................................................................................................... 10 7.1.1 Erase/Write In Progress (BUSY) – Status Only ..................................................................................................... 10 7.1.2 Write Enable Latch (WEL) – Status Only............................................................................................................... 10 7.1.3 Block Protect Bits (BP2, BP1, BP0) – Volatile/Non-Volatile Writable ..................................................................... 10 7.1.4 Top/Bottom Block Protect (TB) – Volatile/Non-Volatile Writable ............................................................................ 11 7.1.5 Sector/Block Protect Bit (SEC) – Volatile/Non-Volatile Writable ............................................................................ 11 7.1.6 Complement Protect (CMP) – Volatile/Non-Volatile Writable................................................................................. 11 7.1.7 Status Register Protect (SRP1, SRP0) – Volatile/Non-Volatile Writable................................................................ 11 7.1.8 Erase/Program Suspend Status (SUS) – Status Only ........................................................................................... 12 7.1.9 Security Register Lock Bits (LB3, LB2, LB1) – Non-Volatile OTP Writable............................................................ 12 7.1.10 Quad Enable (QE) – Volatile/Non-Volatile Writable ........................................................................................... 12 7.1.11 Output Driver Strength (DRV1, DRV0) – Volatile/Non-Volatile Writable ............................................................ 13 7.1.12 Reserved Bits – Non Functional ........................................................................................................................ 13 7.1.13 GM25Q64A Status Register Memory Protection (CMP = 0) .............................................................................. 14 7.1.14 GM25Q64A Status Register Memory Protection (CMP = 1) .............................................................................. 15 I GM25Q64A 8 INSTRUCTIONS .............................................................................................................................................. 16 8.1 Device ID and Instruction Set Tables ....................................................................................................... 16 8.1.1 Identification .......................................................................................................................................................... 16 8.1.2 Instruction Set Table 1 (Standard SPI Instructions) (1) .......................................................................................... 17 8.1.3 8.2 9 Instruction Set Table 2 (Dual/Quad SPI Instructions)............................................................................................. 18 Instruction Descriptions ............................................................................................................................ 19 8.2.1 Write Enable (06h)................................................................................................................................................. 19 8.2.2 Write Enable for Volatile Status Register (50h) ..................................................................................................... 19 8.2.3 Write Disable (04h) ................................................................................................................................................ 20 8.2.4 Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h)................................................ 20 8.2.5 Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) ................................................ 21 8.2.6 Read Data (03h) .................................................................................................................................................... 22 8.2.7 Fast Read (0Bh) .................................................................................................................................................... 23 8.2.8 Fast Read Dual Output (3Bh) ................................................................................................................................ 24 8.2.9 Fast Read Quad Output (6Bh)............................................................................................................................... 25 8.2.10 Fast Read Dual I/O (BBh) ................................................................................................................................. 26 8.2.11 Fast Read Quad I/O (EBh) ................................................................................................................................ 28 8.2.12 Word Read Quad I/O (E7h) ............................................................................................................................... 30 8.2.13 Set Burst with Wrap (77h) ................................................................................................................................. 32 8.2.14 Page Program (02h) .......................................................................................................................................... 33 8.2.15 Quad Input Page Program (32h) ....................................................................................................................... 34 8.2.16 Sector Erase (20h) ............................................................................................................................................ 35 8.2.17 32KB Block Erase (52h) .................................................................................................................................... 36 8.2.18 64KB Block Erase (D8h) ................................................................................................................................... 37 8.2.19 Chip Erase (C7h / 60h)...................................................................................................................................... 38 8.2.20 Erase / Program Suspend (75h) ........................................................................................................................ 39 8.2.21 Erase / Program Resume (7Ah) ........................................................................................................................ 40 8.2.22 Power-down (B9h)............................................................................................................................................. 41 8.2.23 Release Power-down (ABh) .............................................................................................................................. 42 8.2.24 Read Manufacturer / Device ID (90h) ................................................................................................................ 43 8.2.25 Read JEDEC ID (9Fh) ....................................................................................................................................... 44 8.2.26 Read SFDP Register (5Ah) ............................................................................................................................... 45 8.2.27 Erase Security Registers (44h) ......................................................................................................................... 49 8.2.28 Program Security Registers (42h) ..................................................................................................................... 50 8.2.29 Read Security Registers (48h) .......................................................................................................................... 51 8.2.30 Enable Reset (66h) and Reset Device (99h) ..................................................................................................... 52 ELECTRICAL CHARACTERISTICS ............................................................................................................... 53 9.1 9.2 9.3 9.4 9.5 9.6 9.7 Absolute Maximum Ratings (1) ................................................................................................................ 53 Operating Ranges .................................................................................................................................... 53 Power-Up Power-Down Timing and Requirements .................................................................................. 54 DC Electrical Characteristics .................................................................................................................... 55 AC Measurement Conditions ................................................................................................................... 56 AC Electrical Characteristics .................................................................................................................... 57 Serial Output Timing ................................................................................................................................. 59 II GM25Q64A 9.8 9.9 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 Serial Input Timing .................................................................................................................................... 59 /WP Timing ............................................................................................................................................... 59 PACKAGE SPECIFICATIONS..................................................................................................................... 60 8-Pin SOIC 208-mil (Package Code S) .................................................................................................... 60 16-Pin SOIC 300-mil (Package Code F) .................................................................................................. 61 8-Pad WSON 6x5-mm (Package Code P) ............................................................................................... 62 8-Pad WSON 8x6-mm (Package Code E) ............................................................................................... 63 24-Ball TFBGA 8x6-mm (Package Code B, 5x5-1 ball array) .................................................................. 64 24-Ball TFBGA 8x6-mm (Package Code C, 6x4 ball array) ..................................................................... 65 24-Ball WLCSP (Package Code Y) .......................................................................................................... 66 11 ORDERING INFORMATION ........................................................................................................................ 67 12 REVISION HISTORY ................................................................................................................................... 68 III GM25Q64A 1 GENERAL DESCRIPTIONS The GM25Q64A (64M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 3µA for powerdown. All devices are offered in space-saving packages. The GM25Q64A array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The GM25Q64A has 2,048 erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.) The GM25Q64A supports the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 and I/O3. Single SPI clock frequencies of GM25Q64A of up to 104MHz are supported, and equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 320MHz (80MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O are supported. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. Additionally, the device supports JEDEC standard manufacturer and device ID and SFDP, and a 64-bit Unique Serial Number and three 256-bytes Security Registers. 2 • – – – – – • – – – – • – – • – – – FEATURE New Family of SPI Flash Memories GM25Q64A: 64M-bit / 8M-byte Standard SPI: CLK, /CS, DI, DO, /WP, /Hold Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 Software Reset Highest Performance Serial Flash 104MHz Single SPI clocks 160/320MHz equivalent Dual/Quad SPI More than 100,000 erase/program cycles More than 20-year data retention Efficient “Continuous Read” Continuous Read with 8/16/32/64-Byte Wrap As few as 8 clocks to address memory Low Power, Wide Temperature Range Single 2.7 to 3.6V supply 4mA active current,