Application Note: SY6410
Cost-save Single Cell Li+ Battery Gauge IC
General Description
Features
The SY6410 is a cost-save gauge IC for single cell
lithium-ion (Li+) battery in handheld and portable
equipments. The SY6410 senses battery terminal
voltage and adopts the proprietary algorithm to
calculate the corresponding state of charge (SOC).
±7.5mV/Cell Voltage Measurement
Provide Accurate State of Charge
Temperature/Load Variation Compensation
No Accumulated Errors
Eliminate Current Sense Resistor
I2C Interface
Low SOC Alert Indicator
Compact DFN2×2-8 Package
Comparing with conventional voltage-based gauge
which translates terminal voltage to SOC directly, the
sophisticated algorithm in the SY6410 shows great
advantage in SOC accuracy. The SY6410 can be
classified as advanced voltage-based gauge which does
not need current sensors and the SOC accuracy will not
diverge with time. SOC and voltage information is
accessed by the I2C interface. The SY6410 is available
in DFN2×2-8.
Applications
rep
are
SY6410 □(□□)□
on
fi
Typical Application
Note
de
nti
a
Package type
DFN2×2-8
lP
Temperature Code
Package Code
Optional Spec Code
Ordering Number
SY6410DFC
Smart Phones/PDAs
Portable Game Players
Digital Still and Video Cameras
Wireless Handsets
dF
Ordering Information
or
W
OO
KO
O
yC
R5
VDD
ALRT
CELL
SDA
470Ω
erg
Cell+
Sil
C1
1µF
Cell-
R3
.C
100Ω
orp
R4
VCC
R1
R2
System
μP
SY6410
C2
CTG
SCL
GND
NC
1µF
Note: CELL pin’s resistance R5 might not be more than 470 Ω, otherwise it will impact voltage sampling.
Fig.1 Typical Application Circuit
AN_SY6410 Rev.0.9
© 2022 Silergy Corp.
Silergy Corp. Confidential-prepared for Customer Use Only
1
All Rights Reserved.
AN_SY6410
Pinout (top view)
1
8
CELL
2
7
EP
GND
4
6
NC
or
W
3
SCL
5
Top View
rep
are
(Pad Side Down)
ALRT
dF
VDD
SDA
OO
KO
O
CTG
Pin Number
CTG
1
CELL
2
VDD
3
GND
4
Connect to GND.
on
fi
Battery voltage monitors I/O. Bypass with a 1μF capacitor to the GND.
Connect to battery's positive terminal through R5.
Power supply input. Bypass with a 1μF capacitor to GND. Connect to
battery's positive terminal through R4.
Ground. Connect to battery's negative terminal.
.C
——————
Description
de
nti
a
Pin Name
lP
Part Number
Package type
Top Mark①
SY6410DFC
DFN2×2-8
Btxyz
Note① : x=year code, y=week code, z= lot number code.
Open-drain output. Low SOC alarm signal. When SOC is below the
threshold, this pin will be pulled down.
5
NC
6
No connection. NC is recommended to connect to GND.
SCL
7
I2C clock input. SCL has an internal pull-down resistance.
8
I2C data input/output. SDA has an internal pull-down resistance.
yC
orp
ALRT
--
Exposed pad. Connected to GND.
Sil
EP
erg
SDA
AN_SY6410 Rev.0.9
© 2022 Silergy Corp.
Silergy Corp. Confidential-prepared for Customer Use Only
2
All Rights Reserved.
AN_SY6410
Absolute Maximum Ratings (Note 1)
CELL, VDD, ALRT , SCL, SDA to GND---------------------------------------------------------------------- -0.3V to 6.0V
Junction Temperature (TJ) -------------------------------------------------------------------------------------------------- 150°C
Storage Temperature ---------------------------------------------------------------------------------------------- -65°C to 150°C
Recommended Operating Conditions
OO
KO
O
VDD ------------------------------------------------------------------------------------------------------------------- 2.7V to 4.5V
CELL ------------------------------------------------------------------------------------------------------------------- 2.7V to 4.5V
SCL, SDA, ALRT --------------------------------------------------------------------------------------------------- -0.1V to 3.3V
CTG, NC ----------------------------------------------------------------------------------------------------------- Connect to GND
Operating Temperature Range ----------------------------------------------------------------------------------- -20°C to 60°C
Electrical Characteristics
Power Supply
VDD
Input Sleep Mode Current
IIN(SLEEP)
Time Base Accuracy
tERR
IIN
Sil
Data Hold Time
Data Output Fall Time
-2
-4
Unit
4.5
2.5
V
40
μA
2
2
4
μA
250
-7.5
-30
2.5
fSCL
%
ms
7.5
30
4.5
1.4
IOL=4mA(Note3)
V
mV
V
0.5
0.4
V
V
V
400
kHz
tBUF
1.3
μs
tHD, STA
600
ns
tSU, STA
600
ns
tSU, STO
600
ns
tSU, DAT
100
ns
yC
Data Set Up Time
erg
Set Up Time for STOP
0.5
Max
orp
SCL Clock Frequency
Bus Free Time Between
Stop/Start
Start Condition(Repeated) Hold
Time
Repeat START Set Up Time
0.3
32
on
fi
SDA, ALRT Output Logic Low
I2C Interface(Note3)
VIH
VIL
VOL
.C
SDA, SCL Input Logic High
SDA, SCL Input Logic Low
de
nti
a
VERR
Voltage Measurement Range
Sleep mode
VDD =3.6V, TA=25°C
-20°C
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