NIRS21N1-DSPR

NIRS20/NIRS21/NIRS22 High Reliability Dual-Channel Digital Isolators Datasheet (EN) 1.1 Safety Regulatory Approvals Product Overview The NIRS2x devices are high reliability dual-channel digital isolator. The NIRS2x device is safety certified by UL1577 support 3kVrms insulation withstand voltages, while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NIRS2x is up to 500kbps, and the common-mode transient immunity (CMTI) is up to 100kV/us. The NIRS2x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NIRS2x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use.  UL recognition: up to 3000Vrms for 1 minute per UL1577  CQC certification per GB4943.1-2011  CSA component notice 5A  DIN VDE V 0884-11:2017-01 Applications  Industrial automation system  Isolated SPI, RS232, RS485  General-purpose multichannel isolation  Motor control Key Features Device Information  Up to 3000Vrms Insulation voltage Part Number NIRS2x  Date rate: DC to 500kbps  Power supply voltage: 2.5V to 5.5V Package SOP8(300mil) Body Size 5.85mm × 7.50mm Functional Block Diagrams  High CMTI: 100kV/us  Chip level ESD: HBM: ±6kV  High system level EMC performance: Enhanced system level ESD, EFT, Surge immunity  Default output high level or low level option  Isolation barrier life: >60 years Figure 1.1 NIRS20 Block Diagram Figure 1.2 NIRS21 Block Diagram  Low power consumption: 1mA/ch (500kbps)  Propagation delay: 400 V DIN EN 60112 (VDE 0303-11); IEC 60112 Material Group Ⅱ Page 7 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 3.2. DIN VDE V 0884-11（VDE V 0884-11）:2017-01 INSULATION CHARATERISTICS Description Test Condition Symbol Value Unit SOP8 Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150Vrms Ⅰto Ⅳ For Rated Mains Voltage ≤ 400Vrms Ⅰto Ⅲ For Rated Mains Voltage ≤ 300Vrms Ⅰto Ⅲ Climatic Classification 10/105/21 Pollution Degree per DIN VDE 0110, 2 Table 1 Maximum repetitive isolation voltage Input to Output Test Voltage, Method B1 V IORM × 1.5 = V pd (m) , 100% production test, VIORM 565 Vpeak V pd (m) 847 Vpeak t ini = t m = 1 sec, partial discharge < 5 pC Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC V pd (m) 678 Vpeak After Input and /or Safety Subgroup 2 and Subgroup 3 V IORM × 1.2= V pd (m) , t ini = 60 sec, t m = 10 sec, partial discharge < 5 pC V pd (m) 678 Vpeak t = 60 sec VIOTM 5300 Vpeak Test method per IEC60065,1.2/50us waveform, VTEST=VIOSM×1.3 VIOSM 6153 Vpeak VIO =500V RIO >109 Ω f = 1MHz CIO 0.6 pF Input capacitance CI 2 pF Total Power Dissipation at 25℃ Ps 1100 mW 200 mA Test Maximum transient isolation voltage Maximum Surge Isolation Voltage Isolation resistance Isolation capacitance Safety input, output, or supply current θJA = 137.7°C/W, V I = 5.5 V, T J = 150 °C, T A = 25 °C Is Page 8 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 Case Temperature Ts 150 ℃ Figure 3.1 NIRS20N/NIRS21N/NIRS22N Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN VDE V 0884-11 3.3. REGULATORY INFORMATION The NIRS2xNare approved by the organizations listed in table. CUL UL 1577 Component Recognition Program1 VDE Approved under CSA Component Acceptance Notice 5A DIN VDE V 088411:2017-012 CQC Certified by CQC11471543-2012 GB4943.1-2011 Single Protection, 3000Vrms Isolation voltage Single Protection, 3000Vrms Isolation voltage Basic Insulation 565Vpeak, VIOSM=6153Vpeak File (E500602) File (5024579-48800001) File (E500602) 1 Basic insulation at 400Vrms (565Vpeak) File (pending) In accordance with UL 1577, each NIRS21N/NIRS22N is proof tested by applying an insulation test voltage ≥ 3600 V rms for 1 sec. 2 In accordance with DIN VDE V 0884-11, each NIRS21N/NIRS22N is proof tested by applying an insulation test voltage ≥ 847 V peak for 1 sec (partial discharge detection limit = 5 pC). The * marking branded on the component designates DIN VDE V 0884-11 approval. 4.0 FUNCTION DESCRIPTION The NIRS2x is a Dual-channel digital isolator based on a capacitive isolation barrier technique. The digital signal is modulated with RF carrier generated by the internal oscillator at the Transmitter side. Then it is transferred through the capacitive isolation barrier and demodulated at the Receiver side. The NIRS2x devices are high reliability dual-channel digital isolator. The NIRS2x device is safety certified by UL1577 support 3kVrms insulation withstand voltage, while providing high electromagnetic immunity and low emissions at low power consumption. The data rate of the NIRS2x is up to 500kbps, and the common-mode transient immunity (CMTI) is up to 100kV/us. The NIRS2x device provides digital channel direction configuration and the default output level configuration when the input power is lost. Wide supply voltage of the NIRS2x device support to connect with most digital interface directly, easy to do the level shift. High system level EMC performance enhance reliability and stability of use. Page 9 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 The NIRS2x has a default output status when VDDIN is unready and VDDOUT is ready as shown in Table 4.1, which helps for diagnosis when power is missing at the transmitter side. The output B follows the same status with the input A within 60us after powering up. Table 4.1 Output status vs. power status Input VDD1 status VDD2 status Output Comment H Ready Ready H Normal operation. L Ready Ready L X Unready Ready H(NIRS2xN1) The output follows the same status with the input within 60us after input side VDD1 is powered on. X Ready Unready X The output follows the same status with the input within 60us after output side VDD2 is powered on. 5.0 APPLICATION NOTE 5.1. PCB LAYOUT The NIRS2x requires a 0.1 µF bypass capacitor between VDD1 and GND1, VDD2 and GND2. The capacitor should be placed as close as possible to the package. Figure 5.1 to Figure 5.4 show the recommended PCB layout, make sure the space under the chip should keep free from planes, traces, pads and via. To enhance the robustness of a design, the user may also include resistors (50–300 Ω) in series with the inputs and outputs if the system is excessively noisy. The series resistors also improve the system reliability such as latch-up immunity. The typical output impedance of an isolator driver channel is approximately 50 Ω, ±40%. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. Figure5.1 Recommended PCB Layout — Top Layer Figure5.2 Recommended PCB Layout — Bottom Layer Page 10 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 6.0 PACKAGE INFORMATION Figure 6.1 NIRS20N Package Figure 6.2 NIRS21N Package Figure 6.3 NIRS22 Package Table1.1 NIRS20N/ NIRS21N/ NIRS22N Pin Configuration and Description Figure 6.3 SOIC8 Package Shape and Dimension in millimeters (inches) Page 11 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 Table6.1 NIRS2XN Pin Configuration and Description 7.0 NIRS20N PIN NO. NIRS21N PIN NO. NIRS22N PIN NO. SYMBOL FUNCTION 1 1 1 VDD1 Power Supply for Isolator Side 1 7 2 7 OUTA Logic Output A 3 3 6 INB Logic Input B 4 4 4 GND1 Ground 1, the ground reference for Isolator Side 1 5 5 5 GND2 Ground 2, the ground reference for Isolator Side 2 6 6 3 OUTB Logic Output B 2 7 2 INA Logic Input A 8 8 8 VDD2 Power Supply for Isolator Side 2 TAPE AND REEL INFORMATION Page 12 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 Figure 7.1 Tape and Reel Information of SOIC8 Page 13 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com NIRS20/NIRS21/NIRS22 8.0 ORDER INFORMATION Part Number Rule: Part Number Isolation Rating (kV) 3 Number of side 1 inputs 2 Number of side 2 inputs 0 Max Data Rate (Mbps) 0.5 Default Output State High Temperature MSL Package Type Package Drawing NIRS20N13 SOP8 SOP8 -40 to 125℃ DSPR (150mil) NIRS21N13 1 1 0.5 High 3 SOP8 SOP8 -40 to 125℃ DSPR (150mil) NIRS22N13 1 1 0.5 High 3 SOP8 SOP8 -40 to 125℃ DSPR (150mil) NOTE: All packages are RoHS-compliant with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures. 9.0 SPQ 1000 1000 1000 REVISION HISTORY Revision 1.0 1.1 Description Original Added NIRS20 part number Date 2019/5/15 2020/10/28 Page 14 Copyright © 2019, NOVOSENSE Downloaded From Oneyac.com 单击下面可查看定价，库存，交付和生命周期等信息 >>Novosense(纳芯微) Downloaded From Oneyac.com