AW3644
September 2018 V1.6
High Efficiency, Dual Independent 1.5A Flash LED Driver
GENERAL DESCRIPTION
Support Dual Color Temperature Flash LED
Application
The AW3644 is a dual LED flash driver that
provides a high level of adjustability within a small
solution size. The AW3644 utilizes a 2MHz or 4MHz
fixed-frequency synchronous boost converter to
provide power to the dual 1.5A constant current
LED sources. The dual 128 levels current sources
provide the flexibility to adjust the current of LED1
and LED2 in Flash/Torch/IR modes. The AW3644
provides three IVFM protection modes to prevent
system reset or shutdown under low battery
condition.
l
FEATURES
n
85%
e
High Efficiency:
ti
a
Dual Independent and Programmable 1.5A LED
Current Source
Flash：11.35mA~1.5A，128 levels
11.72mA/level
Torch：2.55mA~372mA，128 levels
2.91mA/level
Flash Timeout：40ms~1.6s，16 levels
Flash/Torch/IR Mode
Optimized Flash LED Current During Low Battery
Conditions (IVFM)
fi
d
The AW3644 are controlled via an I2C - compatible
interface. The main features of the AW3644
include: flash/torch current, flash timeout duration,
IVFM, TX interrupt, and NTC thermistor monitor.
The AW3644 also provides hardware flash and
hardware torch pins (STROBE and TORCH/TEMP)
to control Flash/Torch events.
Hardware Strobe Enable (STROBE)
Hardware Torch Enable (TORCH/TEMP)
Synchronization Input for RF Power Amplifier
Pulse Events (TX)
The 2MHz or 4MHz switching frequency options,
overvoltage protection (OVP), and adjustable
current limit allow for the use of tiny, low-profile
inductors and 10-µF ceramic capacitors. The
device operates over a –40°C to +85°C ambient
temperature range.
o
400kHz I2C：AW3644（I2C Address=0x63）
n
Remote NTC Monitoring
C
0.4mm Pitch，CSP-12 Package
Compatible with AW3643, AW36413, AW36414
APPLICATION
The AW3644 is available in small 0.4mm pitch
1.626mm×1.332mm CSP-12 package.
ic
Smartphone Camera Flash
L 1μH 3A
VIN
CIN
10μF
10V
w
in
TYPICAL APPLICATION CIRCUIT
IN
SW
OUT
COUT
10μF
10V
AW3644CSR
a
TORCH/TEMP
LED1
STROBE
HWEN
TX
SDA
SCL
MCU
Flash
LED
LED2
GND
Fig 1
D1
Flash
LED
D2
Typical Application Circuit of AW3644
All trademarks are the property of their respective owners.
www.awinic.com.cn
1
Copyright © 2016 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
PIN CONFIGURATION AND TOP MARK
AW3644CSR Pin Configuration
(Top View)
SW
STROBE
SCL
C
OUT
HWEN
TORCH
/TEMP
D
LED2
TX
LED1
1
2
3
Pin Configuration and Top Mark
C
PIN DEFINITION
No.
NAME
TYPE
A1
GND
Ground
A2
IN
A3
SDA
I/O
Serial data input/output of the I2C interface.
B1
SW
Power
Switch pin of the step-up DC-DC convertor.
DESCRIPTION
Ground
Input voltage connection. Connect IN to GND with a 10µF or larger ceramic
capacitor.
ic
in
Power
STROBE
I/O
Active high hardware flash enable. Drive STROBE high to turn on Flash pulse.
Internal pull down resistor of 300kΩ between STROBE and GND.
SCL
I/O
Serial clock input of the I2C interface.
C1
OUT
Power
Step-up DC-DC converter output. Connect a 10µF ceramic capacitor between
OUT and GND.
C2
HWEN
I/O
Active high enable pin. High = Standby, Low = Shutdown/Reset. Internal pull
down resistor of 300kΩ between HWEN and GND.
C3
TORCH/TEMP
I/O
Torch terminal input or threshold detector for NTC temperature sensing and
current scale back.
D1
LED2
Power
D2
TX
I/O
D3
LED1
Power
B2
w
B3
a
3644–AW3644CSR
XXXX–Manufacture Tracking Code
o
Fig 2
n
B
e
SDA
fi
d
IN
n
GND
3644
XXXX
A
ti
a
l
AW3644CSR Top Mark
(Top View)
www.awinic.com.cn
High-side current source output for flash LED2.
Power amplifier synchronization input. Internal pull down resistor of 300kΩ
between TX and GND.
High-side current source output for flash LED1.
2
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
ORDERING INFORMATION
Part
Number
Package
Marking
-40°C～85°C
1.626mm×1.332mm
CSP-12
3644
XXXX
Moisture
Sensitivity
Level
MSL1
Environmental
Information
ROHS+HF
Delivery Form
3000 units/
Tape and
Reel
ti
a
l
AW3644
CSR
Temperature
AW3644
Shipping
R: Tape & Reel
n
Package Type
e
CS: CSP
Description
Package
AW3644
2
Boost
High Efficiency, Dual Independent 1.5A Flash LED
Driver
CSP-12
AW36414
2
Boost
High Efficiency, Dual Independent 1.5A Flash LED
Driver
CSP-12
AW3643
2
Boost
High Efficiency, Dual 1.5A Flash LED Driver
CSP-12
AW36413
2
Boost
High Efficiency, Dual 1.5A Flash LED Driver
CSP-12
AW3648
1
Boost
High Efficiency, 1.5A Flash LED Driver
CSP-12
AW3642
1
Boost
High Efficiency, 1.5A Flash LED Driver
CSP-9
1
Charge
Pump
Flash Current & Flash Timer Programmable 1A Flash
LED Driver
ic
in
AW3641E
n
Type
o
Channels
C
Product
fi
d
AWINIC FLASH LED DRIVER SERIES
DFN-10L
1
Current
Sink
200mA 1-wire Configurable Front Flash LED Driver
with Ultra Small Package
DFN-6L
AW36404
1
Current
Sink
400mA 1-wire Configurable Front Flash LED Driver
with Ultra Small Package
DFN-8L
1
Current
Sink
600mA PWM Configurable Front Flash LED Driver
with Ultra Small Package
DFN-8L
w
AW36402
a
AW36406
www.awinic.com.cn
3
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
TYPICAL APPLICATION CIRCUITS
L 1μH 3A
VIN
CIN
10μF
10V
IN
SW
AW3644CSR
TORCH/TEMP
LED1
STROBE
HWEN
TX
SDA
SCL
Flash
LED
D2
fi
d
Fig 3
D1
n
LED2
GND
e
MCU
Flash
LED
ti
a
COUT
10μF
10V
l
OUT
AW3644 Application Circuit
n
Notice for Typical Application Circuits:
Please place CIN，COUT as close to the chip as possible.
2:
Connect the inductor on the top layer close to the SW pin.
o
1:
a
w
in
ic
C
3: For the sake of driving capability, the power lines, output lines, and the connection lines of L and LED
should be short and wide as possible.
www.awinic.com.cn
4
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
ABSOLUTE MAXIMUM RATINGS(NOTE1)
Unit
-0.3 to 6
V
HWEN, SCL, SDA, STROBE, TORCH/TEMP, TX
−0.3 to (VIN+0.3)
V
Continuous power dissipation
Internally limited
IN, SW, OUT, LED1, LED2
Max Junction Temperature TJMAX
155
Storage Temperature TSTG
-65 to 150
260
Junction to Ambient Thermal Resistance θJA
79.2
n
Maximum lead temperature (soldering)
±2000
HBM
e
ESD, All Pins(NOTE2)
±1500
CDM
+IT：+200
fi
d
Latch-Up (Test method: JEDEC STANDARD NO.78D)
-IT：-200
℃
l
Range
ti
a
PARAMETERS
℃
℃
℃/W
V
V
mA
Junction temperature (TJ)
Range
Unit
2.7 to 5.5
V
-40 to 125
℃
-40 to 85
℃
ic
Ambient temperature (TA)
C
VIN
o
PARAMETERS
n
RECOMMENDED OPERATING CONDITIONS
in
NOTE1: Conditions out of those ranges listed in "absolute maximum ratings" may cause permanent
damages to the device. In spite of the limits above, functional operation conditions of the device should
within the ranges listed in "recommended operating conditions". Exposure to absolute-maximum-rated
conditions for prolonged periods may affect device reliability.
a
w
NOTE2: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Test method: MIL-STD-883J Method 3015.9
www.awinic.com.cn
5
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
ELECTRICAL CHARACTERISTICS
Typical limits tested at TA=25 ℃ . Minimum and maximum limits apply over the full operating ambient
temperature range(-40℃≤TA≤85℃). Unless otherwise specified, VIN=3.6V, HWEN= VIN.
Symbol
Description
Test Condition
Min
Typ
Max
Unit
5.5
V
IQ
Quiescent supply current
Device not switching, pass mode
ISB
Standby supply current
Device disabled, HWEN=1.8V
2.5V≤VIN≤5.5V
ISD
Shutdown supply current
Device disabled, HWEN=0V
2.5V≤VIN≤5.5V
UVLO
Under voltage lockout
threshold
Falling VIN
VOUT=4V,
flash code=0x7F=1.5A
Boost Converter Specifications
PMOS switch on-resistance
RNMOS
NMOS switch on-resistance
ICL
Switch current limit
in
w
a
VIVFM
ic
RPMOS
FSW
mA
10
0.1
1
2.5
V
2.6
V
1.5
7%
A
VOUT=4V,
torch code=0x3F=186mA
-10%
186
10%
mA
ON threshold
4.85
5
5.15
OFF threshold
4.75
4.9
5.05
n
o
V
85
mΩ
60
mΩ
Reg 0x07, bit[0]=0
-12%
1.9
12%
Reg 0x07, bit[0]=1
-12%
2.8
12%
Reg 0x07, bit[1]=0
-6%
2
6%
Reg 0x07, bit[1]=1
-6%
4
6%
Reg 0x02, bits[3:1]=”000”
-3%
2.9
3%
V
-6%
50
6%
-6%
0.6
6%
V
A
Switching frequency
Input voltage flash monitor
trip threshold
INTC
NTC current
VTRIP
NTC comparator trip
threshold
C
VOUT over-voltage protect
threshold
0.8
-7%
Current source accuracy
VOVP
3
fi
d
Rising VIN
Current Source Specifications
ILED1/2
0.4
ti
a
2.7
n
Input operating range
e
VIN
l
Vin Supply
MHz
Reg 0x09, bit[3:1]=”100”
Thermal shutdown
threshold
155
℃
TSD
Thermal shutdown
hysteresis
www.awinic.com.cn
20
6
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Symbol
Description
Test Condition
Min
Typ
Max
Unit
I2C-Compatible Interface Specifications(SCL,SDA)
VIL
Input logic low
0
0.4
V
VIH
Input logic high
1.2
VIN
V
VOL
Output logic low
0.4
V
HWEN, STROBE, TORCH/TEMP, TX Voltage Specifications
VIL
Input logic low
0
VIH
Input logic high
1.2
RPD
Internal pull down resistors
0.4
V
VIN
V
kΩ
a
w
in
ic
C
o
n
fi
d
e
n
300
ti
a
l
ILOAD=3mA
www.awinic.com.cn
7
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
I2C INTERFACE TIMING
Typ
Interface Clock frequency
H
Units
400
kHz
SCL
200
ns
SDA
250
ns
Deglitch time
THD:STA
(Repeat-start) Start condition hold time
0.6
TLOW
Low level width of SCL
1.3
THIGH
High level width of SCL
0.6
TSU:STA
(Repeat-start) Start condition setup time
0.6
THD:DAT
Data hold time
TSU:DAT
Data setup time
TR
Rising time of SDA and SCL
TF
Falling time of SDA and SCL
TSU:STO
Stop condition setup time
TBUF
Time between start and stop condition
s
s
s
s
s
e
0
ti
a
TDEGLITC
Max
n
FSCL
Min
Description
s
0.3
s
0.3
s
0.6
s
1.3
s
o
n
fi
d
0.1
tBUF
tLOW
SCL
tHD:STA
ic
Start
tHIGH
tR
tHD:DAT
VIH
VIL
tSP
tF
VIH
VIL
tSU:DAT
tSU:STA
Start
tSU:STO
Stop
I2C INTERFACE TIMING
Fig 4
a
w
in
Stop
C
SDA
l
Symbol
www.awinic.com.cn
8
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
TYPICAL CHARACTERISTICS
1.4
1.4
1.2
1.2
1
1
0.6
0.8
0.6
0.4
0.4
0.2
0.2
0
0
16
32
48
64
80
96
112
128
0
16
32
LED1 Flash Code (dec#)
96
112
128
fi
d
0.4
0.4
0.36
0.32
n
0.32
0.28
0.2
0.16
0.08
0.04
0
0
16
32
48
64
C
0.12
80
96
112
ILED2 (A)
0.28
0.24
o
ILED1 (A)
80
Fig 6. LED2 Flash Current vs Brightness Code
0.36
0.24
0.2
0.16
0.12
0.08
0.04
0
128
0
16
LED1 Torch Code (dec#)
32
48
64
80
96
112
128
ic
LED2 Torch Code (dec#)
in
Fig 7. LED1 Torch Current vs Brightness Code
0.8
Fig 8. LED2 Torch Current vs Brightness Code
1.6
BRC = 63
BRC = 47
0.6
w
ILED1 (A)
BRC = 23
BRC = 15
BRC = 7
0.3
BRC = 111
BRC = 103
1.3
BRC = 31
0.4
BRC = 119
1.4
BRC = 39
0.5
BRC = 127
1.5
BRC = 55
0.7
ILED1 (A)
64
LED2 Flash Code (dec#)
Fig 5. LED1 Flash Current vs Brightness Code
a
48
e
0
n
0.8
l
1.6
ti
a
1.6
ILED2 (A)
ILED1 (A)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
BRC = 0
BRC = 95
BRC = 87
1.2
BRC = 79
1.1
BRC = 71
1.0
0.2
0.9
0.1
0.8
0.0
0.7
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
4
4.5
5
VIN (V)
VIN (V)
Fig 9. LED1 Flash Current vs Input Voltage
Fig 10. LED1 Flash Current vs Input Voltage
www.awinic.com.cn
9
5.5
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
1.6
BRC = 63
BRC = 47
BRC = 31
BRC = 23
BRC = 15
0.4
BRC = 7
0.3
BRC = 111
BRC = 0
BRC = 103
1.3
BRC = 95
1.2
BRC = 87
1.1
BRC = 71
l
BRC = 39
0.5
BRC = 119
1.4
ILED2 (A)
BRC = 79
1.0
0.2
0.9
0.1
0.8
0.0
0.7
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
VIN (V)
5.5
e
fi
d
1.10
1.58
1.08
1.06
1.56
1.04
1.54
ILED (A)
1.52
1.50
1.02
1.00
n
ILED (A)
5
Fig 12. LED2 Flash Current vs Input Voltage
1.60
1.48
0.98
0.96
o
1.46
1.44
1.40
2.5
3
3.5
ILED=1.5A
4
C
1.42
4.5
VIN (V)
fSW=2Mhz
5
0.94
0.92
0.90
2.5
5.5
Flash
ic
0.87
0.85
LED2
0.81
ILED (A)
0.79
w
0.77
0.75
0.73
0.71
0.69
0.67
2.5
3
3.5
ILED=0.747A
4
VIN (V)
fSW=2Mhz
4.5
5
5.5
Flash
Fig 15. LED1 & LED2 Current vs Input Voltage
www.awinic.com.cn
10
3.5
4
4.5
5
5.5
Flash
Fig14. LED1/2 Flash Current vs Input Voltage
LED1
in
0.83
3
VIN (V)
ILED=1.006A fSW=2Mhz
Fig 13. LED1/2 Flash Current vs Input Voltage
ILED (A)
4.5
VIN (V)
Fig 11. LED2 Flash Current vs Input Voltage
a
4
n
ILED2 (A)
0.6
BRC = 127
1.5
BRC = 55
0.7
ti
a
0.8
1.12
1.08
1.04
1.00
0.96
0.92
0.88
0.84
0.80
0.76
0.72
0.68
0.64
0.60
LED1
LED2
2.5
3
3.5
ILED=1.006A
4
VIN (V)
fSW=2Mhz
4.5
5
5.5
Flash
Fig 16. LED1 & LED2 Current vs Input Voltage
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
3
3.5
ILED=0.372A
4
4.5
VIN (V)
fSW=2Mhz
5
5.5
Torch
4
4.5
VIN (V)
fSW=4Mhz
5
5.5
Torch
e
Fig 18. LED1/2 Torch Current vs Input Voltage
0.25
0.24
0.24
0.23
0.23
0.22
0.22
ILED (A)
0.21
0.20
0.21
0.20
n
ILED (A)
3.5
fi
d
0.25
0.19
0.19
0.18
o
0.18
0.17
0.15
2.5
3
3.5
ILED=0.186A
4
C
0.16
4.5
VIN (V)
fSW=2Mhz
5
0.17
0.16
0.15
5.5
2.5
Torch
ic
3.5
4
4.5
VIN (V)
fSW=4Mhz
5
5.5
Torch
Fig 20. LED1/2 Torch Current vs Input Voltage
0.25
LED1
LED1
0.24
LED2
in
0.45
0.44
0.43
0.42
0.41
0.40
0.39
0.38
0.37
0.36
0.35
0.34
0.33
0.32
0.31
0.30
3
ILED=0.186A
Fig 19. LED1/2 Torch Current vs Input Voltage
LED2
0.23
ILED (A)
0.22
w
ILED (A)
3
ILED=0.372A
Fig 17. LED1/2 Torch Current vs Input Voltage
a
l
2.5
ti
a
2.5
0.45
0.44
0.43
0.42
0.41
0.40
0.39
0.38
0.37
0.36
0.35
0.34
0.33
0.32
0.31
0.30
n
0.45
0.44
0.43
0.42
0.41
0.40
0.39
0.38
0.37
0.36
0.35
0.34
0.33
0.32
0.31
0.30
ILED (A)
ILED (A)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
0.21
0.20
0.19
0.18
0.17
0.16
0.15
2.5
3
3.5
ILED=0.372A
4
VIN (V)
fSW=2Mhz
4.5
5
Torch
Fig 21. LED1 & LED2 Current vs Input Voltage
www.awinic.com.cn
11
5.5
2.5
3
3.5
ILED=0.186A
4
VIN (V)
fSW=2Mhz
4.5
5
5.5
Torch
Fig 22. LED1 & LED2 Current vs Input Voltage
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
95
90
90
85
85
80
80
75
VLED = 3.1V
VLED = 3.3V
VLED = 3.5V
VLED = 3.8V
VLED = 4.1V
VLED = 4.4V
60
55
50
2.5
3.0
3.5
65
60
55
50
4.0
ILED=1.5A
70
4.5
5.0
2.5
5.5
Flash
4.5
5.0
5.5
VLED=3.5V
fSW=2Mhz
Flash
fi
d
100
95
95
90
90
85
85
80
ηLED (%)
n
80
75
70
o
ηLED (%)
4.0
Fig24. LED Efficiency vs Input Voltage
100
65
55
50
2.5
3.0
3.5
4.0
C
60
4.5
VIN (V)
VLED=3.2V
fSW=2Mhz
ic
ILED=1.006A
5.0
75
70
65
60
55
50
5.5
2.5
Flash
3.5
4.0
4.5
VIN (V)
VLED=3.2V
fSW=4Mhz
5.0
5.5
Flash
Fig26. LED Efficiency vs Input Voltage
100
in
100
3.0
ILED=1.006A
Fig25. LED Efficiency vs Input Voltage
95
95
90
90
85
85
w
80
ηLED (%)
ηLED (%)
3.5
ILED=1.5A
Fig23. LED Efficiency vs Input Voltage
a
3.0
VIN (V)
VIN (V)
fSW=2Mhz
e
65
75
n
70
l
100
95
ti
a
100
ηLED (%)
ηLED (%)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, C IN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
75
70
80
75
70
65
65
60
60
55
55
50
50
2.5
3.0
ILED=0.372A
3.5
4.0
4.5
VIN (V)
VLED=2.9V
fSW=2Mhz
5.0
Torch
Fig 27. LED Efficiency vs Input Voltage
www.awinic.com.cn
12
5.5
2.5
3.0
ILED=0.186A
3.5
4.0
4.5
VIN (V)
VLED=2.75V
fSW=2Mhz
5.0
5.5
Torch
Fig 28. LED Efficiency vs Input Voltage
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
4.300
2.125
4.250
2.100
4.200
2.075
4.150
2.050
4.100
2.000
4.050
4.000
1.975
3.950
1.950
3.900
1.925
3.850
3.800
2.5 2.75
3
3.25 3.5 3.75
4
4.25 4.5 4.75
5
2.5 2.75
3
n
1.900
ti
a
2.025
l
2.150
fSW (Mhz)
fSW (Mhz)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
3.25 3.5 3.75
5.0
9
4.5
8
4.0
3.5
7
3.0
ISTB (μA)
n
6
5
4
o
ISTB (μA)
5
Fig 30. 4-Mhz Frequency vs Input Voltage
10
3
1
0
2.5
3
3.5
4
VIN (V)
C
2
4.5
5
2.5
2.0
1.5
1.0
0.5
0.0
2.5
5.5
3.5
4
4.5
HWEN=1.8 V
I2C=1.8 V
5
5.5
I2C=0 V
Fig 32. Standby Current vs Input Voltage
Fig 31. Standby Current vs Input Voltage
3.0
in
3.0
3
VIN (V)
ic
HWEN=1.8 V
2.5
2.0
2.0
ISTB (μA)
2.5
w
ISTB (μA)
4.25 4.5 4.75
fi
d
Fig 29. 2-Mhz Frequency vs Input Voltage
a
4
VIN (V)
e
VIN (V)
1.5
1.5
1.0
1.0
0.5
0.5
0.0
0.0
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
VIN (V)
HWEN=VIN
I2C=VIN
Fig 33. Standby Current vs Input Voltage
www.awinic.com.cn
4
4.5
5
5.5
VIN (V)
13
HWEN=VIN
I2C=0 V
Fig 34. Standby Current vs Input Voltage
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
2.7
2.9
3.1
3.3
3.5
VIN (V)
fSW=2MHz
ICL=1.9A
ILED=1.5A
3.7
3.9
4.1
4.3
l
2.7
VLED=4.5V
2.9
3.1
ILED=1.5A
3.3
3.5
VIN (V)
fSW=4MHz
ICL=1.9A
3.7
3.9
4.1
4.3
VLED=4.5V
Fig 36. Inductor Current Limit vs Input Voltage
fi
d
Fig 35. Inductor Current Limit vs Input Voltage
3.0
3.0
2.8
2.8
2.6
2.6
2.4
2.4
ICL (A)
n
ICL (A)
ti
a
2.5
e
2.5
2.20
2.16
2.12
2.08
2.04
2.00
1.96
1.92
1.88
1.84
1.80
1.76
1.72
1.68
1.64
1.60
n
2.20
2.16
2.12
2.08
2.04
2.00
1.96
1.92
1.88
1.84
1.80
1.76
1.72
1.68
1.64
1.60
ICL (A)
ICL (A)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
2.2
o
2.0
1.8
C
1.6
1.4
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9
VIN (V)
fSW=2MHz
ICL=2.8A
ic
ILED=1.5A
in
2.0
1.8
1.6
1.4
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9
ILED=1.5A
VLED=4.5V
Fig 37. Inductor Current Limit vs Input Voltage
VIN (V)
fSW=4MHz
ICL=2.8A
VLED=4.5V
Fig 38. Inductor Current Limit vs Input Voltage
VOUT (2V/DIV)
VOUT (2V/DIV)
ILED (500mA/DIV)
ILED (500mA/DIV)
IIN (1A/DIV)
IIN (1A/DIV)
a
w
2.2
TIME (500 μs/DIV)
ILED1/2=1006mA
fSW=2Mhz
TIME (500 μs/DIV)
VLED=3.4V
Fig 39. Ramp Up
www.awinic.com.cn
ILED1/2=1006mA
fSW=2Mhz
VLED=3.4V
Fig 40. Ramp Down
14
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Typical Characteristics (continued)
Ambient temperature is 25°C, input voltage is 3.6 V, HWEN = IN, CIN = COUT = 2×10 µF and L=1 µH, unless
otherwise noted .
TX Signal
VOUT (2V/DIV)
l
VIN (50mV/DIV)
ILED (800mA/DIV)
ti
a
ILED (200mA/DIV)
IIN (500mA/DIV)
IIN (800mA/DIV)
fSW=2Mhz
ILED1=ILED2=746.9mA
VLED=3.18V
f SW=2Mhz
VLED=3.18V
VIVFM=3.2V
e
Fig 41. TX Interrupt
n
TIME (500 μs/DIV)
TIME (2 ms/DIV)
ILED1=ILED2=746.9mA
VIN (50mV/DIV)
ILED (200mA/DIV)
IIN (500mA/DIV)
C
o
IIN (500mA/DIV)
VIN (50mV/DIV)
n
ILED (200mA/DIV)
fi
d
Fig 42. IVFM - Stop and Hold
TIME (500 μs/DIV)
ILED1=ILED2=746.9mA
f SW=2Mhz
VLED=3.18V
VIVFM=3.2V
f SW=2Mhz
VLED=3.18V
VIVFM=3.2V
Fig 44. IVFM - Up and Down
a
w
in
ic
Fig 43. IVFM - Down
TIME (500 μs/DIV)
ILED1=ILED2=746.9mA
www.awinic.com.cn
15
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
DETAILED FUNCTIONAL DESCRIPTION
The AW3644 is a high-power white LED flash driver capable of delivering up to 1.5A in either of the two parallel
LEDs. The device incorporates a 2MHz or 4MHz constant frequency-synchronous current-mode PWM boost
converter and dual high-side current sources to regulate the LED current over the 2.7V to 5.5V input voltage
range.
ti
a
l
The AW3644 PWM DC-DC boost converter switches and boosts the output to maintain at least V HR across
each of the current sources (LED1/2). This minimum headroom voltage ensures that both current sources
remain in regulation. If the input voltage is above the LED voltage + current source headroom voltage, the
device would not switch, but turn the PMOS on continuously (Pass mode). In Pass mode the difference
between (VIN − ILED × RPMOS) and the voltage across the LED is dropped across the current source.
n
The AW3644 has three logic inputs including a hardware Flash Enable (STROBE), a hardware Torch Enable
(TORCH/TEMP, TORCH = default), and a Flash Interrupt input (TX) designed to interrupt the flash pulse during
high battery-current conditions. These logic inputs have internal 300kΩ (typical) pull-down resistors to GND.
fi
d
e
Additional features of the AW3644 include an internal comparator for LED thermal sensing via an external
NTC thermistor and an input voltage monitor that can reduce the Flash current during low V IN conditions. It
also has a Hardware Enable (HWEN) pin that can be used to reset the state of the device and the registers by
pulling the HWEN pin to ground.
a
w
in
ic
C
o
n
Control is done via an I2C-compatible interface. This includes adjustment of the Flash and Torch current levels,
changing the Flash Timeout Duration, and changing the switch current limit. Additionally, there are flag and
status bits that indicate flash current timeout, LED over-temperature condition, LED failure (open/short), device
thermal shutdown, TX interrupt, and VIN under-voltage conditions.
www.awinic.com.cn
16
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
FUNCTIONAL BLOCK DIAGRAM
SW
AW3644
IN
OVP
Thermal Shutdown
Protection
VOVP
IVFM
OUT
OSC
2/4Mhz
ti
a
l
UVLO
Boost Controller
INTC=50uA
n
Current
Limit
NTC
monitor
TORCH/TEMP
TX
Control Logic
/Regsiter
HWEN
SDA
I2C
Interface
LED & OUT
Short Detect
LED2
fi
d
SCL
LED1
e
FB
Select
STROBE
n
GND
FEATURE DESCRIPTION
o
HWEN & I2C INTERFACE
C
AW3644 has a logic input HWEN pin to enable/disable the device. When HWEN is set low, the device goes
into shutdown mode, the I2C interface is disabled and all I2C registers are reset to default. In shutdown mode
the device does not respond to any I2C command. When HWEN is set high, the device goes into standby
mode, the I2C interface is enabled, and the device can respond to I2C command.
ic
There are two kinds of power-up sequences, shown in Figure 45 and Figure 46.
If HWEN is tied to IN pin in application, once IN goes above around VPOR (2.0V), HWEN should stay high for
at least twait=2ms time before any I2C command can be accepted.
in
If HWEN is driven by a GPIO, once HWEN goes from low to high, HWEN should stay high for at least twait=2ms
time before any I2C command can be accepted.
w
HWEN=IN
a
twait ≥2ms
I2C command
Fig 45
www.awinic.com.cn
Power-Up Sequence with HWEN Tied to IN
17
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
IN
HWEN
I2C command
Power-Up Sequence with HWEN Driven by GPIO
n
Fig 46
ti
a
l
twait ≥2ms
e
FLASH MODE
fi
d
In Flash Mode, the LED current sources (LED1/2) provide 128 target current levels from 11.35mA to 1.5A. The
Flash currents are adjusted via the LED1 and LED2 Flash Brightness Registers. Flash mode is activated by
the Enable Register(setting M1, M0 to '11'), or by pulling the STROBE pin HIGH when the pin is enabled
(Enable Register). Once the Flash sequence is activated the current source (LED1/2) ramps up to the
programmed Flash current by stepping through all current steps until the programmed current is reached.
n
When the device is enabled in Flash Mode through the Enable Register, all mode bits in the Enable Register
are cleared after a flash timeout event.
o
TORCH MODE
ic
C
In Torch mode, the LED current sources (LED1/2) provide 128 target current levels from 2.55mA to 372mA on
AW3644. The Torch currents are adjusted via the LED1 and LED2 Torch Brightness Registers. Torch mode
is activated by the Enable Register (setting M1, M0 to '10'), or by pulling the TORCH/TEMP pin HIGH when
the pin is enabled (Enable Register) and set to Torch Mode. Once the TORCH sequence is activated the active
current sources (LED1/2) ramps up to the programmed Torch current by stepping through all current steps
until the programmed current is reached. The rate at which the current ramps is determined by the value
chosen in the Timing Register.
Torch Mode is not affected by Flash Timeout or by a TX Interrupt event.
in
IR MODE
a
w
In IR Mode, the target LED current is equal to the value stored in the LED1/2 Flash Brightness Registers.
When IR mode is enabled (setting M1, M0 to '01'), the boost converter turns on and set the output equal to the
input (pass-mode). At this point, toggling the STROBE pin enables and disables the LED1/2 current sources
(if enabled). The strobe pin can only be set to be Level sensitive, meaning all timing of the IR pulse is externally
controlled. In IR Mode, the current sources do not ramp the LED outputs to the target. The current transitions
immediately from off to on and then on to off.
www.awinic.com.cn
18
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
BOOST
VOUT
PASS
OFF
STROBE
ILED2
M1,M0=‘01’
LED1,LED2=‘11’
STROBE EN=‘1’
M1,M0=‘01’
LED1,LED2=‘10’
STROBE EN=‘1’
IR Mode with Boost
fi
d
e
VOUT
n
Fig 47
M1,M0=‘00’
LED1,LED2=‘10’
STROBE EN=‘1’
ti
a
l
ILED1
STROBE
n
ILED1
ILED2
M1,M0=‘01’
LED1,LED2=‘10’
STROBE EN=‘1’
C
o
M1,M0=‘01’
LED1,LED2=‘11’
STROBE EN=‘1’
Fig 48
M1,M0=‘00’
LED1,LED2=‘10’
STROBE EN=‘1’
IR Mode Pass Only
ic
VOUT
a
w
in
STROBE
ILED1
Flash Timeout Value
ILED2
M1,M0=‘01’
LED1,LED2=‘11’
STROBE EN=‘1’
Timeout
Start
Timeout
Reset
Fig 49
Timeout
Start
Timeout
Reset
Timeout
Start
Timeout Reached
VOUT goes low，
LED1 &LED2 turn off
IR Mode Timeout
SOFT START-UP
Turn on of the AW3644 Torch and Flash modes can be done through the Enable Register. On start-up, when
VOUT is less than VIN the internal synchronous PMOS turns on as a current source and delivers 200mA (typical)
to the output capacitor. During this time the current source (LED) is off. When the voltage across the output
www.awinic.com.cn
19
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
capacitor reaches 2.2 V (typical) the current source turns on. At turn-on the current source steps through each
FLASH or TORCH level until the target LED current is reached. This gives the device a controlled turn-on and
limits inrush current from the VIN supply.
PASS MODE
ti
a
l
The AW3644 starts up in Pass Mode and stays there until Boost Mode is needed to maintain regulation. In
Pass Mode the boost converter does not switch, and the synchronous PMOS turns fully on bringing VOUT up to
VIN − ILED × RPMOS. In Pass Mode the inductor current is not limited by the peak current limit. If the voltage
difference between VOUT and VLED falls below VHR, the device switches to Boost Mode.
POWER AMPLIFIER SYNCHRONIZATION (TX)
e
n
The TX pin is a Power Amplifier Synchronization input. This is designed to reduce the flash LED current and
thus limit the battery current during high battery current conditions such as PA transmit events. When the
AW3644 is engaged in a Flash event, and the TX pin is pulled high, the LED current is forced into Torch Mode
at the programmed Torch current setting. If the TX pin is then pulled low before the Flash pulse terminates,
the LED current returns to the previous Flash current level. At the end of the Flash time-out, whether the TX
pin is high or low, the LED current turns off.
fi
d
The TX input can be disable by setting bit[7] (TX Enable) to a ‘0’ in the Enable Register(0x01).
INPUT VOLTAGE FLASH MONITOR (IVFM)
C
o
n
The AW3644 has the ability to adjust the flash current based upon the voltage level present at the IN pin
utilizing the Input Voltage Flash Monitor (IVFM). The adjustable threshold ranges from 2.9 V to 3.6 V in 100mV
steps as well as adjustable hysteresis, with three different usage modes (Stop and Hold, Down, Up and Down).
The IVFM threshold and hysteresis are controlled by bits[5:3] and bit[2] respectively, in the IVFM
Register(0x02). The Flags2 Register has the IVFM flag bit set when the input voltage crosses the IVFM
threshold value. Additionally, the IVFM threshold sets the input voltage boundary that forces the AW3644 to
either stop ramping the flash current during startup in Stop and Hold Mode, or to actively adjust the LED current
lower in Down Mode, or to continuously adjust the LED current up and down in Up & Down Mode.
Stop and Hold Mode: Stops Current Ramp and holds the level for the remaining flash, If VIN falls below the
IVFM threshold value.
ic
Down Mode: Adjust current down if VIN falls below the IVFM threshold value and stops decreasing once VIN
rises above the IVFM threshold (or plus a hysteresis). The AW3644 will decrease the current throughout the
flash pulse anytime VIN falls below the IVFM threshold, not just once. The flash current will not increase again
until the next flash.
a
w
in
Up & Down Mode: Adjust current down if VIN falls below the IVFM threshold value and adjusts current up if
VIN rise above the IVFM threshold (or plus a hysteresis). In Up & Down mode, the LED current will continually
adjust with the rising and falling of VIN throughout the entire flash pulse.
www.awinic.com.cn
20
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Flash Event
VIN
T-Filter=4μs
IVFM-Threshold
Target Flash Current
Flash Current with
IVFM Disable
l
Stop & Hold
Mode
ti
a
Flash Current
VIN
n
Hysteresis = 0 or 50mV
IVFM-Threshold
e
Down
Mode
o
Up & Down
Mode
C
Flash Current
IVFM Modes
ic
Fig 50
FLASH TIMEOUT
Hysteresis = 0 or 50mV
n
IVFM-Threshold
fi
d
VIN
T-Filter=4μs
T-Filter=4μs
Flash Current
w
in
The Flash Timeout period sets the maximum time of one flash event, whether a flash stop command is received
or not. The AW3644 has 16 timeout levels ranging from 40ms to 1.6s (see TIMING CONFIGURATION
REGISTER (0X08) for more detail). Flash Timeout applies to both Flash and IR modes, and it continues to
count when the Flash mode is forced into Torch mode during a TX high event. The mode bits are cleared and
bit[0] is set in the Flags1 register(0x0A) upon a Flash Timeout. This fault flag can be reset to '0' by reading
back the Flags1 Register (0x0A), or by setting HWEN to '0', or by setting the SW RESET bit to a '1', or by
removing power to the AW3644.
a
CURRENT LIMIT
When the inductor current limit is reached, the AW3644 terminates the charging phase of the switching cycle
until the next switching period. If the over-current condition persists, the device operates continuously in current
limit. The AW3644 features two selectable inductor current limits(1.9A and 2.8A) that are programmable by
bit[0] in Boost configuration Register(0x07).
Since the current limit is sensed in the NMOS switch, there is no mechanism to limit the current when the
device operates in Pass Mode (current does not flow through the NMOS in pass mode). The mode bits are not
cleared upon a Current Limit event, but a flag bit[3] is set in the Flags1 register(0x0A).
www.awinic.com.cn
21
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
This fault flag can be reset to '0' by reading back the Flags1 Register (0x0A), or by setting HWEN to '0', or by
setting the SW RESET bit to a '1', or by removing power to the AW3644.
NTC THERMISTOR INPUT (TORCH/TEMP)
ti
a
l
The TORCH/TEMP pin, when set to TEMP mode, serves as a threshold detector and bias source for negative
temperature coefficient (NTC) thermistors. When the voltage at TEMP goes below the programmed threshold,
bit[0] is set to a ‘1’, and the AW3644 is placed into standby mode. The NTC threshold voltage is adjustable
from 200 mV to 900 mV in 100-mV steps. The NTC bias current is set to 50µA. The NTC detection circuitry
can be enabled or disabled via the Enable Register. If enabled, the NTC block turns on and off during the start
and stop of a Flash/Torch event.
n
Additionally, the NTC input looks for an open NTC connection and a shorted NTC connection. If the NTC input
falls below 100 mV, the NTC short flag is set(bit[4] in the Flags2 Register), and the AW3644 is forced into
standby mode. If the NTC input rises above 2.3 V, the NTC Open flag is set(bit[3] in the Flags2 Register), and
the AW3644 is forced into standby mode. These fault detections can be individually disabled/enabled via the
NTC Open Fault Enable bit and the NTC Short Fault Enable bit in Temp register(0x09)
e
VIN
VOPEN
TORCH/
TEMP
VTRIP
RNTC
Control
Logic
o
n
VSHORT
fi
d
INTC
Temp Detection Diagram
C
Fig 51
The AW3644 is not available for operation until Flags2 register is cleared. The three NTC fault flags can be
reset to '0' by reading back the Flags2 Register (0x0B), or by setting HWEN to '0', or by setting the SW RESET
bit to a '1', or by removing power to the AW3644.
ic
UNDERVOLTAGE LOCKOUT (UVLO)
w
in
The AW3644 has an internal comparator that monitors the voltage at IN and forces the AW3644 into standby
if the input voltage drops to 2.5 V. If the UVLO monitor threshold is tripped, the UVLO flag bit is set in the
Flags1 Register (0x0A). If the input voltage rises above 2.5 V, the AW3644 is not available for operation until
there is an I2C read of the Flags1 Register (0x0A). Upon a read, the Flags1 register is cleared, and normal
operation can resume if the input voltage is greater than 2.5 V.
VOUT SHORT FAULT
a
The Output Short Fault flag reads back a '1' if the device is active in Flash or Torch mode and the boost output
experiences a short condition. VOUT short condition occurs if the voltage at OUT goes below 2.3V (typ.) while
the device is in Torch or Flash mode. There is a deglitch time of 2.048ms before the VOUT Short flag is valid.
The mode bits are cleared upon an the VOUT short fault. The AW3644 is not available for operation until VOUT
Fault flags is cleared. The VOUT Short Faults can be reset to '0' by reading back the Flags1 Register (0x0A),
or by setting HWEN to '0', or by setting the SW RESET bit to a '1', or by removing power to the AW3644.
LED SHORT FAULT
www.awinic.com.cn
22
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
The LED Short Fault flags read back a '1' if the device is active in Flash or Torch mode and either active LED
output experiences a short condition. An LED short condition is determined if the voltage at LED1 or LED2
goes below 500mV (typ.) while the device is in Torch or Flash mode. There is a deglitch time of 256μs before
the LED Short Fault flag is valid. The mode bits are cleared upon an LED short fault. The AW3644 is not
available for operation until the LED Short Fault flags is cleared. The LED Short Faults can be reset to '0' by
reading back the Flags1 Register (0x0A), or by setting HWEN to '0', or by setting the SW RESET bit to a '1',
or by removing power to the AW3644.
l
OVERVOLTAGE PROTECTION (OVP)
e
n
ti
a
The output voltage is limited to typically 5 V. In situations such as an open LED, the AW3644 raises the output
voltage in order to try and keep the LED current at its target value. When VOUT reaches 5 V (typ.) the
overvoltage comparator trips and turns off the internal NMOS. When VOUT falls below the “VOVP Off Threshold”,
the AW3644 begins switching again. The mode bits are cleared, and the OVP Fault flag is set, when an OVP
condition is present for three rising OVP edges. This prevents momentary OVP events from forcing the device
to shut down. The AW3644 is not available for operation until the OVP Fault flag is cleared. The OVP Fault
can be reset to '0' by reading back the Flags2 Register (0x0A), or by setting HWEN to '0', or by setting the SW
RESET bit to a '1', or by removing power to the AW3644.
fi
d
THERMAL SHUTDOWN (TSD)
a
w
in
ic
C
o
n
When the AW3644 die temperature reaches 155°C, the thermal shutdown detection circuit trips, forcing the
AW3644 into standby and writing a '1' to the Thermal Shutdown Fault flag of the Flags1 Register (0x0A) . The
AW3644 is only allowed to restart after the Thermal Shutdown Fault flag is cleared. The Thermal Shutdown
Faults can be reset to '0' by reading back the Flags1 Register (0x0A), or by setting HWEN to '0', or by setting
the SW RESET bit to a '1', or by removing power to the AW3644. Upon restart, if the die temperature is still
above 155°C, the AW3644 resets the Fault flag and re-enters standby.
www.awinic.com.cn
23
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
PROGRAMMING
CONTROL TRUTH TABLE
MODE0
STROBE EN
TORCH EN
STROBE PIN
TORCH PIN
ACTION
0
0
0
0
X
X
Standby
0
0
0
1
X
Pos edge
Ext Torch
0
0
1
0
Pos edge
X
Ext Flash
0
0
1
1
0
Pos edge
Standalone
Torch
0
0
1
1
Pos edge
0
0
0
1
1
Pos edge
Pos edge
1
0
X
X
X
X
1
1
X
X
X
0
1
0
X
X
0
1
1
X
0
0
1
1
X
ti
a
Standalone Flash
Standalone Flash
n
fi
d
e
X
Pos edge
Int Torch
Int Flash
X
IRLED Standby
X
IRLED Standby
X
IRLED enabled
n
I2C INTERFACE
l
MODE1
Data Validation
C
o
When SCL is high level, SDA level must be constant. SDA can be changed only when SCL is low level.
SDA
Data Line
Stable
Data Valid
Fig 52
Change
of Data
Allowed
Data Validation Diagram
in
ic
SCL
I2C Start/Stop
I2C start: SDA changes form high level to low level when SCL is high level.
a
w
I2C stop: SDA changes form low level to high level when SCL is high level.
SDA
SCL
S/Sr
P
S: START condition
Sr: START Repeated condition
www.awinic.com.cn
24
P: STOP condition
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Fig 53
Start and Stop Conditions
ACK (Acknowledgement)
ACK means the successful transfer of I2C bus data. After master sends 8bits data, SDA must be released;
SDA is pulled to GND by slave device when slave acknowledges.
ti
a
l
When master reads, slave device sends 8bit data, releases the SDA and waits for ACK from master. If ACK is
send and I2C stop is not send by master, slave device sends the next data. If ACK is not send by master, slave
device stops to send data and waits for I2C stop.
Data Output
by Transmiter
Not Acknowledge（NACK）
Data Output
by Receiver
n
Acknowledge（ACK）
2
1
SCL From
Master
8
9
Clock Pulse for
Acknowledgement
e
START
condition
Acknowledgement Diagram
fi
d
Fig 54
Write Cycle
o
n
One data bit is transferred during each clock pulse. Data is sampled during the high state of the serial clock
(SCL). Consequently, throughout the clock’s high period, the data should remain stable. Any changes on the
SDA line during the high state of the SCL and in the middle of a transaction, aborts the current transaction.
New data should be sent during the low SCL state. This protocol allows a single data line to transfer both
command/control information and data using the synchronous serial clock.
C
Each data transaction is composed of a Start Condition, a number of byte transfers (set by the software) and
a Stop Condition to terminate the transaction. Every byte written to the SDA bus must be 8 bits long and is
transferred with the most significant bit first. After each byte, an Acknowledge signal must follow.
In a write process, the following steps should be followed:
Master device generates START condition. The “START” signal is generated by lowering the
ic
a)
SDA signal while the SCL signal is high.
Master device sends slave address (7-bit) and the data direction bit (r/w = 0).
c)
Slave device sends acknowledge signal if the slave address is correct.
d)
Master sends control register address (8-bit)
Slave sends acknowledge signal
a
w
e)
in
b)
f)
Master sends data byte to be written to the addressed register
g)
Slave sends acknowledge signal
h)
If master will send further data bytes the control register address will be incremented by one after
acknowledge signal (repeat step 6, 7)
i)
Master generates STOP condition to indicate write cycle end
SCL
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
A6 A5 A4 A3 A2 A1 A0 R/WAck A7 A6 A5 A4 A3 A2 A1 A0 Ack D7 D6 D5 D4 D3 D2 D1 D0
SDA
Start
www.awinic.com.cn
Device Address
Register Address
25
Write Data
Stop
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
I2C Write Timing
Fig 55
Read Cycle
In a read cycle, the following steps should be followed:
Master device generates START condition
b)
Master device sends slave address (7-bit) and the data direction bit (r/w = 0).
c)
Slave device sends acknowledge signal if the slave address is correct.
d)
Master sends control register address (8-bit)
e)
Slave sends acknowledge signal
f)
Master generates STOP condition followed with START condition or REPEAT START condition
g)
Master device sends slave address (7-bit) and the data direction bit (r/w = 1).
h)
Slave device sends acknowledge signal if the slave address is correct.
i)
Slave sends data byte from addressed register.
j)
If the master device sends acknowledge signal, the slave device will increase the control register
address by one, then send the next data from the new addressed register.
k)
If the master device generates STOP condition, the read cycle is ended.
SCL
0
1
2
3
4
5
SDA
A6
A5
A4
A3
A2
A1
……
Using
Repeat start……
RS
2
3
4
5
6
7
8
A0 R/W Ack A7
A6
A5
A4
A3
A2
A1
A0
Ack
7
8
n
1
2
3
4
5
A6
A5
A4
A3
A2
A1
6
7
Register Address
8
0
A0 R/W Ack D7
ic
...
6
D6 …… D1
7
8
D0 Ack
stop
0
1
2
3
4
5
A6
A5
A4
A3
A2
A1
6
7
8
0
A0 R/W Ack D7
Device Address
1
...
6
7
D6 …… D1
D0
Write Data
8
Ack
stop
Fig 56 I2C Read Timing
a
w
S
1
Write Data
Device Address
……
in
1
0
Separated
Read/write
transaction ……
P
0
6
o
Device Address
C
start
fi
d
e
n
ti
a
l
a)
www.awinic.com.cn
26
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
REGISTER CONFIGURATION
REGISTER LIST
Read/Write
Default Value
Chip ID Register
0x00
Read
0x36
Enable Register
0x01
Read/Write
0x80
IVFM Register
0x02
Read/Write
0x01
LED1 Flash Brightness Register
0x03
Read/Write
LED2 Flash Brightness Register
0x04
Read/Write
LED1 Torch Brightness Register
0x05
Read/Write
LED2 Torch Brightness Register
0x06
Read/Write
Boost Configuration Register
0x07
Read/Write
Timing Configuration Register
0x08
Read/Write
Temp Register
0x09
Read/Write
0x08
Flags1 Register
0x0A
Read
0x00
Flags2 Register
0x0B
Read
0x00
Device ID Register
0x0C
Read
0x02
Last Flash Register
0x0D
Read
0x00
ti
a
l
Address(HEX)
0xBF
0x3F
0xBF
n
0x3F
0x09
fi
d
e
0x1A
C
o
n
Register name
REGISTER DETAILED DESCRIPTION
Chip ID Register (0x00)
Bit 7
ic
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LED2 Enable
0=OFF
(Default)
1=ON
LED1 Enable
0=OFF
(Default)
1=ON
in
Chip ID: “00110110”
Enable Register (0x01)
w
Bit 7
a
TX Pin
Enable
0=Disabled
1=Enabled
(Default)
Bit 6
Strobe Type
0=Level
Triggered
(Default)
1=Edge
Triggered
Strobe
Enable
0=Disabled
(Default)
1=Enabled
Torch/Temp
Pin Enable
0=Disabled
(Default)
1=Enabled
Mode Bits: M1, M0
00=Standby (Default)
01=IR Drive
10=Torch
11=Flash
Note:
In Edge or Level Strobe Mode, it is recommended that the trigger pulse width be set greater than 1ms to ensure
proper turn-on of the device.
IVFM Register (0x02)
www.awinic.com.cn
27
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
RFU
UVLO
Circuitry
0=Disabled
(Default)
1=Enabled
Bit 5
Bit 4
Bit 2
IVFM Levels
000=2.9 V (Default)
001=3.0 V
010=3.1 V
011=3.2 V
100=3.3 V
101=3.4 V
110=3.5 V
111=3.6 V
Bit 1
IVFM
Hysteresis
0=0 mV
(Default)
1=50 mV
Bit 5
Bit 3
Bit 2
Bit 7
Bit 6
Bit 0
(Default)
e
0000000=11.35 mA
……………
0111111=746.9 mA
……………
1111111=1.5 A
Bit 1
n
LED1 Flash Brightness Levels
IFLASH(mA)≈(Brightness Code*11.72mA)+11.35mA
LED2 Flash Brightness Register (0x04)
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LED2 Flash Brightness Levels
IFLASH(mA)≈(Brightness Code*11.72mA)+11.35mA
n
RFU
Bit 4
ti
a
Bit 6
LED2 Flash Current Override
0=LED2 Flash Current is not set to LED1 Flash
Current
1=LED2 Flash Current is set to LED1 Flash
Current
(Default)
Bit 0
IVFM Mode Selection
00=Disabled
01=Stop and Hold Mode
(Default)
10=Down Mode
11=Up and Down Mode
LED1 Flash Brightness Register (0x03)
Bit 7
Bit 3
fi
d
Bit 6
l
Bit 7
(Default)
C
o
0000000=11.35 mA
……………
0111111=746.9 mA
……………
1111111=1.5 A
LED1 Torch Brightness Register (0x05)
Bit 7
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LED1 Torch Brightness Levels
ITORCH(mA)≈(Brightness Code*2.91mA)+2.55mA
0000000=2.55 mA
……………
0111111=186 mA (Default)
……………
1111111=372 mA
LED2 Torch Brightness Register (0x06)
w
in
ic
LED2 Torch Current Override
0=LED2 Torch Current is not set to LED1 Torch
Current
1=LED2 Torch Current is set to LED1 Torch
Current
(Default)
Bit 6
a
RFU
www.awinic.com.cn
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LED2 Torch Brightness Levels
ITORCH(mA)≈(Brightness Code*2.91mA)+2.55mA
0000000=2.55 mA
……………
0111111=186 mA (Default)
……………
1111111=372 mA
28
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Boost Configuration Register (0x07)
Software
Reset Bit
0=Not Reset
(Default)
1=Reset
RFU
Bit 5
RFU
Bit 4
RFU
Bit 3
LED Pin
Short Fault
Detect
0=Disabled
1=Enabled
(Default)
Bit 2
Bit 1
Boost Mode
0=Normal
(Default)
1=Pass Mode
Only
Boost
Frequency
Select
0=2 MHz
(Default)
1=4 MHz
Bit 5
Bit 4
Torch Current Ramp time
000=No Ramp
001=1 ms (Default)
010=32 ms
011=64 ms
100=128 ms
101=256 ms
110=512 ms
111=1024 ms
Bit 3
Bit 2
Flash Time-out Duration
0000=40 ms
0001=80 ms
0010=120 ms
0011=160 ms
0100=200 ms
0101=240 ms
0110=280 ms
0111=320 ms
1000=360 ms
1001=400 ms
1010=600 ms (Default)
1011=800 ms
1100=1000 ms
1101=1200 ms
1110=1400 ms
1111=1600 ms
Bit 1
Bit 0
Temp Register (0x09)
TORCH
Polarity
0=Active High
(Default)
(Pull-down
Resister
Enabled)
1=Active Low
(Pull-down
Resister
Disabled)
NTC Open
Fault Enable
0=Disabled
(Default)
1=Enabled
Bit 7
w
TX Flag
a
Bit 4
NTC Short
Fault Enable
0=Disabled
(Default)
1=Enabled
Bit 3
Bit 2
Bit 1
TEMP Detect Voltage Thresholds
000=200 mV
001=300 mV
010=400 mV
011=500 mV
100=600 mV (Default)
101=700 mV
110=800 mV
111=900 mV
Bit 0
TORCH/TEM
P Function
Select
0=TORCH
(Default)
1=TEMP
Flags1 Register (0x0A)
in
Bit 5
ic
RFU
Bit 6
o
Bit 7
C
n
fi
d
RFU
Bit 6
Boost
Current Limit
0=1.9A
1=2.8A
(Default)
ti
a
Timing Configuration Register (0x08)
Bit 7
Bit 0
n
Bit 6
l
Bit 7
e
Bit 6
VOUT Short
Fault
Bit 5
LED1 Short
Fault
Bit 4
LED2 Short
Fault
Bit 3
Current Limit
Flag
Bit 2
Thermal
Shutdown
(TSD) Fault
Bit 1
UVLO Fault
Bit 0
Flash TimeOut Flag
Flags2 Register (0x0B)
RFU
Bit 7
Bit 6
RFU
www.awinic.com.cn
Bit 5
RFU
Bit 4
Bit 3
Bit 2
IVFM Trip
Flag
Bit 1
OVP Fault
Bit 0
NTC Short
Fault
NTC Open
Fault
TEMP Trip
Fault
29
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
Device ID Register (0x0C)
Bit 7
RFU
Bit 6
RFU
Bit 5
Bit 4
Bit 3
Device ID
“000”
Bit 2
Bit 1
Bit 0
Silicon Revision Bits
“010”
Last Flash Register (0x0D)
Bit 7
RFU
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
a
w
in
ic
C
o
n
fi
d
e
n
ti
a
The value stored is always the last current value the IVFM detection block set ILED=IFLASH-TARGET*((code+1)/128)
l
www.awinic.com.cn
30
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
APPLICATION INFORMATION
The AW3644 can drive two flash LEDs at currents up to 1.5 A per LED. The 2MHz/4MHz DC-DC boost
regulator allows for the use of small value discrete external components. Below are some peripheral selection
guidelines.
l
OUTPUT CAPACITOR SELECTION
n
ti
a
The AW3644 is designed to operate with a 10µF ceramic output capacitor. When the boost converter is running,
the output capacitor supplies the load current during the boost converter on-time. When the NMOS switch
turns off, the inductor energy is discharged through the internal PMOS switch, supplying power to the load and
restoring charge to the output capacitor. This causes a sag in the output voltage during the on-time and a rise
in the output voltage during the off-time. The output capacitor is therefore chosen to limit the output ripple to
an acceptable level depending on load current and input/output voltage differentials and also to ensure the
converter remains stable.
e
Larger capacitors such as a 22µF or capacitors in parallel can be used if lower output voltage ripple is desired.
To estimate the output voltage ripple considering the ripple due to capacitor discharge (ΔV Q) and the ripple
due to the capacitors ESR (ΔVESR) use the following equations:
VQ
fi
d
For continuous conduction mode, the output voltage ripple due to the capacitor discharge is:
(VOUT VIN ) I LED
VOUT f COUT
V I
I
VESR RESR OUT LED L
VIN
2
n
The output voltage ripple due to the output capacitors ESR is found by:
I L
o
Where
VIN (VOUT VIN )
VOUT f L
C
In ceramic capacitors the ESR is very low so the assumption is that 80% of the output voltage ripple is due to
capacitor discharge and 20% from ESR. Table 1 lists different manufacturers for various output capacitors and
their case sizes suitable for use with the AW3644.
ic
INPUT CAPACITOR SELECTION
w
in
Choosing the correct size and type of input capacitor helps minimize the voltage ripple caused by the switching
of the AW3644 boost converter and reduce noise on the boost converter's input pin that can feed through and
disrupt internal analog signals. In the typical application circuit a 10-µF ceramic input capacitor works well. It
is important to place the input capacitor as close as possible to the AW3644 input (IN) pin. This reduces the
series resistance and inductance that can inject noise into the device due to the input switching currents. Table
1 lists various input capacitors recommended for use with the AW3644.
Table 1 Recommended Input/ Output Capacitors (X5R/X7R Dielectric)
PART NUMBER
VALUE
CASE
VOLTAGE RATING
TDK
C1608JB0J106M
10μF
0603
6.3V
TDK
C2012JB1A106M
10μF
0805
10V
Murata
GRM188R60J106M
10μF
0603
6.3V
Murata
GRM21BR61A106KE19
10μF
0805
10V
a
MANUFACTURER
www.awinic.com.cn
31
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
INDUCTOR SELECTION
I LED VOUT
I L
VIN
I L
where
VIN VOUT VIN
2 f SW L VOUT
And f SW =2 or 4MHz.
n
Table 2 lists various inductors and their manufacturers that work well with the AW3644.
ti
a
I PEAK
l
The AW3644 is designed to use a 0.47µH or 1µH inductor. When the device is boosting (VOUT > VIN) the
inductor is typically the largest area of efficiency loss in the circuit. Therefore, choosing an inductor with the
lowest possible series resistance is important. Additionally, the saturation rating of the inductor should be
greater than the maximum operating peak current of the AW3644. This prevents excess efficiency loss that
can occur with inductors that operate in saturation. For proper inductor operation and circuit performance,
ensure that the inductor saturation and the peak current limit setting of the AW3644 are greater than IPEAK in
the following calculation:
e
Table 2 Recommended Inductors
L
PART NO.
SIZE
ISAT
RDC
TOKO
1μH
DFE201610P-1R0M
2.0 mm x 1.6 mm x 1.0 mm
3.7A
58mΩ
TOKO
0.47μH
DFE201610P-R470M
2.0 mm x 1.6 mm x 1.0 mm
4.1A
32mΩ
Sunlord
1μH
WPN252012H1R0MT
2.5mm × 2.0mm ×1.2mm
3.4A
48mΩ
a
w
in
ic
C
o
n
fi
d
MANUFACTURER
www.awinic.com.cn
32
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
PCB LAYOUT
LAYOUT GUIDELINES
The high switching frequency and large switching currents of the AW3644 make the choice of layout important.
The following steps should be used as a reference to ensure the device is stable and maintains proper LED
current regulation across its intended operating voltage and current range.
ti
a
l
1. Place CIN on the top layer (same layer as the AW3644) and as close to the device as possible. The input
capacitor conducts the driver currents during the low-side MOSFET turn-on and turn-off and can detect
current spikes over 1 A in amplitude. Connecting the input capacitor through short, wide traces to both the
IN and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the
VIN line.
e
n
2. Place COUT on the top layer (same layer as the AW3644) and as close as possible to the OUT and GND
pin. The returns for both CIN and COUT should come together at one point, as close to the GND pin as
possible. Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND
pins that can corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding
circuitry.
fi
d
3. Connect the inductor on the top layer close to the SW pin. There should be a low-impedance connection
from the inductor to SW due to the large DC inductor current, and at the same time the area occupied by
the SW node should be small so as to reduce the capacitive coupling of the high dV/dT present at SW that
can couple into nearby traces.
o
n
4. Avoid routing logic traces near the SW node so as to avoid any capacitive coupling from SW onto any
high-impedance logic lines such as TORCH/TEMP, STROBE, HWEN, SDA, and SCL. A good approach
is to insert an inner layer GND plane underneath the SW node and between any nearby routed traces.
This creates a shield from the electric field generated at SW.
a
w
in
ic
C
5. Terminate the Flash LED cathodes directly to the GND pin of the AW3644. If possible, route the LED
returns with a dedicated path so as to keep the high amplitude LED currents out of the GND plane. For
Flash LEDs that are routed relatively far away from the AW3644, a good approach is to sandwich the
forward and return current paths over the top of each other on two layers. This helps reduce the inductance
of the LED current paths.
www.awinic.com.cn
33
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
PACKAGE DESCRIPTION
Bottom View
Top View
C
B
A
D
D
E
2
3
ti
a
e2
e3
l
1
n
12×∅0.268±0.020
NOM
0.575
0.195
0.340
0.040
1.626
1.332
0.196
0.400
0
Toleranc e
±0.055
±0.020
±0.025
±0.010
fi
d
Symbol
A
A1
A2
A3
D
E
e1
e2
e3
±0.025
±0.025
NA
NA
NA
n
A
A3
A2
A1
Side View
e
e1
o
Note: All dimensions are in millimeter(mm).
C
LAND PATTERN DATA
0.217
in
ic
0.209
0.8
a
w
0.4
12×∅0.240
0.4
1.2
Note: All dimensions are in millimeter(mm).
www.awinic.com.cn
34
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
TAPE AND REEL INFORMATION
TAPE DIMENSIONS
REEL DIMENSIONS
P1
P0
P2
K0
ti
a
B0
D1
Cavity
l
W
A0
e
n
A0：Dimension designed to accommodate the component width
B0：Dimension designed to accommodate the component length
K0：Dimension designed to accommodate the component thickness
W：Overall width of the carrier tape
P0：Pitch between successive cavity centers and sprocket hole
P1：Pitch between successive cavity centers
P2：Pitch between sprocket hole
D0：Reel width
D1：Reel diameter
fi
d
D0
Q2
Q3
Q4
Q1
Q2
Q1
Q2
Q1
Q2
Q3
Q4
Q3
Q4
Q3
Q4
C
Q1
o
n
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
User Direction of Feed
a
w
in
ic
Pocket Quadrants
www.awinic.com.cn
35
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
REVISION HISTORY
Date
Change Record
V1.0
April 2016
Product Datasheet V1.0 Released
V1.1
Sep 2016
Added ESD CDM Information
Changed LED1 Flash Brightness Level 0111111 to 746.9mA
Changed LED2 Flash Brightness Level 0111111 to 746.9mA
–page27
–page27
V1.2
Jan 2017
Added Awinic Flash Led Driver Series
–page3
V1.3
May 2017
Added HWEN & I2C Interface Description
V1.4
Jan 2018
Add Moisture Sensitivity Level and Environmental Information.
V1.5
July 2018
1. Updated Absolute Maximum Ratings
2. Updated Tape and Reel Information
V1.6
Sep 2018
1. Updated Feature Description
ti
a
l
Vision
–page3
--page5
--page35
--page 17
a
w
in
ic
C
o
n
fi
d
e
n
–page17
www.awinic.com.cn
36
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
AW3644
September 2018 V1.6
DISCLAIMER
Information in this document is believed to be accurate and reliable. However, Shanghai AWINIC
Technology Co., Ltd (AWINIC Technology) does not give any representations or warranties, expressed or
implied, as to the accuracy or completeness of such information and shall have no liability for the
consequences of use of such information.
ti
a
l
AWINIC Technology reserves the right to make changes to information published in this document, including
without limitation specifications and product descriptions, at any time and without notice. Customers shall
obtain the latest relevant information before placing orders and shall verify that such information is current
and complete. This document supersedes and replaces all information supplied prior to the publication
hereof.
e
n
AWINIC Technology products are not designed, authorized or warranted to be suitable for use in medical,
military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an
AWINIC Technology product can reasonably be expected to result in personal injury, death or severe
property or environmental damage. AWINIC Technology accepts no liability for inclusion and/or use of
AWINIC Technology products in such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
fi
d
Applications that are described herein for any of these products are for illustrative purposes only. AWINIC
Technology makes no representation or warranty that such applications will be suitable for the specified use
without further testing or modification.
All products are sold subject to the general terms and conditions of commercial sale supplied at the time of
order acknowledgement.
o
n
Nothing in this document may be interpreted or construed as an offer to sell products that is open for
acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other
industrial or intellectual property rights.
C
Reproduction of AWINIC information in AWINIC data books or data sheets is permissible only if reproduction
is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices.
AWINIC is not responsible or liable for such altered documentation. Information of third parties may be
subject to additional restrictions.
a
w
in
ic
Resale of AWINIC components or services with statements different from or beyond the parameters stated
by AWINIC for that component or service voids all express and any implied warranties for the associated
AWINIC component or service and is an unfair and deceptive business practice. AWINIC is not responsible
or liable for any such statements.
www.awinic.com.cn
37
Copyright © 2018 SHANGHAI AWINIC TECHNOLOGY CO., LTD
工商网监
湘ICP备2023018690号
