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SY7302ABC

SY7302ABC

  • 厂商:

    SILERGY(矽力杰)

  • 封装:

    SOT23-6

  • 描述:

    高效1MHZ,2A升压调节器 SOT23-6

  • 数据手册
  • 价格&库存
SY7302ABC 数据手册
Application Note:AN_SY7302 High Efficiency 1MHz, 2A Step Up Regulator General Description Features SY7302 is a high efficiency, current-mode control Boost DC to DC regulator with an integrated 200mΩ RDS(ON) N-channel MOSFET. The fixed 1MHz switching frequency and internal compensation reduce external component count and save the PCB space. The build-in internal soft start circuitry minimizes the inrush current at start-up.         on fid 司 技 l-F or EN R3 1M yC FB 思 达 VIN=5V,VOUT=12V 1 COUT 10uFх2 NC SY7302 3 R1 200k GND 2 4 ON/ OFF Sil erg LX en 6 IN Efficiency vs. Input Voltage VOUT 12V 94 tia 5 深 L1 4.7uH Efficiency (%) Typical Applications Note ----  Digital Camera  Cell Phone  PDA, PMP, MP3 品 Package type SOT23-6 圳 市 Ordering Number SY7302ABC 科 Temperature Code Package Code Optional Spec Code CIN 10uF 公 Applications SY7302 □(□□)□ VIN 5V 有 限 Ordering Information Wide input range: 3-33V bias input, 33Vout max 1MHz switching frequency Minimum on time: 100ns typical Minimum off time: 100ns typical Low RDS(ON): 200mΩ RoHS Compliant and Halogen Free Accurate Reference: 0.6VREF Compact package: SOT23-6 92 90 88 86 R2 10.5k 84 0 0.1 0.2 0.3 0.4 0.5 Load Current (A) Figure 1. Schematic Diagram SY7302 Rev. 1.0 © 2018 Silergy Corp. Figure 2. Efficiency vs Load Current Silergy Corp. Confidential- Prepared for Customer Use Only 1 All Rights Reserved. SY7302 Pinout (top view) 1 6 NC GND 2 5 IN FB 3 4 EN 公 有 限 (SOT23-6) 司 LX Top Mark: HMxyz (Device code:HM, x=year code, y=week code, z= lot number code) NC 6 技 4 科 EN Pin Description Input pin. Decouple this pin to GND pin with 1uF ceramic cap. Ground pin Inductor node. Connect an inductor between IN pin and LX pin. Feedback pin. Connect a resistor R1 between VOUT and FB, and a resistor R2 between FB and GND to program the output voltage: VOUT=0.6V*(R1/R2+1). Enable control. High to turn on the part. Don’t leave it floated. 思 达 Pin Number 5 2 1 3 圳 市 品 Pin Name IN GND LX FB No connection. 深 Absolute Maximum Ratings (Note 1) Sil erg yC on fid en tia l-F or LX, IN, EN ---------------------------------------------------------------------------------------------------------- 36V All other pins-------------------------- ------------------------------------------------------------------------------ 4V Power Dissipation, PD @ TA = 25°C SOT23-6 ----------------------------------------------------------------- 0.6W Package Thermal Resistance (Note 2) θ JA -------------------------------------------------------------------------------------------------------- 161°C/W θ JC -------------------------------------------------------------------------------------------------------- 130°C/W Junction Temperature Range ------------------------------------------------------------------------------------ 150°C Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C Storage Temperature Range ---------------------------------------------------------------------------------- -65°C to 150°C ESD Susceptibility (Note 2) HBM (Human Body Mode) ---------------------------------------------------------------------------------- ----500V MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V Dynamic LX voltage in 50ns duration ------------------------------------------------------------------ IN+3V to GND-4V Recommended Operating Conditions (Note 3) Input Voltage Supply----------------------------------------------------------------------------------------------- 3V to 33V Junction Temperature Range ---------------------------------------------------------------------------------- -40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------- -40°C to 85°C AN_SY7302 Rev. 1.0 © 2018 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 2 All Rights Reserved. SY7302 Electrical Characteristics (VIN = 5V, VOUT=12V, IOUT=100mA, TA = 25°C unless otherwise specified) Symbol VIN IQ ISHDN Rds(on) Test Conditions Min 3 有 限 ILIM1 0.588 科 VIN,UVLO 思 达 UVLO,HYS TSD Unit V µA µA mΩ A 1 0.6 0.612 MHz V 2.1 V 0.1 150 V °C 1.5 0.4 90 V V % 深 圳 市 品 VENH VENL Max 33 2 技 Fsw VREF Typ 100 5 200 司 VFB=0.66V EN=0 公 Parameter Input Voltage Range Quiescent Current Shutdown Current Low Side Main FET RON Main FET Current Limit Switching Frequency Feedback Reference Voltage IN UVLO Rising Threshold UVLO Hysteresis Thermal Shutdown Temperature EN Rising Threshold EN Falling Threshold Max Duty Cycle tia l-F or Note 1: Stresses beyond “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. on fid en Note 2: θ JA is measured in the natural convection at T A = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Test condition: Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground plane. Sil erg yC Note 3: The device is not guaranteed to function outside its operating conditions. AN_SY7302 Rev. 1.0 © 2018 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 3 All Rights Reserved. SY7302 Typical Performance Characteristics Load Transient Efficiency vs. Input Voltage (VIN=5V, VOUT=12V,Iload=0.1~0.5A) VIN=5V,VOUT=12V VOUT(AC) 92 (0.2V/div) 司 90 公 88 有 限 Efficiency (%) 94 Io 86 (0.5A/div) 0 0.1 0.2 0.3 0.4 0.5 技 84 Load Current (A) 科 Output Ripple 思 达 (VIN=5V, VOUT=12V,Iload=0.5A) Output Ripple (VIN=5V, VOUT=12V,Iload=0.2A) VO(AC) (20mV/div) 圳 市 品 VO(AC) (20mV/div) Time(100us/div) IL (0.5A/div) l-F or 深 VLX (10V/div) Time(400ns/div) VLX (5V/div) IL (0.5A/div) Time(400ns/div) Output Ripple on fid VO(AC) (20mV/div) en tia (VIN=5V, VOUT=12V,Iload=0.04A) Sil erg yC VLX (5V/div) IL (0.5A/div) AN_SY7302 Rev. 1.0 © 2018 Silergy Corp. Time(40us/div) Silergy Corp. Confidential- Prepared for Customer Use Only 4 All Rights Reserved. SY7302 Startup from Enable Shutdown from Enable f=10Hz, VIN=5V,VOUT=12V,IO=0.5A f=10Hz, VIN=5V,VOUT=12V,IO=0.5A VEN VEN 5V/div 0.2A/div VLX 5V/div 公 IO VOUT 司 5V/div 有 限 VOUT 5V/div 0.2A/div VLX 5V/div Time (100us/div) 科 技 Time (100us/div) 5V/div IO Startup from VIN 10V/div 10V/div IO 0.5A/div l-F or VLX 品 VOUT 圳 市 2V/div 深 VIN 思 达 VIN=5V,VOUT=12V,IO=0.5A VIN=5V,VOUT=12V,IO=0.5A VIN 2V/div VOUT 10V/div VLX 10V/div IO 0.5A/div Time (2ms/div) Sil erg yC on fid en tia Time (2ms/div) Shudown from VIN AN_SY7302 Rev. 1.0 © 2018 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 5 All Rights Reserved. SY7302 current to be about 40% of the maximum average input current. The inductance is calculated as: Applications Information (VOUT  VIN)  VIN  L   VOUT  FSW  IOUT, MAX  40% 2 Because of the high integration in the SY7302 IC, the application circuit based on this regulator IC is rather simple. Only input capacitor CIN, output capacitor COUT, inductor L and feedback resistors (R1 and R2) need to be selected for the targeted applications specifications. 司 where FSW is the switching frequency and IOUT,MAX is the maximum load current. Feedback resistor dividers R1 and R2: Choose R1 and R2 to program the proper output voltage. To minimize the power consumption under light loads, it is desirable to choose large resistance values for both R1 and R2. A value of between 10k and 1M is recommended for both resistors. If R1=200k is chosen, then R2 can be calculated to be: R1 品 0.6VFB R2 圳 市 GND 深 Input capacitor CIN: The ripple current through input capacitor is calculated as: VIN  (VOUT  VIN) 2 3  L  FSW  VOUT l-F or ICIN_RMS  on fid en tia To minimize the potential noise problem, place a typical X5R or better grade ceramic capacitor really close to the IN and GND pins. Care should be taken to minimize the loop area formed by CIN, and IN/GND pins.In this case a 10uF low ESR ceramic is recommended. Sil erg yC Output capacitor COUT: The output capacitor is selected to handle the output ripple noise requirements. Both steady state ripple and transient requirements must be taken into consideration when selecting this capacitor. For the best performance, it is recommended to use X5R or better grade ceramic capacitor with 50V rating and more than 22uF capacitance. Boost inductor L: There are several considerations in choosing this inductor. 1) Choose the inductance to provide the desired ripple current. It is suggested to choose the ripple AN_SY7302 Rev. 1.0 © 2018 Silergy Corp. 公 有 限 技 思 达 VOUT 2) The saturation current rating of the inductor must be selected to be greater than the peak inductor current under full load conditions. 科 R2  (R1  0.6V)/(VOUT  0.6V) The SY7302 regulator IC is quite tolerant of different ripple current amplitude. Consequently, the final choice of inductance can be slightly off the calculation value without significantly impacting the performance. VIN(VOUT  VIN)  VOUT  ISAT,MIN     IOUT_MAX  2  FSW  L  VOUT  VIN  3) The DCR of the inductor and the core loss at the switching frequency must be low enough to achieve the desired efficiency requirement. It is desirable to choose an inductor with DCR
SY7302ABC 价格&库存

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SY7302ABC
    •  国内价格
    • 1+1.42560
    • 10+1.39320
    • 30+1.37160
    • 100+1.35000

    库存:5137

    SY7302ABC
    •  国内价格
    • 1+7.99700
    • 100+6.66600
    • 750+6.16000
    • 1500+5.87400
    • 3000+5.59900

    库存:2

    SY7302ABC
    •  国内价格
    • 1+1.70100
    • 10+1.57010
    • 100+1.43940
    • 1000+1.30850

    库存:12000