AZ4217-01F

AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Features over-voltage on the control/data lines, protecting any downstream components.
ESD Protection for 1 Line with Bi-directional
Provide ESD protection for the protected line to AZ4217-01F is bi-directional and may be used on IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) lines where the signal swings above and below
Ultra low capacitance: 0.5pF typical ground.
Suitable for, 17V and below, operating voltage applications AZ4217-01F may be used to meet the ESD
0402 small DFN package saves board space immunity requirements of IEC 61000-4-2, Level 4
Protect one I/O line (±15kV air, ±8kV contact discharge).
Fast turn-on and Low clamping voltage
Solid-state silicon-avalanche and active circuit Circuit Diagram / Pin Configuration triggering technology
Green Part Applications
Antenna applications
Hand Held Portable Applications
Desktop and Notebooks PCs
Consumer Applications 1 2 Description AZ4217-01F is a design which includes a DFN1006P2E (Bottom View) bi-directional ESD rated clamping cell to protect high speed data interfaces in an electronic systems. The AZ4217-01F has been specifically designed to protect sensitive components which are connected to data and transmission lines from over-voltage caused by Electrostatic Discharging (ESD). AZ4217-01F is a unique design which includes proprietary clamping cells with ultra low capacitance in a small package. During transient conditions, the proprietary clamping cells prevent Revision 2015/01/29 ©2015 Amazing Micro. 1 www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNITS Operating DC Voltage (I/O to GND) VDC ±18 V ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) VESD ±15 ±8 kV kV Lead Soldering Temperature TSOL 260 (10 sec.) o -40 to +85 o -55 to +150 o Operating Temperature TOP Storage Temperature TSTO C C C ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL CONDITIONS Stand-Off Voltage VRWM Leakage Current Breakdown Voltage ESD Clamping Voltage MAX UNITS T=25 oC, I/O to GND, or GND to I/O. 17 V ILeak VRWM = 17V, T=25 oC, I/O to GND, or GND to I/O. 1 µA VBV IBV = 1mA, T=25 oC, I/O to GND, or GND to I/O. Input Capacitance TYP 18.7 V IEC 61000-4-2, 6kV Vclamp ESD Dynamic Turn-on Resistance MINI Contact mode, T=25 oC, I/O to GND, or GND to I/O. 45 V 1.3 Ω IEC 61000-4-2, 0~6kV, Rdynamic CIN Contact mode, T=25 oC, I/O to GND, or GND to I/O. VR = 0V, f = 1MHz, T=25 oC, I/O to GND. Revision 2015/01/29 ©2015 Amazing Micro. 2 0.5 0.65 pF www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Typical Characteristics Typical Variation of CIN vs. VIN 0.60 0.55 Input Capacitance (pF) 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 f = 1MHz, T=25 oC, 0.10 0.05 0.00 -18 -15 -12 -9 -6 -3 0 3 6 9 12 15 18 Transmission Line Pulsing (TLP) Current (A) Input Voltage (V) Transmission Line Pulsing (TLP) Measurement 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 V_pulse Pulse from a transmission line TLP_I 100ns + TLP_V DUT - -50 -40 -30 -20 -10 0 10 20 30 40 50 Transmission Line Pulsing (TLP) Voltage (V) Revision 2015/01/29 ©2015 Amazing Micro. 3 www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Applications Information The AZ4217-01F is designed to protect one line In order to obtain enough suppression of ESD against System ESD pulse by clamping it to an induced transient, good circuit board is critical. acceptable reference. It provides bi-directional Thus, the following guidelines are recommended: protection.
Minimize the path length between the protected lines and the AZ4217-01F. The usage of the AZ4217-01F is shown in Fig. 1.
Place the AZ4217-01F near the input Protected line, such as data line, control line, or terminals or connectors to restrict transient power line, is connected at pin 1. The pin 2 is coupling. connected to a ground plane on the board. In
order to minimize parasitic inductance in the The ESD current return path to ground should be kept as short as possible. board traces, all path lengths connected to the
Use ground planes whenever possible. pins of AZ4217-01F should be kept as short as
NEVER route critical signals near board possible. edges and near the lines which the ESD transient easily injects to. Input Output VBR Transient Voltage -VBR VCL gnd gnd -VCL VBR Normal Operation -VBR gnd gnd 1 2 2 AZ4217-01F 1 AZ4217-01F Protected Devices Fig. 1 Revision 2015/01/29 ©2015 Amazing Micro. 4 www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Fig. 2 shows another simplified example of using speed data line, and power line from ESD AZ4217-01F to protect the control line, high transient stress. VDD Control Line 2 2 AZ4217-01F 2 1 1 AZ4217-01F Chip-C 1 Chip-A High Speed Data Line AZ4217-01F Chip-B GND Fig. 2 Revision 2015/01/29 ©2015 Amazing Micro. 5 www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Mechanical Details LAND LAYOUT 0.30 DFN1006P2E PACKAGE DIAGRAMS 0.55 A 0.60 B 1.40 TOP VIEW (Unit: mm) Notes: This LAND LAYOUT is for reference purposes only. Please consult your manufacturing partners to ensure your company’s PCB design guidelines are met. C SIDE VIEW D E MARKING CODE F 45 O B 0.05 0.125 BOTTOM VIEW Symbol Millimeters Inches min max min max A 0.95 1.05 0.037 0.041 B 0.55 0.65 0.022 0.026 C 0.45 0.60 0.018 0.024 D 0.45 Part Number Marking Code AZ4217-01F B (Green Part) 0.018 E 0.20 0.30 0.008 0.012 F 0.45 0.55 0.018 0.022 Revision 2015/01/29 ©2015 Amazing Micro. Note : Green means Pb-free, RoHS, and Halogen free compliant. 6 www.amazingIC.com AZ4217-01F Ultra Low Capacitance ESD Protection Device 0402 DFN Package for ESD Protection Ordering Information PN# Material Type AZ4217-01F.R7GR Green T/R Reel size MOQ MOQ/internal box MOQ/carton 7 inch 12,000/reel 4 reel=48,000/box 6 box=288,000/carton Revision History Revision Modification Description Revision 2010/01/05 Preliminary Release. Revision 2010/03/15 Update the dimensions in Package Diagrams and Land Layout. Revision 2010/07/05 Formal Release. Revision 2010/07/07 Update the dimension tolerances of E, F, in the Package Diagrams. Revision 2010/07/13 In Package Diagrams, add the tolerant values for “A” and “B”. Revision 2011/07/28 1. Update the Company Logo. 2. Add the Ordering Information. Revision 2014/09/10 1. Update the dimension tolerances of C in the Package Diagrams. 2. Update the Ordering Information. Revision 2015/01/29 Update the Ordering Information. Revision 2015/01/29 ©2015 Amazing Micro. 7 www.amazingIC.com