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TPS65573DSSR

TPS65573DSSR

  • 厂商:

    ROCHESTER(罗切斯特)

  • 封装:

    WFDFN12_EP

  • 描述:

    SWITCHED CAPACITOR CONVERTER

  • 数据手册
  • 价格&库存
TPS65573DSSR 数据手册
Not Recommended for New Designs TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 INTEGRATED PHOTO FLASH CHARGER AND IGBT DRIVER FEATURES 1 • Wide Input Voltage – VBAT = 1.4 V to 12 V – VCC = 2.5 V to 5.5 V • Integrated 50-V Power Switch With Lower RON • Programmable Peak Current at Primary Side From 0.5 A to 1.5 A • Optimized Switch ON/OFF Control for Fast Charging • Charge Complete Detection at Primary Side With High Accuracy • Integrated IGBT Driver • 2-mm × 3-mm, 12-Pin WSON Package • Protection – Overcurrent Protection (OCP) – Thermal Shutdown (TSD) 2 APPLICATIONS • • • • Digital Still Cameras Optical Film Cameras Digital Video Camcorders Cell Phones DESCRIPTION/ORDERING INFORMATION The TPS65573 offers a complete solution for a charging photo flash capacitor and flashing xenon tube with insulated gate bipolar transfer (IGBT) driver. This device has an integrated voltage reference, power (SW), comparators for peak current detection/power SW turnon detection/charge complete detection, IGBT driver and control logics for charging applications/driving IGBT applications. Compared with discrete solutions, this device reduces the component count, shrinks the total solution size, and erases the difficulty of design for xenon tube application. Additional advantages are a fast charging time and high efficiency since this device has an optimized pulse width modulation (PWM) control algorithm for photo flash charging. Also this device has high accuracy for peak current detection and for charge completion detection. The distribution of charging time is smaller. Other provisions of the device include sensing the output voltage at the primary side, programmable peak current at the primary side, protection features (thermal shutdown and overcurrent), an output pin for charge completion detection, input pins for charge enable, flash acceptable, and flash on. Figure 1. Application Circuit 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated Not Recommended for New Designs TPS65573 SLVS868 – MARCH 2009................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PACKAGE (1) (2) TA –35°C to 85°C (1) (2) ORDERABLE PART NUMBER TPS65573DSST WSON TPS65573DSSR TOP-SIDE MARKING TRANSPORT MEDIA, QUANTITY Tape and Reel, 250 CVR Tape and Reel, 3000 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT Supply voltage range VCC –0.6 to 6 VBAT –0.6 to 13 VSW Switch terminal voltage range ISW Switch current between SW and GND VI Input voltage range Tstg Storage temperature range TJ Maximum junction temperature (1) CHG, I_PEAK, and F_ON V –0.6 to 50 V 2 A –0.3 to VCC V –40 to 150 °C 125 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS MIN MAX Supply voltage VCC 2.5 5.5 VBAT 1.4 12 VSW Switch terminal voltage ISW Switch current between SW and GND –0.3 Operating free-air temperature –35 VIH High-level digital input voltage at CHG and F_ON 1.5 VIL Low-level digital input voltage at CHG and F_ON UNIT 45 V V 1.5 A 85 °C V 0.5 V DISSIPATION RATINGS (1) 2 PACKAGE RθJA (1) POWER RATINGS TA < 25°C POWER RATINGS RATE TA = 85°C DFN 54.5°C/W 1.84 W 0.74 W The thermal resistance, RθJA, is based on a soldered PowerPAD™ package on a 2S2P JEDEC board using thermal vias. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 Not Recommended for New Designs TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 ELECTRICAL CHARACTERISTICS TA = 25°C, VBAT = 4.2 V, VCC = 3 V, V(SW) = 4.2 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 140 200 µA 2 3 mA ICC1 Supply current from VBAT V(CHG) = VCC, V(F_ON) = GND, V(F_EN)= GND, XFULL = Hi-Z ICC2 Supply current from VCC V(CHG) = VCC, V(F_ON) = GND, V(F_EN) = GND, XFULL = Hi-Z ICC3 Supply current from VCC and VBAT V(CHG) = GND, V(F_ON) = GND, V(F_EN) = GND 1 µA ILKG1_SW Leakage current at SW V(SW) = 4.2 V 2 µA ILKG2_SW Leakage current at SW V(SW) = 45 V 600 µA Isink Sink current at I_PEAK VCC = V(I_PEAK) = 3 V 0.1 µA IPEAK1 Lower point of Peak current detection V(I_PEAK )= 0.1V 0.38 0.58 0.78 A IPEAK2 Middle point of Peak current detection V(I_PEAK) = 0.65 V 0.84 1.04 1.24 A IPEAK3 Upper point of Peak current detection V(I_PEAK) = 1.5 V 1.30 1.50 1.70 RON_XFULL ON resistance between XFULL and GND I(XFULL) = 1 mA 1.5 3 kΩ RON_SW ON resistance between SW and GND I(SW) = 1 A, VCC = 3 V 0.4 0.7 Ω RG_IGBT_N G_IGBT_N ON resistance V(G_IGBT_N) = GND 3 5 7.5 Ω RG_IGBT_P G_IGBT_P ON resistance V(G_IGBT_P) = 3 V 3 5 7.5 Ω RINPD Pulldown resistance of CHG, F_ON and F_EN V(CHG), V(F_ON), V(F_EN) = VCC TSD (1) Thermal shutdown detection temperature 100 140 150 A kΩ 160 °C V VFULL Charge completion detection voltage at SW VBAT + VBAT + VBAT + 28.6 29.0 29.4 VZERO Zero current detection at SW VBAT + VBAT + VBAT + 10m 25m 40m V VOCP Over current protection trigger voltage at SW VBAT – VBAT – VBAT – 150m 100m 50m V (1) Specified by design SWITCHING CHARACTERISTICS TA = 25°C, VBAT = 4.2 V, VCC = 3 V, VSW = 4.2 V (unless otherwise noted) PARAMETER TEST CONDITIONS G_IGBT turns high/low after F_ON turns high/low tPD (1) Propagation delay TYP MAX UNIT 25 SW OFF after ISW exceeds the threshold defined by I_PEAK 150 XFULL turns Low after VSW exceeds VFULL 200 SW ON after CHG turns high (1) MIN 50 ns 150 µs Specified by design Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 3 Not Recommended for New Designs TPS65573 SLVS868 – MARCH 2009................................................................................................................................................................................................... www.ti.com PIN ASSIGNMENT (BOTTOM VIEW) TERMINAL FUNCTIONS TERMINAL 4 I/O DESCRIPTION F_EN I Flash Acceptable input. High level is acceptable to Xenon Flash on with F_ON pin. Low level is to force Disable of Xenon Flash on in spite of F_ON being High. 2 F_ON I Flash enable/disable. High level is xenon flash on with F_EN being high. Low level is xenon flash off even if F_EN is high. 3 CHG I Charge enable/disable input. Drive CHG high to start charging the output capacitor. Drive CHG low to terminate charging. 4 I_PEAK I Primary-side peak current control input. The voltage at I_PEAK sets the peak current into SW. See the Programming Peak Current section for details on selecting VI_PEAK. 5 VBAT I Battery voltage monitor input for detecting OFF timing of power MOSFET. Connect VBAT pin to an input voltage from battery. The arrowable range is from 1.4 V to 12 V. Bypass VBAT to GND with a 10 µF ceramic capacitor as close to the IC as possible. 6 SW O Primary-side power MOSFET switch. Connect SW to the switched side of the transformer. 7 GND – Ground for power and IC internal cicruits. Connect to the ground plane. 8 TEST_GND – Used by TI, should be connected to GND and ground plane 9 G_IGBT_N O IGBT gate driver output for turning off G_IGBT swings from VCC to GND to drive external IGBT devices. The external resistor should be needed at outside. The value depends on the characteristics of IGBT. 10 G_IGBT_P O IGBT gate driver output for turning on G_IGBT swings from GND to VCC to drive external IGBT devices. The external resistor should be needed at outside. The value depends on the characteristics of IGBT. 11 VCC I Power supply. VCC is the gate drive supply and IC supply. The allowable range is from 2.7 V to 5.5 V. Bypass VCC to GND with a 1-µF ceramic capacitor as close to the IC as possible. 12 XFULL O Charge completion indicator output. XFULL is an open-drain output that pulls low once the output is fully charged. XFULL is high impedance during charging and all fault conditions. The recovery condition from Low to High is to turn Low at CHG pin only. NO. NAME 1 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 Not Recommended for New Designs TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 Figure 2. Block Diagram CHG, F_ON, F_EN SW I_PEAK XFULL VBAT G_IGBT_P, G_IGBT_N Figure 3. I/O Equivalent Circuit Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 5 TPS65573 Not Recommended for New Designs SLVS868 – MARCH 2009................................................................................................................................................................................................... www.ti.com PRINCIPLES OF OPERATION Figure 4. Charging Sequence Chart Start/Stop Charging The TPS65573 has an enable/disable pin for charging (CHG). The only way to start charging is to input a high-level signal into CHG (see A and C in Figure 2). This high level is latched by internal D-FF shown in Figure 2. The internal enable (ENA) signal goes up with some delay, which is specified as SW ON after CHG↑ in Switching Characteristics. This is to avoid the wrong operation with a pulsed noise at CHG. To • • • stop charging, there are three trigger events: Forced stop by inputting a low level at CHG (see B in Figure 4) Automatic stop by detecting a full charge. VOUT reaches the target value (see D in Figure 4). Protected stop by detecting an overcurrent protection (OCP) on the SW pin When the host inputs the high-level signal into CHG, the voltage of VCC and VBAT must meet the recommended range; VBAT is from 1.4 V to12 V, VCC is from 2.5 V to 5.5 V. It is acceptable to start recharging after a forced stop controlled by CHG (see C in Figure 4). Charging Status Indication When the charging operation is complete, the TPS65573 drives the charge completion indicator pin, XFULL, to a low level. A controller can detect the status of the device as a logic signal when it is connected through a pullup resistor (R1) (see Figure 1). The only way to reset the indication at XFULL is to input a low level into CHG (see Figure 4). The XFULL output enables the controller to find the device-protected situation. If overcurrent protection (OCP) occurs, XFULL never goes to a low level when CHG is at a high level. Therefore, the controller detects OCP by measuring the time from turning CHG to a high level to turning XFULL to a low level. If the duration is longer than the maximum designed charge time, OCP occurs. 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 Not Recommended for New Designs TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 Charging Control Figure 5 shows a timing diagram at beginning/ending. The TPS65573 provides three comparators to control the charging operation. U1 is the VFULL comparator to detect the charge completion, U2 is the VZERO comparator to detect the turn-on time of the power SW, and U3 is the IPEAK comparator to detect the turn-off time of the power SW. Figure 5. Beginning/Ending Timing While the power SW is ON, the IPEAK comparator (U3) monitors current flow through the power SW from SW to GND. When the current at SW (ISW) exceeds the threshold defined by the voltage of the I_PEAK pin (IPEAK), the power SW turns OFF. After the power SW turns OFF, the spike voltage occurs immediately because of leakage inductance at the primary side. It might cause the power SW to break. To avoid this, the leakage inductance should be reduced as much as possible. When the power SW is OFF, the magnetic energy in the transformer starts discharging from the primary side to the secondary side. During this discharge, the VZERO comparator (U2) monitors the kickback voltage at the primary side to compare it with the VBAT voltage. The kickback voltage increases rapidly until the diode placed at secondary side turns ON. The diode turns ON when the voltage of secondary side of the transformer reaches more than the voltage of the output capacitor. After the diode turns ON, the kickback voltage is almost stable until the magnetic energy at the primary side discharges completely. After the discharge stops, the small amount of energy left in the transformer is released via parasitic paths, and the kickback voltage reaches almost zero voltage. During this period, U2 makes the power SW turn ON when (VSW – VBAT) drops from VZERO. The VFULL comparator (U1) also monitors the kickback voltage. When VSW – VBAT exceeds VFULL, the TPS65573 stops the charging operation. After detection, XFULL goes to low level to indicate charge completion. After charge completion, the TPS65573 immediately goes into disable mode with the internal ENA automatically turning to a low level. The purpose is to save the consumption power. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 7 Not Recommended for New Designs TPS65573 SLVS868 – MARCH 2009................................................................................................................................................................................................... www.ti.com In Figure 5, ON time is almost the same period in every switch cycle. But the current at SW always starts from negative value because of the Trr of the diode. Because of this, ON time depends on Trr. ON time is calculated by Equation 1. I PEAK TON ( n ) = Lp + Trr (n) VBAT (1) Where: TON(n) = ON time at n cycle switching Lp = Inductance of primary side IPEAK = Peak current at primary side VBAT = Battery voltage Trr(n) = Reverse recovery time at n cycle switching OFF time is dependant on output voltage. As the output voltage gets higher, OFF time gets shorter (see Equation 2). TOFF(n) = N ´ L I PEAK VOUT(n ) (2) Where: TOFF(n) = OFF time at n cycle switching N= Turn ration of transformer VOUT(n) = Output voltage at n cycle switching Programming Peak Current The TPS65573 provides a method to program the peak primary current with a voltage applied to the I_PEAK pin. Figure 6 shows how to program IPEAK. Figure 6 shows the relationship between I_PEAK pin voltage and a peak current at the primary side. This function has the analog slope controlled by I_PEAK. The maximum voltage to control peak current at the primary side is around 1.2 V. Figure 6. I_PEAK Pin Voltage vs Peak Current at Primary Side 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 Not Recommended for New Designs TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 Typical usages of this function are: • Setting the peak charging currents based on the battery voltage. The easiest way is to connect a resistive divider with battery voltage. This saves battery life. • Reducing peak current at the primary side when the system powers a zoom-lens motor. This avoids inadvertent shutdowns due to a large current from the battery. In Figure 1, three optional connections to I_PEAK are shown: 1. Use the controller to input PWM signal with RC filter. 2. Use a digital-to-analog converter (DAC). 3. Use a resistive divider to input a fixed value into I_PEAK. Methods 1 and 2 make it possible to delicately control peak current at the primary side. For example, set higher current during initial charging, but set lower current just before complete charging. This effectively saves the battery life. IGBT Driver Control The TPS65573 integrates an IGBT driver for flashing the xenon tube. After charge completion, the xenon tube allows turnon with the IGBT driver. If the earlier flashing is needed before charge completion, the confirmation of the lowest allowable flashing voltage to apply to the xenon tube is required. G_IGBT should be connected to the gate of IGBT as close as possible to avoid the misoperation of flashing or breaking the gate of IGBT. The output voltage of G_IGBT voltage depends on IGBT_VCC. The rise time and fall time of G_IGBT are almost the same because the TPS65573 does not include a pullup/pulldown resistor for the IGBT driver. The rise time and fall time should be met with the value specified in the data sheet of the IGBT to avoid breaking the IGBT. The IGBT drive hasone logic input, named F_ON. To turn on the xenon tube, high-level signal should be inputted into both F_ON. Protection The TPS65573 provides two protection mechanisms; thermal shutdown and overcurrent protection. Thermal Shutdown (TSD) Once the TPS65573 die temperature reaches a specific temperature, the operation is immediately latched off. To recover the operation, the TPS65573 die temperature should be lower than a specific temperature and forced to a low level at CHG if protection is needed. Overcurrent Protection (OCP) The TPS65573 has OCP at the SW pin. The TPS65573 is latched off if the SW pin is dropped to compare VBAT pin voltage during the switch ON time. The threshold is specified in Overcurrent Protection Trigger Voltage at SW in Electrical Characteristics. To recover the operation, the CHG level is forced to a low level after protection occurs and peak current is less than threshold. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65573 9 PACKAGE OPTION ADDENDUM www.ti.com 13-Dec-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TPS65573DSSR NRND WSON DSS 12 TBD Call TI Call TI -35 to 85 CVR TPS65573DSST NRND WSON DSS 12 TBD Call TI Call TI -35 to 85 CVR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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