GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide Input Voltage Range and Reverse Current Blocking
Product Specification
DESCRIPTION
FEATURES
The GLF1511 load switch is a fully integrated 4 A
NMOS load switch with IQSmartTM advanced
technology. The device is ideal for the mobile
computing and data storage markets as a high
performance solution for load switch applications.
The GLF1511 provides a constant low onresistance of 13 mΩ at the full input voltage
range. The fixed rise time helps prevent
undesirable inrush current when turned on and
the internal EN pin pulldown resistor ensures the
device remains in the shutdown mode when
disabled. In shutdown mode the GLF1511
consumes ultra-low current at the wide input
supply voltage.
The GLF1511 features a reverse current blocking
protection. When the GLF1511 is disabled, it
prevents reverse current flowing from the output
to the input source.
The GLF1511 is available in a wafer level chip
scale package (WLCSP) measuring 0.97 mm x
1.47 mm x 0.55 mm with a 0.5 mm pitch. This
allows the user to save board space.
Supply Voltage Range: 0.7 V to 5.5 V
Low RON: 13 mΩ Typ
IOUT Max: 4 A
Ultra-Low IQ:
o 2 μA Typ at 0.7 VIN
o14 μA Typ at 3.3 VIN
o30 μA Typ at 5.5 VIN
Ultra-Low ISD:
o0.015 μA Typ at 0.7 VIN
o0.030 μA Typ at 5.5 VIN
Controlled VOUT Turn-on Time
Internal EN Pull-Down Resistor
Integrated Output Discharge Switch
Reverse Current Blocking Protection When
Disabled
Operating Temperature Range: - 40 °C to
105 °C
HBM: 8 kV, CDM: 2 kV
0.97 mm x 1.47 mm x 0.55 mm, 6 Bumps Wafer
Level Chip Scale Package
APPLICATIONS
Data Storage, SSD
Wearables
Low Power Subsystems
PACKAGE
0.97 mm x 1.47 mm x 0.55 mm, 0.5 mm Pitch
Rev.0.0 Feb 2023
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Page 1
GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
APPLICATION DIAGRAM
DEVICE ORDERING INFORMATION
Part Number
Top Mark
RON Typ.
at Vin Range
Output
Discharge
EN
Activity
GLF1511
FL
13 mΩ
250 Ω
High
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
PIN CONFIGURATION
PIN DEFINITION
Pin #
Name
A1, B1
VOUT
A2, B2
VIN
C1
GND
C2
EN
Description
Switch Output
Switch Input. Supply Voltage
for IC
Ground
Enable to control the switch
Figure 2. 0.97 mm x 1.47 mm x 0.55 mm WLCSP
Rev.0.0 Feb 2023
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Page 2
GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
ABSOLUTE MAXIMUM RATINGS
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above
the recommended operating conditions; extended exposure to stresses above the recommended operating conditions may affect
device reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VIN, VOUT, VEN Each Pin Voltage Range to GND
Min.
Max.
Unit
-0.3
6
V
4
A
IOUT
Maximum Continuous Switch Current
PD
Power Dissipation at TA = 25 °C
1
W
TSTG
Storage Junction Temperature
-65
150
°C
Operating Temperature Range
Thermal Resistance, Junction to Ambient (board dependent)
Human Body Model, JESD22-A114
Electrostatic Discharge Capability
Charged Device Model, JESD22-C101
-40
105
85
°C
°C/W
TA
θJA
ESD
8
2
kV
RECOMMENDED OPERATING CONDITIONS
Over operating temperature, unless otherwise noted
Symbol
VIN
VOUT
Parameter
Input Supply Voltage
Output Voltage Range
Min.
Max.
Unit
0.7
0
5.5
5.5
V
V
ELECTRICAL CHARACTERISTICS
VIN = 0.7 V to 5.5 V and TA = 25 °C unless otherwise noted.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
Basic Operation
IQ
Quiescent Current
EN = VIN, IOUT= 0 mA, VIN = 0.7 V
2
EN = VIN, IOUT= 0 mA, VIN = 1.0V
2.5
EN = VIN, IOUT= 0 mA, VIN = 2.5 V
9
EN = VIN, IOUT= 0 mA, VIN = 3.3 V
14
EN = VIN, IOUT= 0 mA, VIN = 5.5 V
EN = VIN, IOUT= 0 mA, VIN = 5.5 V
30
TA= 85 °C
0.015
EN = Disable, IOUT= 0 mA, VIN= 5.5 V
Shutdown Current
EN = Disable, IOUT= 0 mA, VIN= 5.5 V
0.030
TA= 85 °C
0.83
(1)
TA= 105 °C
2.85
(1)
TA= 25 °C
RON
On-Resistance
VIN=0.7 V to 5.5 V, IOUT= 200 mA
TA= 85 °C
13
Output Discharge Resistance
VIH
EN Input Logic High Voltage
mΩ
17
VEN = Low , IFORCE= 2 mA
250
VIN = 0.7 V to 1.5 V
1.1
VIN = 1.5 V to 5.5 V
0.5
Ω
VIN = 0.7 V to 1.5 V
0.15
VIN = 1.5 V to 5.5 V
0.3
VIL
EN Input Logic Low Voltage
REN
EN pull-down resistance
VEN = 3.3 V
IEN
EN Current
VEN = 5.5 V
Rev.0.0 Feb 2023
20
16
(1)
TA= 105 °C (1)
RDSC
μA
105
(1)
EN = Disable, IOUT= 0 mA, VIN= 0.7 V
ISD
50
54
(1)
TA= 105 °C
4
Copyright © 2023 GLF Integrated Power. All Rights Reserved.
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10
V
MΩ
0.8
μA
Page 3
GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
Switching Characteristics (1), (2)
VIN = 0.7 V, TA =25 °C
tdON
Turn-On Delay
tR
VOUT Rise Time
tdOFF
Turn-Off Delay
tF
VOUT Fall Time
145
RL=150 Ω, CIN=1.0 µF, COUT=0.1 µF
190
38
μs
17
VIN = 1.1 V, TA =25 °C
tdON
Turn-On Delay
tR
VOUT Rise Time
tdOFF
Turn-Off Delay
tF
VOUT Fall Time
120
RL=150 Ω, CIN=1.0 µF, COUT=0.1 µF
240
8
μs
18
VIN = 2.5 V, TA =25 °C
tdON
Turn-On Delay
tR
VOUT Rise Time
tdOFF
Turn-Off Delay
tF
VOUT Fall Time
90
RL=150 Ω, CIN=1.0 µF, COUT=0.1 µF
310
2
μs
18
VIN = 3.3 V, TA =25 °C
tdON
Turn-On Delay
80
tR
VOUT Rise Time
360
tdOFF
Turn-Off Delay
tF
VOUT Fall Time
RL=150 Ω, CIN=1.0 µF, COUT=0.1 µF
1.5
μs
18
VIN = 5.0 V, TA =25 °C
tdON
Turn-On Delay
tR
VOUT Rise Time
tdOFF
Turn-Off Delay
tF
VOUT Fall Time
70
RL=150 Ω, CIN=1.0 µF, COUT=0.1 µF
360
1.5
μs
18
Notes: 1. By design; characterized, not production tested.
2. tON = tdON + tR, tOFF = tdOFF + tF
TIMING DIAGRAM
Figure 3. Timing Diagram
Rev.0.0 Feb 2023
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. On-Resistance vs. Supply Voltage
Figure 5. Quiescent Current vs. Temperature
Figure 6. Shutdown Current vs. Temperature
Figure 7. Output Discharge Resistance vs. Temperature
Figure 8. EN Input Logic High Threshold vs. Temperature
Rev.0.0 Feb 2023
Figure 9. EN Input Logic Low Threshold vs.
Temperature
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
EN [2V / Div]
VOUT [1V / Div]
EN [2V / Div]
200 μs/div
Figure 10. Turn-On Response
VIN=0.7 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
EN [2V / Div]
VOUT [1V / Div]
200 μs/div
EN [2V / Div]
Figure 11. Turn-Off Response
VIN=0.7 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
VOUT [1V / Div]
10 μs/div
Figure 13. Turn-Off Response
VIN=1.1 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
EN [2V / Div]
200 μs/div
Figure 14. Turn-On Response
VIN=2.5 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
Rev.0.0 Feb 2023
10 μs/div
EN [2V / Div]
Figure 12. Turn-On Response
VIN=1.1 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
VOUT [1V / Div]
VOUT [1V / Div]
VOUT [1V / Div]
10 μs/div
Figure 15. Turn-Off Response
VIN=2.5 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
EN [2V / Div]
VOUT [1V / Div]
EN [2V / Div]
200 μs/div
Figure 16. Turn-On Response
VIN=3.3 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
EN [2V / Div]
VOUT [1V / Div]
VOUT [1V / Div]
10 μs/div
Figure 17. Turn-Off Response
VIN=3.3 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
EN [2V / Div]
200 μs/div
Figure 18. Turn-On Response
VIN=5.0 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
VOUT [1V / Div]
10 μs/div
Figure 19. Turn-Off Response
VIN=5.0 V, CIN=1.0 µF, COUT=0.1 µF, RL=150 Ω
VOUT [1V / Div]
I_reverse [100mA / Div]
VIN [1V / Div]
40 ms/div
Figure 20. Reverse Current Blocking When Disabled
VIN=VEN=0 V, VOUT=0 V to 4.5 V, CIN=1.0 µF, COUT=0.1 µF
Rev.0.0 Feb 2023
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
APPLICATION INFORMATION
The GLF1511 is a fully integrated 4 A NMOS load switch with fixed slew rate control to limit the inrush
current during turn on. Each device is capable of operating over a wide input range from 0.7 V to 5.5 V
with very low on-resistance to reduce conduction loss. In the off state, these devices consume very low
leakage current, avoiding unwanted standby current from the input power supply. The GLF1511 is
available in the 0.97 mm x 1.47 mm wafer level chip scale package with 6 bumps at 0.5 mm pitch to save
space in compact applications.
Input Capacitor
A capacitor is recommended to be placed close to the VIN pin to reduce the voltage drop on the input
power rail caused by transient inrush current at start-up. A higher input capacitor value can be used to
further attenuate the input voltage drop.
Output Capacitor
An output capacitor is recommended to minimize voltage undershoot on the output pin during the
transition when the switch is turned off. Undershoot can be caused by parasitic inductance from board
traces or intentional load inductances. If load inductances do exist, use of an output capacitor can improve
output voltage stability and system reliability. The COUT capacitor should be placed close to the VOUT and
GND pins.
Reverse Current Blocking
The GLF1511 has a built-in reverse current blocking protection. When the device is disabled, the reverse
current blocking protection is activated to prevent the reverse current from the Vout to the Vin source.
EN pin
The GLF1511 can be activated by EN pin high. Note that the EN pin has an internal pull-down resistor to
maintain a reliable status without EN signal applied from an external controller.
Board Layout
All traces should be as short as possible to minimize parasitic inductance effect. Wide traces for VIN,
VOUT, and GND will help reduce signal degradation and parasitic effects during dynamic operations as
well as improve the thermal performance at high load current.
Rev.0.0 Feb 2023
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
PACKAGE OUTLINE
Notes
1. ALL DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGRESS)
2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1994.
3. A3: BACKSIDE LAMINATION
Rev.0.0 Feb 2023
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
TAPE AND REEL INFORMATION
REEL DIMENSIONS
QUADRANT ASSIGNMENTS PIN 1 ORIENTATION TAPE
TAPE DIMENSIONS
P
W
Device
Package
Pins
SPQ
Reel Diameter
(mm)
Reel
Width W1
A0
B0
K0
P
W
Pin1
GLF1511
WLCSP
6
3000
180
9
1.18
1.68
0.83
4
8
Q1
Remark:
A0: Dimension designed to accommodate the component width
B0: Dimension designed to accommodate the component length
C0: Dimension designed to accommodate the component thickness
W: Overall width of the carrier tape
P:
Pitch between successive cavity centers
Rev.0.0 Feb 2023
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GLF1511
4 A, Ultra Low Ron N-channel Load Switch
with wide input voltage Range and Reverse Current Blocking
SPECIFICATION DEFINITIONS
Document
Type
Meaning
Product Status
Target
Specification
This is a target specification intended to support exploration and
discussion of critical needs for a proposed or target device. Spec limits
including typical, minimum, and maximum values are desired, or target,
limits. GLF reserves the right to change limits at any time without warning
or notification. A target specification in no way guarantees future
production of the device in question.
Design /
Development
Preliminary
Specification
This is a draft version of a product specification. The specification is still
under internal review and subject to change. GLF reserves the right to
change the specification at any time without warning or notification. A
preliminary specification in no way guarantees future production of the
device in question.
Qualification
Product
Specification
This document represents the anticipated production performance
characteristics of the device.
Production
DISCLAIMERS
Information in this document is believed to be accurate and reliable, however GLF assumes no liability for errors or
omissions. Device performance may be impacted by testing methods and application use cases. Users are
responsible to independently evaluate the applicability, usability, and suitability of GLF devices in their application.
In no case will GLF be liable for incidental, indirect, or consequential damages associated with the use, mis-use, or
sale of its product. Customers are wholly responsible to assure GLF devices meet their system level and end
product requirements. GLF retains the right to change the information provided in this data sheet without notice.
Rev.0.0 Feb 2023
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Page 11