PSMN2R0-55YLHX

PSMN2R0-55YLH N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 11 July 2022 Product data sheet 1. General description 200 Amp continuous current, logic level gate drive, N-channel enhancement mode MOSFET in LFPAK56E package. Part of the ASFETs for Battery Isolation and DC Motor control family and using Nexperia’s unique “SchottkyPlus” technology delivers high efficiency and low spiking performance usually associated with MOSFETs with an integrated Schottky or Schottky-like diode but without problematic high leakage current. The ASFET is particularly suited to 36 V battery powered applications requiring strong avalanche capability, linear mode performance, use at high switching frequencies, and also safe and reliable switching at high load-current. 2. Features and benefits • • • • • • • • • • • 200 A continuous current capability Optimised for 36 V (nominal) battery powered applications LFPAK56E low-stress exposed lead-frame for ultimate reliability, optimum soldering and easy solder-joint inspection Copper-clip and solder die attach for low package inductance and resistance, and high ID (max) rating Qualified to 175 °C Avalanche rated, 100% tested Low QG, QGD and QOSS for high efficiency, especially at higher switching frequencies Superfast switching with soft body-diode recovery for low-spiking and ringing, recommended for low EMI designs Unique “SchottkyPlus” technology for Schottky-like switching performance and low IDSS leakage Narrow VGS(th) rating for easy paralleling and improved current sharing Very strong linear-mode / safe operating area characteristics for safe and reliable switching at high-current conditions 3. Applications • • • • • Brushless DC motor control Synchronous rectifier in high-power AC-to-DC applications, e.g. server power supplies Battery protection and Battery Management Systems (BMS) Load switch 10 cell lithium-ion battery applications (36 V ‒ 42 V) 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 55 V ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - - 200 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 333 W Tj junction temperature -55 - 175 °C [1] PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E Symbol Parameter Conditions Min Typ Max Unit VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 1.63 2.1 mΩ VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 1.83 2.4 mΩ ID = 25 A; VDS = 27 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 14 31 nC - 54 84 nC Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge [1] 200A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D G 1 2 3 4 mbb076 S LFPAK56E; PowerSO8 (SOT1023) 6. Ordering information Table 3. Ordering information Type number Package PSMN2R0-55YLH Name Description Version LFPAK56E; Power-SO8 plastic, single-ended surface-mounted package (LFPAK56); 4 leads; 1.27 mm pitch SOT1023 7. Marking Table 4. Marking codes Type number Marking code PSMN2R0-55YLH 2H055L PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 2 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 55 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 55 V VGS gate-source voltage -20 20 V Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 333 W ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - 200 A VGS = 10 V; Tmb = 100 °C; Fig. 2 - 181 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 1049 A [1] IDM peak drain current Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 200 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 1049 A Avalanche ruggedness EDS(AL)S IAS [1] [2] ID = 50 A; Vsup ≤ 55 V; RGS = 50 Ω; non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 417 µs [2] - 745 mJ ID = 25 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 1.98 s [2] - 1.77 J [2] - 115 A non-repetitive avalanche Vsup ≤ 55 V; VGS = 10 V; Tj(init) = 25 °C; current RGS = 50 Ω 200A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Protected by 100% test PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 3 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 03aa16 120 aaa-032564 300 ID (A) 250 Pder (%) 80 200 (1) 150 40 100 50 0 Fig. 1. 0 50 100 150 Tmb (°C) 0 200 25 50 75 100 125 150 175 Tmb (°C) Normalized total power dissipation as a function of mounting base temperature Continuous drain current as a function of mounting base temperature aaa-032565 104 103 200 VGS ≥ 10 V (1) 200A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Fig. 2. ID (A) 0 Limit RDSon = VDS / ID tp = 10 µs 102 100 µs DC 10 1 ms 10 ms 100 ms 1 10-1 10-1 1 10 VDS (V) 102 Tmb = 25 °C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 4 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from Fig. 4 junction to mounting base - 0.33 0.45 K/W Rth(j-a) thermal resistance from Fig. 5 junction to ambient Fig. 6 - 42 - K/W - 85 - K/W aaa-028225 1 Zth(j-mb) (K/W) δ = 0.5 10-1 0.2 0.1 0.05 10-2 0.02 P single shot δ= Fig. 4. 10-5 10-4 10-3 10-2 T 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration aaa-027933 aaa-027935 Copper area 25.4 mm square; 70 µm thick on FR4 board Fig. 5. T t tp 10-3 10-6 tp PCB layout for thermal resistance from junction to ambient PSMN2R0-55YLH Product data sheet 70 µm thick copper on FR4 board Fig. 6. PCB layout with minimum footprint for thermal resistance from junction to ambient All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 5 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 55 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 49.5 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS=VGS; Tj = 25 °C 1.2 1.62 2.2 V ΔVGS(th)/ΔT gate-source threshold voltage variation with temperature 25 °C ≤ Tj ≤ 150 °C - -4.6 - mV/K IDSS drain leakage current VDS = 44 V; VGS = 0 V; Tj = 25 °C - 0.01 1 µA VDS = 44 V; VGS = 0 V; Tj = 125 °C - 3.5 - µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 1.63 2.1 mΩ VGS = 10 V; ID = 25 A; Tj = 150 °C; Fig. 11 - - 4.3 mΩ VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 1.83 2.4 mΩ VGS = 4.5 V; ID = 25 A; Tj = 150 °C; Fig. 11 - - 4.9 mΩ f = 1 MHz; Tj = 25 °C 0.52 1.3 3.3 Ω ID = 25 A; VDS = 27 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 54 84 nC ID = 25 A; VDS = 27 V; VGS = 10 V; Fig. 12; Fig. 13 - 119 184 nC ID = 0 A; VDS = 0 V; VGS = 10 V - 64 - nC ID = 25 A; VDS = 27 V; VGS = 4.5 V; Fig. 12; Fig. 13 - 17 26 nC - 12 18 nC - 5.8 8.8 nC Static characteristics V(BR)DSS IGSS gate leakage current RDSon drain-source on-state resistance RG gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gatesource charge QGS(th-pl) post-threshold gatesource charge QGD gate-drain charge - 14 31 nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 27 V; Fig. 12; Fig. 13 - 2.5 - V Ciss input capacitance - 8109 11353 pF Coss output capacitance VDS = 27 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; Fig. 14 - 704 986 pF Crss reverse transfer capacitance - 226 542 pF td(on) turn-on delay time - 39 - ns tr rise time - 38 - ns td(off) turn-off delay time - 60 - ns tf fall time - 28 - ns Qoss output charge - 41 - nC PSMN2R0-55YLH Product data sheet VDS = 27 V; RL = 1.1 Ω; VGS = 4.5 V; RG(ext) = 5 Ω VGS = 0 V; VDS = 27 V; f = 1 MHz; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 6 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E Symbol Parameter Conditions Min Typ Max Unit Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15 - 0.75 1 V trr reverse recovery time 36 - ns recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 27 V; Fig. 16 [1] - Qr - 36 - nC ta reverse recovery rise time - 21 - ns tb reverse recovery fall time - 14 - ns [1] includes capacitive recovery aaa-032566 250 ID (A) 200 8 VGS = 2.8 V 150 6 100 Fig. 7. 4 2.6 V 50 0 aaa-032567 10 RDSon (mΩ) 4.5 V 10 V 2 2.4 V 0 1 2 3 VDS (V) 0 4 0 2 4 6 8 10 12 14 VGS (V) 16 Tj = 25 °C Tj = 25 °C; ID = 25 A Output characteristics; drain current as a Fig. 8. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values aaa-032568 250 ID (A) aaa-032569 10 RDSon (mΩ) 200 8 150 6 100 4 2.4 V 2.6 V 2.8 V 3V 4.5 V 50 0 150°C 0 0.8 1.6 2 Tj = 25°C 2.4 3.2 VGS (V) VGS = 10 V 0 4 VDS = 8 V Fig. 9. Product data sheet 50 100 150 200 ID (A) 250 Tj = 25 °C Transfer characteristics; drain current as a function of gate-source voltage; typical values PSMN2R0-55YLH 0 Fig. 10. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 7 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E a aaa-032570 2.5 VGS (V) aaa-032571 10 2 8 1.5 6 44 V 1 27 V 4 VDS = 11 V 0.5 0 -60 2 -30 0 30 60 90 120 150 Tj (°C) 0 180 0 26 52 78 104 QG (nC) 130 Tj = 25 °C; ID = 25 A Fig. 11. Normalized drain-source on-state resistance factor as a function of junction temperature Fig. 12. Gate-source voltage as a function of gate charge; typical values aaa-032572 104 Ciss C (pF) VDS ID 103 Coss VGS(pl) Crss 102 VGS(th) VGS QGS2 QGS1 QGS 10 10-1 QGD QG(tot) PSMN2R0-55YLH Product data sheet 10 VDS (V) 102 VGS = 0 V; f = 1 MHz 003aaa508 Fig. 13. Gate charge waveform definitions 1 Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 8 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E IS (A) 003aal160 aaa-032573 103 ID (A) trr 102 ta tb 0 10 0.25 IRM 150°C 1 0 0.2 0.4 Tj = 25°C 0.6 0.8 VSD (V) IRM t (s) 1 VGS = 0 V Fig. 16. Reverse recovery timing definition Fig. 15. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 9 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 11. Package outline Plastic single-ended surface-mounted package (LFPAK56E); 4 leads A E SOT1023 E1 A b1 b2 (3x) c1 mounting base H D1 D L 1 2 3 4 b e A1 w A X c C θ Lp detail X 0 2.5 mm 5 mm scale Dimensions Unit y C A A1 b b1 b2 c c1 D(1) D1(1) E(1) E1(1) max 1.10 0.15 0.50 4.41 0.25 0.30 4.70 4.45 5.30 nom 0.85 min 0.95 0.00 0.35 3.62 0.19 0.24 4.45 4.95 3.7 3.5 e 1.27 H L Lp 6.2 1.3 0.85 5.9 0.8 0.40 w y 0.25 0.1 θ 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version sot1023_po References IEC JEDEC JEITA European projection Issue date 13-03-05 17-07-31 SOT1023 Fig. 17. Package outline LFPAK56E; Power-SO8 (SOT1023) PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 10 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 12. Soldering 4.7 4.2 0.25 (2×) 0.9 (3×) 0.25 (2×) 0.6 (4×) 3.45 0.6 (3×) 2 3.5 2.55 0.25 (2×) SR opening = Cu + 0.075 1.1 2.15 3.3 SP opening = Cu - 0.050 0.7 (4×) 1.27 3.81 solder lands solder paste 125 µm stencil solder resist occupied area sot1023_fr Fig. 18. Reflow soldering footprint for LFPAK56E; Power-SO8 (SOT1023) PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 11 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E 13. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal PSMN2R0-55YLH Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. 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Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 12 / 13 PSMN2R0-55YLH Nexperia N-channel 55 V, 2.1 mOhm, 200 A continuous, logic level Application Specific MOSFET in LFPAK56E Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 3 9. Thermal characteristics............................................... 5 10. Characteristics............................................................ 6 11. Package outline........................................................ 10 12. Soldering................................................................... 11 13. Legal information......................................................12 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 11 July 2022 PSMN2R0-55YLH Product data sheet All information provided in this document is subject to legal disclaimers. 11 July 2022 © Nexperia B.V. 2022. All rights reserved 13 / 13