TSM051N04LCP
Taiwan Semiconductor
N-Channel Power MOSFET
40V, 96A, 5.1mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
● Low RDS(ON) to minimize conductive losses
● Logic level
● Low gate charge for fast power switching
● 100% UIS and Rg tested
● Compliant to RoHS directive 2011/65/EU and in
accordance to WEEE 2002/96/EC
● Halogen-free according to IEC 61249-2-21
PARAMETER
VALUE
UNIT
VDS
40
V
RDS(on) (max)
VGS = 10V
5.1
VGS = 4.5V
7
mΩ
Qg
22.6
nC
APPLICATIONS
●
●
●
●
BLDC Motor Control
Battery Power Management
DC-DC converter
Secondary Synchronous Rectification
TO-252 (DPAK)
Note: MSL 3 (Moisture Sensitivity Level) per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
VDS
40
V
Gate-Source Voltage
VGS
±20
V
Continuous Drain Current
TC = 25°C
(Note 1)
ID
TA = 25°C
Pulsed Drain Current
(Note 2)
Single Pulse Avalanche Current
(Note 2)
Single Pulse Avalanche Energy
Total Power Dissipation
Total Power Dissipation
TC = 25°C
TC = 125°C
TA = 25°C
TA = 125°C
Operating Junction and Storage Temperature Range
96
16
A
IDM
384
A
IAS
EAS
25
94
A
mJ
PD
PD
89
18
2.6
0.5
W
W
TJ, TSTG
- 55 to +150
°C
SYMBOL
LIMIT
UNIT
Junction to Case Thermal Resistance
RӨJC
1.4
°C/W
Junction to Ambient Thermal Resistance
RӨJA
49
°C/W
THERMAL PERFORMANCE
PARAMETER
Thermal Performance Note: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The casethermal reference is defined at the solder mounting surface of the drain pins. R ӨJA is guaranteed by design while RӨCA is
determined by the user’s board design.
1
Version: A1701
TSM051N04LCP
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
BVDSS
40
--
--
V
Gate Threshold Voltage
VGS = VDS, ID = 250µA
VGS(TH)
1.2
1.7
2.5
V
Gate-Source Leakage Current
VGS = ±20V, VDS = 0V
IGSS
--
--
±100
nA
--
--
1
--
--
100
--
4.3
5.1
--
6
7
gfs
--
38
--
Qg
--
44.5
--
Qg
--
22.6
--
Qgs
--
6.7
--
Qgd
--
11
--
Ciss
--
2456
--
Coss
--
250
--
Crss
--
139
--
Rg
0.3
1.05
2.1
td(on)
--
6
--
tr
--
16
--
td(off)
--
23
--
tf
--
11
--
VSD
--
--
1
V
VGS = 0V, VDS = 40V
Drain-Source Leakage Current
IDSS
VGS = 0V, VDS = 40V
TJ = 125°C
Drain-Source On-State Resistance
VGS = 10V, ID = 16A
(Note 3)
VGS = 4.5V, ID = 14A
Forward Transconductance
Dynamic
(Note 3)
RDS(on)
VDS = 5V, ID = 16A
µA
mΩ
S
(Note 4)
VGS = 10V, VDS = 20V,
Total Gate Charge
ID = 16A
Total Gate Charge
VGS = 4.5V, VDS = 20V,
Gate-Source Charge
ID = 14A
Gate-Drain Charge
Input Capacitance
VGS = 0V, VDS = 20V
Output Capacitance
f = 1.0MHz
Reverse Transfer Capacitance
Gate Resistance
Switching
f = 1.0MHz
nC
pF
Ω
(Note 4)
Turn-On Delay Time
Turn-On Rise Time
VGS = 10V, VDS = 20V,
Turn-Off Delay Time
ID = 16A, RG = 2Ω,
Turn-Off Fall Time
ns
Source-Drain Diode
Forward Voltage
(Note 3)
VGS = 0V, IS = 16A
Reverse Recovery Time
IS = 16A ,
trr
--
19
--
ns
Reverse Recovery Charge
dI/dt = 100A/μs
Qrr
--
11
--
nC
Notes:
1.
2.
3.
4.
Silicon limited current only.
L = 0.3mH, VGS = 10V, VDD = 25V, RG = 25Ω, IAS = 25A, Starting TJ = 25°C
Pulse test: Pulse Width ≤ 300µs, duty cycle ≤ 2%.
Switching time is essentially independent of operating temperature.
ORDERING INFORMATION
PART NO.
TSM051N04LCP ROG
PACKAGE
PACKING
TO-252 (DPAK)
2,500pcs / 13” Reel
2
Version: A1701
TSM051N04LCP
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
Output Characteristics
Transfer Characteristics
40
VGS=10V
VGS=7V
VGS=5V
VGS=4.5V
VGS=4V
VGS=3.5V
32
24
ID, Drain Current (A)
ID, Drain Current (A)
40
VGS=3V
16
8
32
24
25℃
16
8
VGS=2.5V
150℃
0
0
0
1
2
3
4
0
1
On-Resistance vs. Drain Current
3
4
Gate-Source Voltage vs. Gate Charge
0.01
10
VGS, Gate to Source Voltage (V)
RDS(ON), Drain-Source On-Resistance (Ω)
2
VGS, Gate to Source Voltage (V)
VDS, Drain to Source Voltage (V)
0.008
VGS=4.5V
0.006
0.004
VGS=10V
0.002
0
0
8
16
24
32
VDS=20V
ID=16A
8
6
4
2
0
40
0
10
On-Resistance vs. Junction Temperature
RDS(on), Drain-Source On-Resistance (Ω)
VGS=10V
ID=16A
1.6
1.4
1.2
1
0.8
0.6
-75
-50
-25
0
25
50
75
30
40
50
On-Resistance vs. Gate-Source Voltage
2
1.8
20
Qg, Gate Charge (nC)
ID, Drain Current (A)
RDS(on), Drain-Source On-Resistance
(Normalized)
-55℃
100 125 150
TJ, Junction Temperature (°C)
0.02
0.015
0.01
0.005
ID=16A
0
3
4
5
6
7
8
9
10
VGS, Gate to Source Voltage (V)
3
Version: A1701
TSM051N04LCP
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
BVDSS vs. Junction Temperature
BVDSS (Normalized)
Drain-Source Breakdown Voltage
Capacitance vs. Drain-Source Voltage
C, Capacitance (pF)
3500
3000
CISS
2500
2000
1500
1000
500
COSS
CRSS
0
0
8
16
24
32
1.2
ID=1mA
1.1
1
0.9
0.8
40
-75
VDS, Drain to Source Voltage (V)
-25
0
25
50
75
100 125 150
TJ, Junction Temperature (°C)
Maximum Safe Operating Area, Junction-to-Case
Source-Drain Diode Forward Current vs. Voltage
100
IS, Reverse Drain Current (A)
1000
RDS(ON)
ID, Drain Current (A)
-50
100
10
SINGLE PULSE
RӨJC=1.4°C/W
TC=25°C
1
10
150℃
25℃
-55℃
1
0.1
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
VSD, Body Diode Forward Voltage (V)
VDS, Drain to Source Voltage (V)
Normalized Thermal Transient Impedance, Junction-to-Case
Normalized Effective Transient
Thermal Impedance, ZӨJC
10
SINGLE PULSE
RӨJC=1.4°C/W
1
Duty=0.5
Duty=0.2
Duty=0.1
Duty=0.05
Duty=0.02
Duty=0.01
Single
0.1
0.01
0.0001
0.001
Notes:
Duty = t1 / t2
TJ = TC + PDM x ZӨJC x RӨJC
0.01
0.1
t, Square Wave Pulse Duration (sec)
4
Version: A1701
TSM051N04LCP
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
TO-252 (DPAK)
SUGGESTED PAD LAYOUT (Unit: Millimeters)
MARKING DIAGRAM
051N04L
YML
Y = Year Code
M = Month Code
O =Jan
P =Feb
S =May
T =Jun
W =Sep
X =Oct
L = Lot Code (1~9, A~Z)
Q =Mar
U =Jul
Y =Nov
5
R =Apr
V =Aug
Z =Dec
Version: A1701
TSM051N04LCP
Taiwan Semiconductor
Notice
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assumes no responsibility or liability for any errors or inaccuracies.
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6
Version: A1701