TSM70N750CP ROG

TSM70N750 Taiwan Semiconductor N-Channel Power MOSFET 700V, 6A, 0.75Ω FEATURES KEY PERFORMANCE PARAMETERS ● Super-Junction technology ● High performance due to small figure-of-merit ● High ruggedness performance ● High commutation performance PARAMETER VALUE UNIT VDS 700 V RDS(on) (max) 0.75 Ω Qg 10.7 nC APPLICATION ● Power Supply ● Lighting TO-251 (IPAK) TO-252 (DPAK) Notes: MSL 3 (Moisture Sensitivity Level) for TO-252 (D-PAK) per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 700 V Gate-Source Voltage VGS ±30 V Continuous Drain Current Pulsed Drain Current TC = 25°C (Note 1) ID TC = 100°C (Note 2) Total Power Dissipation @ TC = 25°C 6 3.6 A IDM 18 A PDTOT 62.5 W Single Pulsed Avalanche Energy (Note 3) EAS 81 mJ Single Pulsed Avalanche Current (Note 3) IAS 1.8 A TJ, TSTG - 55 to +150 °C SYMBOL LIMIT UNIT Junction to Case Thermal Resistance RӨJC 2.0 °C/W Junction to Ambient Thermal Resistance RӨJA 62 °C/W Operating Junction and Storage Temperature Range THERMAL PERFORMANCE PARAMETER Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. R ӨJA is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air. Document Number: DS_P0000139 1 Version: C1706 TSM70N750 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (TC = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA BVDSS 700 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2 3 4 V Gate Body Leakage VGS = ±30V, VDS = 0V IGSS -- -- ±100 nA Zero Gate Voltage Drain Current VDS = 700V, VGS = 0V IDSS -- -- 1 µA Drain-Source On-State Resistance VGS = 10V, ID = 1.8A RDS(on) -- 0.62 0.75 Ω Qg -- 10.7 -- Qgs -- 2.8 -- Qgd -- 3.5 -- Dynamic (Note 5) Total Gate Charge VDS = 380V, ID = 6A, Gate-Source Charge VGS = 10V Gate-Drain Charge nC Input Capacitance VDS = 100V, VGS = 0V, Ciss -- 555 -- Output Capacitance f = 1.0MHz Coss -- 39 -- Gate Resistance f = 1MHz, open drain Rg -- 2.7 -- td(on) -- 15 -- tr -- 26 -- td(off) -- 30 -- tf -- 18 -- VSD -- -- 1.4 V Switching pF Ω (Note 6) Turn-On Delay Time VDD = 380V, Turn-On Rise Time RGEN = 25Ω, Turn-Off Delay Time ID = 6A, VGS = 10V, Turn-Off Fall Time Source-Drain Diode ns (Note 4) Forward On Voltage IS = 6A, VGS = 0V Reverse Recovery Time VR = 200V, IS = 3A trr -- 182 -- ns Reverse Recovery Charge dIF/dt = 100A/μs Qrr -- 1.3 -- μC Notes: 1. Current limited by package 2. Pulse width limited by the maximum junction temperature 3. L = 50mH, IAS = 1.8A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C 4. Pulse test: PW ≤ 300µs, duty cycle ≤ 2% 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. o Document Number: DS_P0000139 2 Version: C1706 TSM70N750 Taiwan Semiconductor ORDERING INFORMATION PART NO. TSM70N750CH C5G PACKAGE PACKING TO-251 (IPAK) 75pcs / Tube TSM70N750CP ROG TO-252 (DPAK) 2,500pcs / 13” Reel Note: 1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC 2. Halogen-free according to IEC 61249-2-21 definition Document Number: DS_P0000139 3 Version: C1706 TSM70N750 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) Output Characteristics Transfer Characteristics On-Resistance vs. Drain Current Gate-Source Voltage vs. Gate Charge On-Resistance vs. Junction Temperature Document Number: DS_P0000139 Source-Drain Diode Forward Current vs. Voltage 4 Version: C1706 TSM70N750 Taiwan Semiconductor CHARACTERISTICS CURVES (TC = 25°C unless otherwise noted) BVDSS vs. Junction Temperature Capacitance vs. Drain-Source Voltage Maximum Safe Operating Area (DPAK/IPAK) Normalized Thermal Transient Impedance Normalized Effective Transient Thermal Impedance 10 1 100 Duty=0.5 Duty=0.2 Duty=0.1 Duty=0.05 Duty=0.02 Duty=0.01 Single pulse 10-1 10-2 10-3 10-5 10-4 10-3 10-2 10-1 100 Square Wave Pulse Duration (s) Document Number: DS_P0000139 5 Version: C1706 TSM70N750 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-251 (IPAK) MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000139 6 Version: C1706 TSM70N750 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-252 SUGGESTED PAD LAYOUT (Unit: Millimeters) MARKING DIAGRAM Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug W =Sep X =Oct Y =Nov Z =Dec L = Lot Code (1~9, A~Z) Document Number: DS_P0000139 7 Version: C1706 TSM70N750 Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000139 8 Version: C1706