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BMR4651010/001

BMR4651010/001

  • 厂商:

    FLEX(伟创力)

  • 封装:

    SMD26 模块

  • 描述:

    非隔离 PoL 模块,数字 直流转换器 1 输出 0.6 ~ 1.8V 90A 7.5V - 14V 输入

  • 数据手册
  • 价格&库存
BMR4651010/001 数据手册
PUBLIC PRODUCT SPECIFICATION TABLE OF CONTENTS Prepared (Subject resp) jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou (4) 1 (1) No. 1/1301-BMR465Technical Specification Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Date 6/9/2021 6/10/2021 Rev 1/28701-BMR465 Rev G F A June 2021 © Flex Key Features • Small Package Laydown: 50.8 x 19.05 x 10.0 mm (2.0 x 0.75 x 0.39 in) SIP: 50.8 x 9.51 x 19.05 mm (2.0 x 0.37 x 0.75 in) • Control loop with fast load transient response. • 0.6 V - 1.8 V output voltage range • High maximum output current, 90 A • Current sharing up to 4 modules, 360 A • High efficiency, typ. 94.3% at 12 Vin, 1.8 Vout, half load • Configuration and monitoring via PMBus • Phase synchronization & spreading • Voltage tracking capability • Margining up/down to +/-10% • MTBF 14.95 Mh General Characteristics • • • • • • • • • • • Configuration support via Flex Power Designer Monotonic soft-start ramp up Reduced external output decoupling capacitance Input under-voltage & over-voltage shutdown Output short-circuit & over voltage protection Over temperature protection Remote control & Power Good pins Differential sense pins Voltage setting via pin-strap or PMBus ISO 9001/14001 certified supplier Highly automated manufacturing ensures quality Safety Approvals Design for Environment Meets requirements in hightemperature lead-free soldering processes. Contents Ordering Information General Information Safety Specification Internal Circuit Diagram Pin Descriptions Typical Application Circuit ............................................................. 2 ............................................................. 2 ............................................................. 3 ............................................................. 4 ............................................................. 5 ............................................................. 7 Electrical Specification 90 A / 0.6-1.8 V BMR 465 ............................................ 12 EMC Specification PMBus Interface Operating Information Thermal Consideration Mechanical Information Soldering Information Delivery Information Product Qualification Specification Appendix – PMBus Commands ........................................................... 18 ........................................................... 19 ........................................................... 22 ........................................................... 29 ........................................................... 31 ........................................................... 34 ........................................................... 35 ........................................................... 37 ........................................................... 38 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) No. jidgezou George Zou Checked BMR465George seriesZou PoL Regulators jidgezou Date 6/9/2021 Input 7.5 - 14 V, Output up to 90 A / 162 W Product program BMR 465 n1010/001n8 Output 0.6-1.8 V, 90 A/162 W Product number and Packaging BMR 465 n1n2n3n4/n5n6n7n8 Options / n1 n2 n3 n4 Mounting / ο ο ο n6 n7 n8 / Packaging / Options Description n1 0 ο ο ο ο Horizontal through hole mounted version (Laydown TH) Horizontal surface mounted version (Laydown SMD) Vertical through hole mounted version (Single in Line, SIP) n2 0 1 Open frame Open frame, 5.5 mm pin length n3 n4 10 PMBus and pin strap n5 n6 n7 001 CTRL pin positive logic (active high) n8 B Antistatic tray of 144 products (SIP) Antistatic tape & reel of 130/or 80 products (Laydown TH and SMD) C Example: Product number BMR 465 0010/001C equals a through-hole mounted, open frame, PMBus and analog pin strap, positive RC logic, standard configuration variant, package tape&reel. General Information Reliability The failure rate (λ) and mean time between failures (MTBF= 1/λ) is calculated at max output power and an operating ambient temperature (TA) of +40°C. Flex Power Modules uses Telcordia SR-332 Issue 2 Method 1 to calculate the mean steady-state failure rate and standard deviation (σ). Telcordia SR-332 Issue 3 also provides techniques to estimate the upper confidence levels of failure rates based on the mean and standard deviation. Mean steady-state Std. deviation, σ λ 67 nFailures/h F June 2021 © Flex The products are compatible with the relevant clauses and requirements of the RoHS directive 2011/65/EU and have a maximum concentration value of 0.1% by weight in homogeneous materials for lead, mercury, hexavalent chromium, PBB and PBDE and of 0.01% by weight in homogeneous materials for cadmium. Exemptions in the RoHS directive utilized in Flex Power Modules products are found in the Statement of Compliance document. / Configuration file 2 n5 / ο 1 Rev 1/28701-BMR465 Rev G Compatibility with RoHS requirements Ordering Information Digital interface 2 (4) 1/1301-BMR465Technical Specification Approved (Document resp) Mechanical 2 8.3 nFailures/h MTBF (mean value) for the BMR465 series = 14.95 Mh. MTBF at 90% confidence level = 12.89 Mh Flex Power Modules fulfills and will continuously fulfill all its obligations under regulation (EC) No 1907/2006 concerning the registration, evaluation, authorization and restriction of chemicals (REACH) as they enter into force and is through product materials declarations preparing for the obligations to communicate information on substances in the products. Quality Statement The products are designed and manufactured in an industrial environment where quality systems and methods like ISO 9000, Six Sigma, and SPC are intensively in use to boost the continuous improvements strategy. Infant mortality or early failures in the products are screened out and they are subjected to an ATE-based final test. Conservative design rules, design reviews and product qualifications, plus the high competence of an engaged work force, contribute to the high quality of the products. Warranty Warranty period and conditions are defined in Flex Power Modules General Terms and Conditions of Sale. Limitation of Liability Flex Power Modules does not make any other warranties, expressed or implied including any warranty of merchantability or fitness for a particular purpose (including, but not limited to, use in life support applications, where malfunctions of product can cause injury to a person’s health or life). © Flex 2021 The information and specifications in this technical specification is believed to be correct at the time of publication. However, no liability is accepted for inaccuracies, printing errors or for any consequences thereof. Flex reserves the right to change the contents of this technical specification at any time without prior notice. PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) No. jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou 3 (4) 1/1301-BMR465Technical Specification Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Safety Specification General information Flex Power Modules DC/DC converters and DC/DC regulators are designed in accordance with the safety standards IEC 60950-1, EN 60950-1 and UL 60950-1 Safety of Information Technology Equipment. IEC/EN/UL 60950-1 contains requirements to prevent injury or damage due to the following hazards: • • • • • • 3 Electrical shock Energy hazards Fire Mechanical and heat hazards Radiation hazards Chemical hazards On-board DC/DC converters and DC/DC regulators are defined as component power supplies. As components they cannot fully comply with the provisions of any safety requirements without “conditions of acceptability”. Clearance between conductors and between conductive parts of the component power supply and conductors on the board in the final product must meet the applicable safety requirements. Certain conditions of acceptability apply for component power supplies with limited stand-off (see Mechanical Information and Safety Certificate for further information). It is the responsibility of the installer to ensure that the final product housing these components complies with the requirements of all applicable safety standards and regulations for the final product. Component power supplies for general use should comply with the requirements in IEC/EN/UL 60950-1 Safety of Information Technology Equipment. Product related standards, e.g. IEEE 802.3af Power over Ethernet, and ETS-300132-2 Power interface at the input to telecom equipment, operated by direct current (dc) are based on IEC/EN/UL 60950-1 with regards to safety. Flex Power Modules DC/DC converters, Power interface modules and DC/DC regulators are UL 60950-1 recognized and certified in accordance with EN 60950-1. The flammability rating for all construction parts of the products meet requirements for V-0 class material according to IEC 60695-11-10, Fire hazard testing, test flames – 50 W horizontal and vertical flame test methods. Non - isolated DC/DC regulators The DC/DC regulator output is SELV if the input source meets the requirements for SELV circuits according to IEC/EN/UL 60950-1. Date 6/9/2021 Rev 1/28701-BMR465 Rev G F © Flex June 2021 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) BMR465 series PoL Regulators Lisa Li 2/1301-BMR 465 2010 UenSpecification Technical Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Internal Circuit Diagram 1 (16) No. JIDDASUN Dan Sun Approved (Document resp) 4 Rev 1/28701-BMR465 Rev G D © Flex June 2021 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) BMR465 series PoL Regulators Lisa Li 2 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) 5 Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Pin Descriptions – SIP version Pin layout, top view. Pin Descriptions – Lay Down versions Pin layout, top view (component placement for illustration only). Rev 1/28701-BMR465 Rev G D © Flex June 2021 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 3 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Pin 6 Rev 1/28701-BMR465 Rev G D June 2021 © Flex Designation Type Function 1A, 1B, 1C, 1D VIN Power Input Voltage 2A, 2B, 2C, 2D GND Power Power Ground 3A, 3B, 3C, 3D VOUT Power Output Voltage 4A +S I Positive sense. Connect to output voltage close to the load. 4B -S I Negative sense. Connect to power ground close to the load. 5A VSET I Output voltage pin strap. Used with external resistor to set the nominal output voltage. See section Output Voltage Adjust using Pin-strap Resistor. 5B VTRK I Voltage Tracking input. Allows for tracking of output voltage to an external voltage. See section Voltage Tracking. 6A SALERT 6B SDA I/O PMBus Data. Data signal for PMBus communication. Requires a pull-up resistor even when unused. See section PMBus Interface. 7A SCL I/O PMBus Clock. Clock for PMBus communication. Requires a pull-up resistor even when unused. See section PMBus Interface. 7B FAULT I/O 8A SA I 8B SYNC I/O 9A PG 9B CTRL I 10A GCB I/O 10B PREF 11, 12 NC O PMBus Alert. Asserted low when any of the configured protection mechanisms Open-Drain indicate a fault or a warning. See section Monitoring Faults. Fault Indicator. For standalone operation this pin is not used and shall be left unconnected. For parallel operation this pin shall be connected between products using 0 Ω resistors. See section Parallel Operation. PMBus address pin strap. Used with external resistor to assign a unique PMBus address to the product. May be left open if PMBus is not used. See section PMBus Addressing. External switching frequency synchronization input or output. May be left open if unused. See section Synchronization. O Power Good output. Asserted high when the product is ready to provide regulated Open-Drain output voltage to the load. See section Power Good. Power Remote Control. Can be used to enable/disable the output voltage of the product. May be left open if unused due to internal pull-up. See section Remote Control. Group Communication Bus. Used for current sharing, and inter-device communication. See section Group Communication Bus. Pin-strap reference. Ground reference for pin-strap resistors. No Connect Support pins. These pins are available only in lay down versions. INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) BMR465 series PoL Regulators Lisa Li 2/1301-BMR 465 2010 UenSpecification Technical Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Typical Application Circuit Standalone operation with PMBus communication. 4 (16) No. JIDDASUN Dan Sun Approved (Document resp) 7 Rev 1/28701-BMR465 Rev G D © Flex June 2021 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) BMR465 series PoL Regulators Lisa Li 2/1301-BMR 465 2010 UenSpecification Technical Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Typical Application Circuit – Parallel Operation Parallel operation. 5 (16) No. JIDDASUN Dan Sun Approved (Document resp) 8 Rev 1/28701-BMR465 Rev G D © Flex June 2021 9 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 6 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Rev 1/28701-BMR465 Rev G June 2021 D © Flex Absolute Maximum Ratings Characteristics min max Unit TP1 Operating temperature (see Thermal Consideration section) -40 typ 150 °C TS Storage temperature (Ambient) -40 125 °C VI Input voltage (See Operating Information Section for input and output voltage relations) -0.3 16 V Signal I/O voltage Ground voltage differential CTRL, SA, SALERT, SCL, SDA, VSET, SYNC, PG, GCB, FAULT -0.3 6 V -S, PREF, GND -0.3 0.3 V Analog pin voltage VO, +S, VTRK -0.3 6.5 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the Electrical Specification section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Configuration File This product is designed with a digital control circuit. The control circuit uses a configuration file which determines the functionality and performance of the product. The Electrical Specification table shows parameter values of functionality and performance with the Standard configuration, unless otherwise specified. The Standard configuration is designed to fit most application needs. Changes in Standard configuration might be required to optimize performance in specific application. Note that current sharing operation requires changed configuration. See application note AN307 for further information. Common Electrical Specification This section includes parameter specifications common to all product versions within the product series. Typically these are parameters defined by the digital controller of the products. In the table below PMBus commands for configurable parameters are written in capital letters. TP1 = -30 to +95 °C, VI = 7.5 to 14 V, unless otherwise specified under Conditions. Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions. VO defined by pin-strap. Standard configuration. Characteristics Conditions min Switching Frequency fSW = 1/TSW Switching Frequency Range, Note 1 Switching Frequency Set-point Accuracy External Sync Pulse Width Input Clock Frequency Drift Tolerance TINIT Initialization Time TONdel_tot Output voltage Total On Delay Time TONdel Output voltage On Delay Time TOFFdel TONrise / TOFFfall Output voltage Off Delay Time Output voltage On/Off Ramp Time (0-100%-0 of VO) typ max 320 PMBus configurable FREQUENCY_SWITCH External sync From VI > ~2.7 V to ready to be enabled Enable by input voltage Enable by CTRL pin Turn on delay duration Range PMBus configurable TON_DELAY Accuracy (actual delay vs set value) Turn off delay duration, Note 2 Range PMBus configurable TOFF_DELAY Accuracy (actual delay vs set value), Note 3 Turn on ramp duration Turn off ramp duration Ramp duration range PMBus configurable TON_RISE/TOFF_FALL Ramp time accuracy for standalone operation (actual ramp time vs set value) Unit kHz 200 640 kHz -5 150 -10 5 % ns % 10 67 TINIT + TONdel TONdel 5 3 ms ms 250 -0/+2 0 4 ms ms 250 -0/+2 5 Disabled in standard configuration. Turn off immediately upon expiration of Turn off delay. 0 100 ±250 ms ms ms ms ms µs 10 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Characteristics Conditions PG threshold Rising Falling PG thresholds range PMBus configurable POWER_GOOD_ON VOUT_UV_FAULT_LIMIT Power Good , PG PG delay PG delay range From VO reaching target to PG assertion PMBus configurable POWER_GOOD_DELAY IUVP threshold IUVP threshold range Input Under Voltage Protection, IUVP IUVP hysteresis range IOVP threshold range PMBus configurable VIN_UV_WARN_LIMIT VIN_UV_FAULT_RESPONSE PMBus configurable VIN_OV_FAULT_LIMIT IOVP hysteresis range UVP threshold range PMBus configurable VIN_OV_WARN_LIMIT VIN_OV_FAULT_RESPONSE PMBus configurable VOUT_UV_FAULT_LIMIT OVP threshold OVP threshold range PMBus configurable VOUT_OV_FAULT_LIMIT UVP/OVP response time Fault response Over Current Protection, OCP Note 5 Over Temperature Protection, OTP Position P3 Note 7 Over Temperature Protection, OTP Position P1 / P2 Note 7 Rev 1/28701-BMR465 Rev G OCP threshold OCP threshold range Protection delay Fault response OTP threshold OTP threshold range OTP hysteresis Fault response OTP Threshold OTP Threshold range OTP Hysteresis Fault response VOUT_UV_FAULT_RESPONSE VOUT_OV_FAULT_RESPONSE Set value per phase PMBus configurable IOUT_AVG_OC_FAULT_LIMIT See Note 6 MFR_IOUT_OC_FAULT_RESPONSE PMBus configurable OT_FAULT_LIMIT PMBus configurable OT_FAULT_RESPONSE PMBus configurable MFR_VMON_OV_FAULT_LIMIT VMON_OV_FAULT_RESPONSE June 2021 D © Flex min typ max 90 85 0 2 0 Unit % VO % VO 100 % VO ms 5000 ms 6.4 V 6.4-14 V 0.5 V 0-7.6 V ±280 100 Shutdown, automatic restart, 280 ms. Note 4 16 mV μs V 6.9-16 V 1 V 0-9.1 V IOVP hysteresis Set point accuracy IOVP response delay Fault response UVP threshold Output Voltage Over/Under Voltage Protection, OVP/UVP PMBus configurable VIN_UV_FAULT_LIMIT IUVP hysteresis Set point accuracy IUVP response delay Fault response IOVP threshold Input Over Voltage Protection, IOVP 7 (16) No. ±280 100 Shutdown, automatic restart, 280 ms. Note 4 85 mV μs % VO 0-100 % VO 115 % VO 100-115 % VO 10 μs Shutdown, automatic restart, 280 ms. Note 4 57 A 0-57 A 5 Shutdown, automatic restart, 280 ms. Note 4 125 -40…+125 15 Shutdown, automatic restart, 280 ms. Note 4 150 -40…+150 25 Shutdown, automatic restart, 280 ms. Note 4 TSW C C C C C C 11 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Characteristics Conditions Rev 1/28701-BMR465 Rev G Output current READ_IOUT © Flex min TP1 = 25 C, VO = 1.0 V TP1 = 0 - 95 C, VO = 1.0 V Duty cycle READ_DUTY_CYCLE Temperature READ_TEMPERATURE_1 typ ±1 % VO ±1 ±3.5 A A No tolerance, Read value is the actual value applied by PWM controller. Position P3, TP3 = 0 - 95 C -10 70 Tracking Input Voltage Range VTRK pin 0-5 Tracking Rise-Time VTRK pin Tracking Accuracy Regulation 100% tracking Logic output low signal level VOH Logic output high signal level IOL IOH VIL VIH Logic output low sink current Logic output high source current Logic input low threshold Logic input high threshold II_LEAK Logic leakage current CI_PIN Logic pin input capacitance RI_PU Logic pin internal pull-up resistance fSMB Supported SMBus Operating frequency TBUF SMBus Bus free time tset thold SMBus SDA setup time from SCL SMBus SDA hold time from SCL SMBus START/STOP condition setup/hold time from SCL SCL low period SCL high period Tlow Thigh Unit mV VTRK = 5 V VOL max ±280 Tracking Input Bias Current Current difference between products in a current sharing group Supported number of products in a current sharing group June 2021 D Input voltage READ_VIN Output voltage READ_VOUT Monitoring Accuracy 8 (16) No. Steady state operation -2 5 °C 200 µA V 1 V/ms 2 % VO Max 2 x READ_IOUT monitoring accuracy 4 SCL, SDA, SYNC, GCB, SALERT, PG Sink / source current = 2 mA SCL, SDA, CTRL, SYNC, GCB SCL, SDA, SYNC, SALERT, PG SCL, SDA, CTRL, SYNC, GCB SCL, SDA, SALERT CTRL to +5V GCB to +5V 0.5 2.25 STOP bit to START bit See section SMBus – Timing See section SMBus – Timing See section SMBus – Timing V 2 2 0.8 mA mA V V 100 µA 2 -100 100 V 12 pF No internal pull-up 10 47 kΩ kΩ 400 kHz 1.3 µs 100 300 ns ns 600 ns 1.3 0.6 µs µs Note 1. There are configuration changes to consider when changing the switching frequency, see section Switching Frequency. Note 2. A default value of 0 ms forces the device to Immediate Off behavior with TOFF_FALL ramp-down setting being ignored. Note 3. The specified accuracy applies for off delay times larger than 4 ms. When setting 0 ms the actual delay will be 0 ms. Note 4. Automatic restart ~280 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information for other fault response options. Note 5. The set OCP limit applies per phase. The total OCP limit will be twice the set value. Note that higher OCP threshold than specified may result in damage of the module at OC fault conditions. Note 6. TSW is the switching period. Note 7. See section Over Temperature Protection (OTP). 12 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 9 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Product Electrical Specification Rev 1/28701-BMR465 Rev G June 2021 D © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 TP1 = -30 to +95 °C, VI = 7.5 to 14 V, unless otherwise specified under Conditions. Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions. VO defined by pin strap. Standard configuration. Tested with external CIN = 1000 μF/12 mΩ + 24 x 10 μF, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. See Operating Information section for design of input and output filters for a specific application. In the test set-up sense lines are connected directly to output pins on a converter and all the output voltage measurements are made on output pins. Characteristics VI VO Conditions Input voltage Input voltage slew rate Output voltage without pin-strap Output voltage adjustment range Output voltage adjustment including PMBus margining Output voltage set-point resolution Output voltage accuracy, Note 8 Internal resistance +S/-S to VOUT/GND +S bias current -S bias current Line regulation IO = max IO Load regulation IO = 0 - 100% VOac Output ripple & noise (up to 20 MHz) IO Ilim Output current Current limit threshold Isc Short circuit current 50% of max IO η Efficiency IO = max IO Pd Power dissipation at max IO Pli Input idling power PCTRL CI CO Input standby power Internal input capacitance Internal output capacitance IO = 0 min typ max Unit 14 6 V V/ms 0.6 1.8 V V 0.54 1.98 V 7.5 Monotonic 1.2 ±0.025 Including line, load, temp -1 -100 VO = 0.6 V VO = 1.0 V VO = 1.8 V VO = 0.6 V VO = 1.0 V VO = 1.8 V VO = 0.6 V VO = 1.0 V VO = 1.8 V 0 100 1 47 20 20 2 2 2 2 2 2 2.5 3.5 5.0 114 RMS, hiccup mode, VO = 1.0 V, 0.4 mΩ short 12 VO = 0.6 V VO = 1.0 V VO = 1.8 V VO = 0.6 V VO = 1.0 V VO = 1.8 V VO = 0.6 V VO = 1.0 V VO = 1.8 V VO = 0.6 V VO = 1.0 V VO = 1.8 V Turned off with CTRL-pin VI = 0 V VO = 0 V 87.6 91.4 94.3 83.7 88.7 92.5 10.5 11.5 13.1 1.29 1.35 1.82 0.44 257 700 Note 8. For VO < 1.0 V accuracy is +/-10 mV. For further exceptions see section Output Voltage Adjust using PMBus. 100 % VO % VO Ω µA µA mV mV mVp-p 90 125 A A A % % W W W μF μF 13 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 10 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Rev Typical Output Characteristics, VO = 0.6 V 1/28701-BMR465 Rev G June 2021 D © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 Standard configuration unless otherwise specified, TP1 = +25 °C Efficiency Power Dissipation [%] [W] 100 15 95 12 VI VI 90 7.5 V 85 9.6 V 80 12 V 75 14 V 7.5 V 9 9.6 V 6 12 V 14 V 3 0 70 0 10 20 30 40 50 60 70 80 0 90 [A] 10 20 30 40 50 60 70 80 90 [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Lay Down versions [A] [A] 100 90 80 70 60 50 40 30 20 10 0 100 90 80 70 60 50 40 30 20 10 0 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Output Ripple and Noise Transient Response Fundamental output voltage ripple at V I = 12 V, IO = max IO, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. See section Output Ripple and Noise. Output voltage response to load current step change (22.5–67.5–22.5 A) at VI = 12 V, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, ASCR Gain = 550 and ASCR Residual = 90. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. 14 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 11 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Rev Typical Output Characteristics, VO = 1.0 V 1/28701-BMR465 Rev G June 2021 D © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 Standard configuration unless otherwise specified, TP1 = +25 °C Efficiency Power Dissipation [%] [W] 100 15 95 12 VI VI 90 7.5 V 85 9.6 V 80 12 V 75 14 V 7.5 V 9 9.6 V 6 12 V 14 V 3 0 70 0 10 20 30 40 50 60 70 80 0 90 [A] 10 20 30 40 50 60 70 80 90 [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Lay Down versions [A] [A] 100 90 80 70 60 50 40 30 20 10 0 100 90 80 70 60 50 40 30 20 10 0 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Output Ripple and Noise Transient Response Fundamental output voltage ripple at V I = 12 V, IO = max IO, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. See section Output Ripple and Noise. Output voltage response to load current step change (22.5–67.5–22.5 A) at VI = 12 V, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, ASCR Gain = 400 and ASCR Residual = 90. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. 15 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 12 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Rev Typical Output Characteristics, VO = 1.8 V 1/28701-BMR465 Rev G June 2021 D © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 Standard configuration unless otherwise specified, TP1 = +25 °C Efficiency Power Dissipation [%] [W] 100 15 95 12 VI VI 90 7.5 V 85 9.6 V 80 12 V 75 14 V 7.5 V 9 9.6 V 6 12 V 14 V 3 0 70 0 10 20 30 40 50 60 70 80 0 90 [A] 10 20 30 40 50 60 70 80 90 [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Lay Down versions [A] [A] 100 90 80 70 60 50 40 30 20 10 0 100 90 80 70 60 50 40 30 20 10 0 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] 3.0 m/s 2.0 m/s 1.0 m/s 0.5 m/s Nat. Conv. 0 20 40 60 80 100 120 [°C] Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Available load current vs. ambient air temperature and airflow at VI = 12 V. See section Thermal Consideration. Output Ripple and Noise Transient Response Fundamental output voltage ripple at VI = 12 V, IO = max IO, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. See section Output Ripple and Noise. Output voltage response to load current step change (22.5–67.5–22.5 A) at VI = 12 V, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, ASCR Gain = 350 and ASCR Residual = 90. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) BMR465 series PoL Regulators Lisa Li 13 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) 16 Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Typical On/Off Characteristics Rev 1/28701-BMR465 Rev G D June 2021 © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 Standard configuration, TP1 = +25 °C, VO = 1.0 V Enable by input voltage – PG Open-Drain (default) Disable by input voltage – PG Open-Drain (default) VI VI VO VO PG PG Output enabled by applying VI. VI = 12 V, IO = max IO. TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. USER_CONFIG = 0x1480 (default). PG pulled up to external voltage. Note: PG being high before Vin applied can be avoided by pulling up PG to Vout. Scale from top: 10, 0.5, 2 V/div, 20 ms/div. Output disabled by removing VI. VI = 12 V, IO = max IO. Scale from top: 10, 0.5, 2 V/div, 1 ms/div. Enable by input voltage – PG Push-Pull Disable by input voltage – PG Push-Pull VI VO PG Output enabled by applying VI. VI = 12 V, IO = max IO. TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. USER_CONFIG = 0x1484 (PG push-pull). Scale from top: 10, 0.5, 2 V/div, 20 ms/div. Output disabled by removing VI. VI = 12 V, IO = max IO. Scale from top: 10, 0.5, 2 V/div, 1 ms/div. Enable by CTRL pin Disable by CTRL pin CTRL CTRL VO VO PG PG Output enabled by CTRL pin. VI = 12 V, IO = max IO. TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. Scale from top: 5, 0.5, 2 V/div, 10 ms/div. Output disabled by CTRL pin. VI = 12 V, IO = max IO. Scale from top: 5, 0.5, 2 V/div, 1 ms/div. 17 INTERNAL USE ONLY PRODUCT SPECIFICATION Prepared (Subject resp) 14 (16) No. 2/1301-BMR 465 2010 UenSpecification Technical JIDDASUN Dan Sun Approved (Document resp) BMR465 series PoL Regulators Lisa Li Checked Date Dan Yue 8/7/2020 Input 7.5 - 14 V, Output up to 90 A / 162 W Rev Typical Charactersitics 1/28701-BMR465 Rev G June 2021 D © Flex BMR 465 0010, BMR 465 1010, BMR 465 2010 Standard configuration unless otherwise specified, TP1=+25 °C Efficiency vs. Output Current and Switching Frequency Power Dissipation vs. Output Current and Switching Frequency [%] [W] 95 15 200 kHz 12 200 kHz VI VI 85 320 kHz 9 320 kHz 80 480 kHz 6 480 kHz 75 640 kHz 3 640 kHz 90 70 0 0 10 20 30 40 50 60 70 80 90 [A] 0 10 20 30 40 50 60 70 80 90 [A] Efficiency vs. load current and switching frequency at VI = 12 V, VO = 1.0 V, CO = 10 x 470 μF/5 mΩ + 10 x 100 μF. Frequency changed by PMBus command FREQUENCY_SWITCH. Dissipated power vs. load current and switching frequency at VI = 12 V, VO = 1.0 V, CO = 10 x 470 μF/5 mΩ + 10 x 100 μF. Frequency changed by PMBus command FREQUENCY_SWITCH. Output Ripple vs. Switching Frequency Load Transient vs. ASCR Gain and External Output Capacitance [mVpk-pk] [mV] 8 100 80 6 10x100 μF + 10x470 μF/5 mΩ VO 0.6 V 60 4 2 0 1.0 V 40 1.8 V 20 10x100 μF + 4x470 μF/5 mΩ 0 200 300 400 500 600 [kHz] Output voltage ripple Vpk-pk vs. switching frequency at VI = 12 V, IO = max IO, CO = 10 x 470 μF/5 mΩ + 10 x 100 μF. Frequency changed by PMBus command FREQUENCY_SWITCH. 150 200 250 300 350 400 450 500 Load transient peak voltage deviation vs. ASCR gain and external capacitance. Step (22.5–67.5–22.5 A). VI = 12 V, VO = 1.0 V, fsw = 320 kHz, ASCR residual =90, di/dt = 2 A/µs. ASCR gain changed by PMBus command ASCR_CONFIG. 18 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 1 (14) No. 3/1301-BMR465Technical Specification Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W EMC Specification Conducted EMI is measured according to the test set-up below. The typical fundamental switching frequency is 320 kHz. Conducted EMI Input terminal value (typical for standard configuration). VI = 12 V, VO = 1.0 V, IO = 90 A. Date Rev 8/18/2020 1/28701-BMR465 Rev G D June 2021 © Flex Output Ripple and Noise Output ripple and noise are measured according to figure below. A 50 mm conductor works as a small inductor forming together with the two capacitances a damped filter. 50 mm conductor Vout +S Tantalum Capacitor 10 µF co Ceramic Capacitor 0.1 µF −S GND Load jidgezou George Zou 50 mm conductor BNC-contact to oscilloscope Output ripple and noise test set-up. The digital compensation of the product is designed to automatically provide stability, accurate line and load regulation and good transient performance for a wide range of operating conditions (switching frequency, input voltage, output voltage, output capacitance). Inherent from the implementation and normal to the product there will be some low frequency ripple at the output, in addition to the fundamental switching frequency output ripple. The total output ripple and noise is maintained at a low level. EMI without filter. To spectrum analyzer RF Current probe 1 kHz – 50 MHz Battery supply Resistive load DUT C1 50 mm C1 = 10 µF / 600 VDC Feed- Thru RF capacitor 800 mm 200 mm Test set-up conducted emission, power lead. DUT = Product mounted on a 182 cm2 test board with the external capacitances CIN = 1000 μF/12 mΩ + 24 x 10 μF and COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. VI = 12 V, VO = 1.0 V, IO = 90 A, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF, 5 mV/div, 50 µs/div Example of low frequency ripple at the output. 19 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou 2 (14) No. Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Date Rev 8/18/2020 1/28701-BMR465 Rev G D June 2021 © Flex PMBus Interface Power Management Overview This product incorporates a wide range of configurable power management features that are simple to implement with a minimum of external components. Additionally, the product includes protection features that continuously safeguard the load from damage due to unexpected system faults. The product’s standard configuration is suitable for a wide range of operation in terms of input voltage, output voltage, and load. The configuration is stored in an internal Non-Volatile Memory (NVM). All power management functions can be reconfigured using the PMBus interface. Throughout this document, different PMBus commands are referenced. A detailed description of each command is provided in the appendix at the end of this specification. The Flex Power Designer software suite can be used to configure and monitor this product via the PMBus interface. For more information please contact your local Flex sales representative. RSA [k] Address RSA [k] Address 0 (short) 0x26 42.2 0x28 10 0x19 46.4 0x29 11 0x1A 51.1 0x2A 12.1 0x1B 56.2 0x2B 13.3 0x1C 61.9 0x2C 14.7 0x1D 68.1 0x2D 16.2 0x1E 75 0x2E 17.8 0x1F 82.5 0x2F 19.6 0x20 90.9 0x30 21.5 0x21 100 0x31 23.7 0x22 110 0x32 26.1 0x23 121 0x33 28.7 0x24 133 0x34 31.6 0x25 147 0x35 34.8 0x26 162 0x36 38.3 0x27 178 0x37 Infinite (open) SMBus Interface 0x28 The product can be used with any standard two-wire I2C or SMBus host device. See Electrical Specification for allowed clock frequency range. In addition, the product is compatible Reserved Addresses with PMBus version 1.2 and includes an SALERT line to help Addresses listed in the table below are reserved or assigned mitigate limitations related to continuous fault monitoring. The according to the SMBus specification and may not be usable. PMBus signals SCL, SDA and SALERT require passive pull-up Refer to the SMBus specification for further information. resistors as stated in the SMBus Specification. Pull-up resistors values should be selected to guarantee the rise time according to equation below: Address Comment  = RP C p  1s 0x00 General Call Address / START byte 0x01 CBUS address where Rp is the pull-up resistor value and Cp is the bus loading. The maximum allowed bus load is 400 pF. The pull-up resistor should be tied to an external supply voltage in range from 2.5 to 5.5 V, which should be present prior to or during power-up. If the proper power supply is not available, voltage dividers may be applied. Note that in this case, the resistance in the equation above corresponds to parallel connection of the resistors forming the voltage divider. See application note AN304 for details on interfacing the product with a microcontroller. 0x02 Address reserved for different bus format 0x03 - 0x07 Reserved for future use 0x08 SMBus Host 0x09 - 0x0B Assigned for Smart Battery 0x0C SMBus Alert Response Address 0x28 Reserved for ACCESS.bus host 0x2C - 0x2D Reserved by previous versions of the SMBus specification 0x37 PMBus Addressing The PMBus address is configured with a resistor connected between the SA pin and the PREF pin, as shown in the Typical Application Circuit. Recommended resistor values are shown in the table below. 1% tolerance resistors are required. 0x48 - 0x4B Reserved for ACCESS.bus default address Reserved by previous versions of the SMBus specification Unrestricted addresses 0x61 SMBus Device Default Address 0x78 - 0x7B 10-bit slave addressing 0x7C - 0x7F Reserved for future use 0x40 - 0x44 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 20 3 (14) No. 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Monitoring via PMBus It is possible to continuously monitor a wide variety of parameters through the PMBus interface. These include, but are not limited to, the parameters listed in the table below. Parameter Input voltage PMBus Command READ_VIN Output voltage READ_VOUT Total output current Controller temperature (TP3) READ_IOUT READ_IOUT0 READ_IOUT1 READ_TEMPERATURE_1 Switching frequency READ_FREQUENCY Duty cycle Highest temperature of power switches (TP1, TP2) READ_DUTY_CYCLE Output current of each phase MFR_READ_VMON * * Reports a voltage level corresponding to the temperature. See command details in the end of this specification for formula to use. Monitoring Faults Fault conditions can be monitored using the SALERT pin, which will be asserted low when any number of pre-configured fault or warning conditions occur. The SALERT pin will be held low until faults and/or warnings are cleared by the CLEAR_FAULTS command, or until the output voltage has been re-enabled. It is possible to mask which fault conditions should not assert the SALERT pin by the command MFR_SMBALERT_MASK. Date Rev 8/18/2020 1/28701-BMR465 Rev G D June 2021 © Flex Snapshot Parameter Capture This product offers a special feature that enables the user to capture parametric data during normal operation by a single PMBus command. The following parameters are stored: • • • • • • • Input voltage Output voltage Output current Controller temperature Switching frequency Duty cycle Status and fault information When a fault occurs the Snapshot functionality will automatically store this parametric data to NVM. The data can then later be read back using the SNAPSHOT command to provide valuable information for analysis. It is possible to select which faults will trigger a store to NVM by the PMBus command SNAPSHOT_FAULT_MASK. See application note AN320 for details on using the Snapshot feature. PMBus/I2C Timing In response to the SALERT signal, the user may read a number of status commands to find out what fault or warning condition Setup and hold times timing diagram. occurred, see table below. Fault & Warning Status Overview, Power Good PMBus Command STATUS_WORD STATUS_BYTE Output voltage level STATUS_VOUT Output current level STATUS_IOUT Input voltage level STATUS_INPUT Temperature level STATUS_TEMPERATURE PMBus communication STATUS_CML Miscellaneous STATUS_MFR_SPECIFIC The setup time, tset, is the time data, SDA, must be stable before the rising edge of the clock signal, SCL. The hold time thold, is the time data, SDA, must be stable after the falling edge of the clock signal, SCL. If these times are violated incorrect data may be captured or meta-stability may occur and the bus communication may fail. All standard SMBus protocols must be followed, including clock stretching. Refer to the SMBus specification, for SMBus electrical and timing requirements. This product supports the BUSY flag in the status commands to indicate product being too busy for SMBus response. A busfree time delay according to this specification must occur between every SMBus transmission (between every stop & start condition). The product supports PEC (Packet Error Checking) according to the SMBus specification. When sending subsequent commands to the same module, it is recommended to insert additional delays according to the table below. PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 3/1301-BMR465Technical Specification Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W After sending PMBus Command Required delay before additional command STORE_USER_ALL Date Rev 8/18/2020 1/28701-BMR465 Rev G D RESTORE_USER_ALL © Flex Command Protection The user may write-protect specific PMBus commands in the User NVM by using the command UNPROTECT. Initialization Procedure The product follows an internal initialization procedure after power is applied to the VIN pins: 100 ms RESTORE_DEFAULT_ALL 1. Self test and memory check. 10 ms 2 ms after reading 10 ms after writing 2. The address pin-strap resistors are measured and the associated PMBus address is defined. Non-Volatile Memory (NVM) The product incorporates two Non-Volatile Memory areas for storage of the PMBus command values; the Default NVM and the User NVM. The Default NVM is pre-loaded with Flex factory default values. The Default NVM is write-protected and can be used to restore the Flex factory default values through the command RESTORE_DEFAULT_ALL. The User NVM is pre-loaded with Flex factory default values. The User NVM is writable and open for customization. The values in NVM are loaded during initialization according to section Initialization Procedure, whereafter commands can be changed through the PMBus Interface. The STORE_USER_ALL command will store the changed parameters to the User NVM. Pin-strap resistors INITIALIZATION Default NVM INITIALIZATION Flex factory default Write-protected RESTORE_DEFAULT_ALL 3. The output voltage pin-strap resistor is measured and the associated output voltage level will be loaded to operational RAM of PMBus command VOUT_COMMAND. 4. Flex factory default values stored in default NVM memory are loaded to operational RAM. This overwrites any previously loaded values. 5. Values stored in the User NVM are loaded into operational RAM memory. This overwrites any previously loaded values (e.g. VOUT_COMMAND by pin-strap). 6. Check for external clock signal at the SYNC pin and lock internal clock to the external clock if used. Once this procedure is completed and the Initialization Time has passed (see Electrical Specification), the output voltage is ready to be enabled using the CTRL pin. The product is also ready to accept commands via the PMBus interface, which in case of writes will overwrite any values loaded during the initialization procedure. VIN RAM User NVM Flex factory default Customizable TINIT INITIALIZATION STORE_USER_ALL VOUT RESTORE_USER_ALL WRITE PMBus interface June 2021 100 ms STORE_DEFAULT_ALL Any other command 4 (14) No. jidgezou George Zou VOUT_MAX 21 READ Illustration of memory areas of the product. Illustration Initialization time. Ready for output enable and soft-start 22 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou 5 (14) No. Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Date 8/18/2020 Rev 1/28701-BMR465 Rev G D June 2021 © Flex Operating Information Input Voltage The input voltage range 7.5 - 14 V makes the product easy to use in intermediate bus applications when powered by a non-regulated bus converter or a regulated bus converter. Input Under Voltage Protection (IUVP) The product monitors the input voltage and will turn-on and turn-off at configured thresholds (see Electrical Specification). The turn-on input voltage threshold is set higher than the corresponding turn-off threshold. Hence, there is a hysteresis between turn-on and turn-off input voltage levels. Once the input voltage falls below the turn-off threshold, the device can respond in several ways as follows: 1. Immediate and definite shutdown of output voltage until the fault is cleared by PMBus command CLEAR_FAULTS or the output voltage is re-enabled. 2. Immediate shutdown of output voltage while the input voltage is below the turn-on threshold. Operation resumes automatically and the output is enabled when the input voltage has risen above the turn-on threshold. The default response is option 2. The IUVP function can be reconfigured using the PMBus commands VIN_UV_FAULT_LIMIT (turn-off threshold), VIN_UV_WARN_LIMIT (turn-on threshold) and VIN_UV_FAULT_RESPONSE. For products configured to operate in current sharing mode, response option 1 will always be used, regardless of VIN_UV_FAULT_RESPONSE command settings. Input Over Voltage Protection (IOVP) The product monitors the input voltage continuously and will respond as configured when the input voltage rises above the configured threshold level (see Electrical Specification). Refer to section “Input Under Voltage Protection” for functionality, response configuration options and default setting. The IOVP function can be reconfigured using the PMBus commands VIN_OV_FAULT_LIMIT (turn-off threshold), VIN_OV_WARN_LIMIT (turn-on threshold) and VIN_OV_FAULT_RESPONSE. Input and Output Impedance The impedance of both the input source and the load will interact with the impedance of the product. It is important that the input source has low characteristic impedance. If the input voltage source contains significant inductance, the addition of a capacitor with low ESR at the input of the product will ensure stable operation. External Input Capacitors The product is a two-phase converter which gives lower input ripple than a single phase design, see picture below. Thus, ripple-current-rating requirements for the input capacitors are lower relatively to a single phase converter. The input ripple RMS current in a two-phase buck converter can be estimated to I inputRMS = I load D(0.5 − D) (valid for D < 0.5) Where I load is the output load current and D is the duty cycle. The maximum load ripple current becomes I load/4. The ripple current is divided into three parts, i.e., currents in the input source, external input capacitor, and internal input capacitor. How the current is divided depends on the impedance of the input source, ESR and capacitance values in the capacitors. For most applications non-tantalum capacitors are preferred due to the robustness of such capacitors to accommodate high inrush currents of systems being powered from very low impedance sources. It is recommended to use a combination of ceramic capacitors and low-ESR electrolytic/polymer bulk capacitors. The low ESR of ceramic capacitors effectively limits the input ripple voltage level, while the bulk capacitance minimizes deviations in the input voltage at large load transients. If several products are connected in a phase spreading setup the amount of input ripple current, and capacitance per product, can be reduced. The amount of input ripple current for such setup can be estimated using the Flex Power Designer software and capacitor selection can be made based on this number. Ceramic input capacitors must be placed close to the input pins of a converter and with low impedance connections to the VIN and GND pins in order to be effective. External Output Capacitors The output capacitor requirement depends on two considerations; output ripple voltage and load transient response. To achieve low ripple voltage, the output capacitor bank must have a low ESR value, which is achieved with ceramic output capacitors. A low ESR value is critical also for 23 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 6 (14) No. 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W a small output voltage deviation during load transients. Designs with smaller load transients can use fewer capacitors and designs with more dynamic load content will require more load capacitors to minimize output voltage deviation. Improved transient response can also be achieved by adjusting the settings of the control loop of the product. Adding output capacitance decreases loop band-width. It is recommended to place low ESR ceramic and low ESR electrolytic/polymer capacitors as close to the load as possible, using several capacitors in parallel to lower the effective ESR. It is important to use low resistance and low inductance PCB layouts in order for capacitance to be effective. Optimization of output filter together with load step simulations can be made using the Flex Power Designer software. See application note AN321 for further guidelines on how to choose and apply output capacitors. Date Rev 8/18/2020 1/28701-BMR465 Rev G June 2021 D © Flex Load step 22.5–67.5–22.5 A, di/dt = 2 A/µs. VI = 12 V, VO = 1.0 V, fsw = 320 kHz, Residual factor = 90. Gain factor changed by PMBus command ASCR_CONFIG. Voltage deviation vs. control loop gain setting and output capacitance. The user may also adjust the residual factor, set by the ASCR_CONFIG command, to improve the recovery time after a load transient. The typical usable range of the residual factor is 70 - 120. A higher value than 127 may damage the device and must not be used. A graph below illustrates the effect of the residual factor on the recovery time after a load transient. Note that also the gain factor will affect the recovery time. [µs] 130 110 10x100 μF + 10x470 μF/5 mΩ 90 Control Loop The products use a fully digital control loop that achieves precise control of the entire power conversion process, resulting in a very flexible device that is also very easy to use. The control loop utilizes oversampling of the output voltage compared to the switching frequency, and a dual edge modulation PWM, to minimize the delay in the control loop. The actual duty cycle is updated after each sample within each switching cycle, achieving a smaller total output voltage variation with less output capacitance than traditional PWM controllers, thus saving cost and board space. Control may be set more or less aggressive by adjusting a gain factor, set by the PMBus command ASCR_CONFIG. Increasing the gain factor will reduce the voltage deviation at load transients, at the expense of somewhat increased ripple on the output. Too high gain can also cause increase in jitter and instability. Stability analysis can be made using the Flex Power Designer software. Below graph exemplifies the effect of the gain factor on the voltage deviation during a load transient. The typical range of the gain factor is 200 - 600. [mV] 100 80 10x100 μF + 10x470 μF/5 mΩ 60 10x100 μF + 4x470 μF/5 mΩ 40 20 0 150 200 250 300 350 400 450 500 10x100 μF + 4x470 μF/5 mΩ 70 50 30 50 60 70 80 90 100 110 Load step 22.5–67.5–22.5 A, di/dt = 2 A/µs. VI = 12 V, VO = 1.0 V, fsw = 320 kHz, Gain factor = 300. Residual factor changed by PMBus command ASCR_CONFIG. Recovery time vs.control loop residual setting and output capacitance. By default the product is configured with a moderate gain factor to provide a trade-off between load transient performance and output ripple for a wide range of operating conditions. For a specific application the gain factor can be increased to improve load transient response. Optimization of control loop settings and output filter, together with load step simulations, can be made using the Flex Power Designer software. Remote Sense The product has remote sense to compensate the voltage drops between the output and the point of load. The sense traces should be laid out as a differential pair and preferably be shielded by the PCB ground layer to reduce noise susceptibility. If the remote sense is not used, +S must be connected to VOUT and −S must be connected to GND. In cases where the external output filter includes an inductor (forming a pi filter) according to the picture below, the LEXT/CEXT resonant frequency places an upper limit on the controller loop bandwidth. If the resonance frequency is high the sense lines can be connected after the filter (as shown in the picture) – if the resonant frequency is low and the DC drop 24 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 7 (14) No. 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W from LEXT is acceptable, sensing before the filter may be better. CO LEXT CEXT Load Vout GND -S +S External output filter with inductor (pi filter). Enabling Output Voltage The following options are available to enable and disable this device: 1. Output voltage is enabled through the CTRL pin. 2. Output voltage is enabled using the PMBus command OPERATION. The CTRL pin can be used with active high (positive) logic or active low (negative) logic. The CTRL pin polarity can be reconfigured using the PMBus command ON_OFF_CONFIG. The CTRL pin has an internal 10 kΩ pull-up resistor to 5 V. The external device must have a sufficient sink current ability to be able pull CTRL pin voltage down below logic low threshold level (see Electrical Characteristics). When the CTRL pin is left open, the voltage on the CTRL pin is pulled up to 5 V. If the device is to be synchronized to an external clock source, the clock frequency must be stable prior to enabling the output voltage. Output Voltage Adjust using Pin-strap Resistor Using an external Pin-strap resistor, RSET, the output voltage can be set to several predefined levels shown in the table below. Only the voltage levels specified in the table can be set by RSET. The resistor should be applied between the VSET pin and the PREF pin as shown in the Typical Application Circuit. Maximum 1% tolerance resistors are required. Date Rev 8/18/2020 1/28701-BMR465 Rev G D June 2021 © Flex RSET [kΩ] VOUT [V] RSET [kΩ] VOUT [V] 0 (short) 1.00 26.1 1.10 10 0.60 28.7 1.15 11 0.65 31.6 1.20 12.1 0.70 34.8 1.25 13.3 0.75 38.3 1.30 14.7 0.80 42.2 1.40 16.2 0.85 46.4 1.50 17.8 0.90 51.1 1.60 19.6 0.95 56.2 1.70 21.5 1.00 61.9 1.80 23.7 1.05 Infinite (open) 1.20 RSET also sets the maximum output voltage; see section Output Voltage Range Limitation. The resistor is sensed only during the initialization procedure after application of input voltage. Changing the resistor value during normal operation will not change the output voltage. See Ordering Information for output voltage range. Output Voltage Adjust using PMBus The output voltage set by pin-strap can be overridden up to a certain level (see section Output Voltage Range Limitation) by using the PMBus command VOUT_COMMAND. See Electrical Specification for adjustment range. Voltage Margining Up/Down Using the PMBus interface it is possible to adjust the output voltage to one of two predefined levels above or below the nominal voltage setting in order to determine whether the load device is capable of operating outside its specified supply voltage range. This provides a convenient method for dynamically testing the operation of the load circuit outside its typical operating range. This functionality can also be used to test of supply voltage supervisors. Margin limits of the nominal output voltage ±5% are default, but the margin limits can be reconfigured using the PMBus commands VOUT_MARGIN_LOW and VOUT_MARGIN_HIGH. Margining is activated by the command OPERATION and can be used regardless of the output voltage being enabled by the CTRL pin or by the PMBus. Output Voltage Trim The actual output voltage can be trimmed to optimize performance of a specific load by setting a non-zero value for PMBus command VOUT_TRIM. The value of VOUT_TRIM is summed with the nominal output voltage set by VOUT_COMMAND, allowing for multiple products to be commanded to a common nominal value, but with slight adjustments per load. PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) BMR465George seriesZou PoL Regulators jidgezou 8 (14) No. 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) 25 Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Output Voltage Range Limitation The output voltage range that is possible to set by configuration or by the PMBus interface is hardware limited by the pin-strap resistor RSET. The maximum output voltage is set to 115% of the output value defined by RSET. This protects the application circuit from an over voltage due to an accidental PMBus command. The limitation applies to the actual regulated output voltage rather than to the configured value. Thus, it is possible to write and read back a VOUT_COMMAND value higher than the limit, but the actual output voltage will be limited. The output voltage limit can be reconfigured to a lower than 115% of Vout value by writing the PMBus command VOUT_MAX. Output Over Voltage Protection (OVP) The product includes over voltage limiting circuitry for protection of the load. The default OVP limit is 15% above the nominal output voltage. The product can be configured to respond in different ways to the output voltage exceeding the OVP limit: 1. Immediate and definite shutdown of output voltage until the fault is cleared by PMBus command CLEAR_FAULTS or the output voltage is re-enabled. 2. Immediate shutdown of output voltage followed by continuous restart attempts of the output voltage with a preset interval (“hiccup” mode). The default response is option 2. The OVP limit and fault response can be reconfigured using the PMBus commands VOUT_OV_FAULT_LIMIT, VOUT_OV_FAULT_RESPONSE and OVUV_CONFIG. For products configured to operate in current sharing mode, response option 1 will always be used, regardless of this command configuration. Output Under Voltage Protection (UVP) The product includes output under voltage limiting circuitry for protection of the load. The default UVP limit is 15% below the nominal output voltage. Refer to section Output Over Voltage Protection for response configuration options and default setting. The UVP limit and fault response can be reconfigured using the PMBus commands VOUT_UV_FAULT_LIMIT and VOUT_UV_FAULT_RESPONSE. Power Good The power good pin (PG) indicates when the product is ready to provide regulated output voltage to the load. During rampup and during a fault condition, PG is held low. By default, PG is asserted high after the output has ramped to a voltage above 90% of the nominal voltage, and deasserted if the output voltage falls below 85% of the nominal voltage. These thresholds may be changed using the PMBus commands POWER_GOOD_ON and VOUT_UV_FAULT_LIMIT. Date Rev 8/18/2020 1/28701-BMR465 Rev G D June 2021 © Flex The time between when the POWER_GOOD_ON threshold is reached and when the PG pin is actually asserted is set by the PMBus command POWER_GOOD_DELAY. See Electrical Specification for default value and range. By default the PG pin is configured as an open drain output but it is also possible to set the output in push-pull mode by the command USER_CONFIG. The PG output is not defined during ramp up of the input voltage due to the initialization of the product. Over Current Protection (OCP) The product includes robust current limiting circuitry for protection at continuous overload. After ramp-up is complete the product can detect an output overload/short condition. The following OCP response options are available: 1. Immediate and definite shutdown of output voltage until the fault is cleared by PMBus command CLEAR_FAULTS or the output voltage is re-enabled. 2. Immediate shutdown of output voltage followed by continuous restart attempts of the output voltage with a preset interval (“hiccup” mode). The default response from an over current fault is option 2. Note that delayed shutdown is not supported. The load distribution should be designed for the maximum output short circuit current specified. The OCP limit and response can be reconfigured using the PMBus commands IOUT_AVG_OC_FAULT_LIMIT and MFR_IOUT_OC_FAULT_RESPONSE. For products operated in current sharing mode, response option 1 will always be used, regardless of configuration. Under Current Protection (UCP) The product includes robust current limiting circuitry for protection at continuous reversed current, due to a synchronous rectifier ability to sink current. Refer to section Over Current Protection for response configuration options and default setting. The UCP limit and response can be reconfigured using the PMBus commands IOUT_AVG_UC_FAULT_LIMIT and MFR_IOUT_UC_FAULT_RESPONSE. Switching Frequency The default switching frequency is chosen as the best tradeoff between efficiency and thermal performance, output ripple and load transient performance. The switching frequency can be re-configured in a certain range using the PMBus command FREQUENCY_SWITCH. Refer to Electrical Specification for default switching frequency and range. Changing the switching frequency will affect efficiency and power dissipation, load transient response (control loop characteristics) and output ripple. Control loop settings may need to be adjusted. Note that since the product has two phases the effective 26 PUBLIC PRODUCT SPECIFICATION Prepared (Subject resp) 9 (14) No. 3/1301-BMR465Technical Specification jidgezou George Zou Approved (Document resp) BMR465George seriesZou PoL Regulators jidgezou Checked Input 7.5 - 14 V, Output up to 90 A / 162 W Date Rev 8/18/2020 1/28701-BMR465 Rev G June 2021 D © Flex switching frequency will be twice the configured. Addressing). Synchronization Two or more products may be synchronized with an external clock to eliminate beat frequencies reflected back to the input supply rail. Eliminating the slow beat frequencies (usually
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