PSMN1R5-40YSDX

PSMN1R5-40YSD N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology 27 August 2019 Product data sheet 1. General description 240 A, standard level gate drive N-channel enhancement mode MOSFET in 175 °C LFPAK56 package using advanced TrenchMOS Superjunction technology. This product has been designed and qualified for high performance power switching applications. 2. Features and benefits • • • • • • • • • 240 A continuous ID(max) rating Avalanche rated, 100% tested at IAS = 190 A Strong SOA (linear-mode) rating NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery' Low QRR, QG and QGD for high system efficiency and low EMI designs Schottky-Plus body-diode with low VSD, low QRR, soft recovery and low IDSS leakage High reliability LFPAK (Power SO8) package, with copper-clip and solder die attach, qualified to 175 °C Exposed leads can be wave soldered, visual solder joint inspection and high quality solder joints Low parasitic inductance and resistance 3. Applications • • • • • • • High-performance synchronous rectification DC-to-DC converters High performance and high efficiency server power supply Brushless DC motor control Battery protection Load-switch and eFuse Inrush management, hotswap 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 Ptot total power dissipation Tmb = 25 °C; Fig. 1 Tj junction temperature [1] Min Typ Max Unit - - 40 V - - 240 A - - 238 W -55 - 175 °C - 1.3 1.5 mΩ Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology Symbol Parameter Conditions Min Typ Max Unit ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 3 10 20 nC 46 71 99 nC Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge [1] 240A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 4 LFPAK56; PowerSO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package PSMN1R5-40YSD Name Description Version LFPAK56; Power-SO8 plastic, single-ended surface-mounted package; 4 terminals SOT669 7. Marking Table 4. Marking codes Type number Marking code PSMN1R5-40YSD 1D5S40Y 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 40 V VDSM peak drain-source voltage tp ≤ 20 ns; f ≤ 500 kHz; EDS(AL) ≤ 200 nJ; pulsed - 45 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 40 V VGS gate-source voltage -20 20 V Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 238 W ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - 240 A VGS = 10 V; Tmb = 100 °C; Fig. 2 - 202 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 1145 A IDM PSMN1R5-40YSD Product data sheet peak drain current All information provided in this document is subject to legal disclaimers. 27 August 2019 [1] © Nexperia B.V. 2019. All rights reserved 2 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology Symbol Parameter Tstg Conditions Min Max Unit storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 238 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 1145 A Avalanche ruggedness EDS(AL)S IAS [1] [2] ID = 71.2 A; Vsup ≤ 40 V; RGS = 50 Ω; non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 230 µs [2] - 426 mJ ID = 25 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 2.3 ms [2] - 1.5 J [2] - 190 A non-repetitive avalanche Vsup ≤ 40 V; VGS = 10 V; Tj(init) = 25 °C; current RGS = 50 Ω 240A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Protected by 100% test 03aa16 120 Pder (%) aaa-028907 300 ID (A) 250 (1) 80 200 150 40 100 50 0 Fig. 1. 0 50 100 150 Tmb (°C) 0 200 Fig. 2. Product data sheet 25 50 75 100 125 150 175 Tmb (°C) 200 VGS ≥ 10 V (1) 240A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Normalized total power dissipation as a function of mounting base temperature PSMN1R5-40YSD 0 Continuous drain current as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 3 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology ID (A) aaa-028638 104 103 Limit RDSon = VDS / ID tp = 10 µs 102 DC 100 µs 10 1 ms 10 ms 100 ms 1 10-1 10-1 1 10 102 VDS (V) Tmb = 25 °C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Min Typ Max Unit Rth(j-mb) thermal resistance from Fig. 4 junction to mounting base Conditions - 0.56 0.63 K/W Rth(j-a) thermal resistance from Fig. 5 junction to ambient Fig. 6 - 42 - K/W - 85 - K/W aaa-028639 1 Zth(j-mb) (K/W) δ = 0.5 10-1 0.2 0.1 0.05 0.02 10-2 single shot P δ= Fig. 4. 10-5 10-4 10-3 10-2 T t tp 10-3 10-6 tp T 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 4 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology aaa-027935 aaa-027933 Copper square 25.4 mm x 25.4 mm; 70 µm thick on FR4 board Fig. 5. PCB layout for thermal resistance from junction to ambient 70 µm thick copper on FR4 board Fig. 6. PCB layout with minimum footprint for thermal resistance from junction to ambient 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS=VGS; Tj = 25 °C 2.4 3.1 3.6 V ΔVGS(th)/ΔT gate-source threshold voltage variation with temperature 25 °C ≤ Tj ≤ 150 °C - -6.9 - mV/K IDSS drain leakage current VDS = 32 V; VGS = 0 V; Tj = 25 °C - 0.06 1 µA VDS = 32 V; VGS = 0 V; Tj = 125 °C - 2.9 - µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 1.3 1.5 mΩ VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 11 - - 2.9 mΩ f = 1 MHz; Tj = 25 °C 0.4 1 2.5 Ω ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 46 71 99 nC ID = 0 A; VDS = 0 V; VGS = 10 V - 40 - nC ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 12 21 32 nC 9 15 23 nC 4 6.7 10 nC 3 10 20 nC - 4.3 - V Static characteristics V(BR)DSS IGSS RDSon RG gate leakage current drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gatesource charge QGS(th-pl) post-threshold gatesource charge QGD gate-drain charge VGS(pl) gate-source plateau voltage PSMN1R5-40YSD Product data sheet ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13 All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 5 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology Symbol Parameter Conditions Min Typ Max Unit Ciss input capacitance 3599 5537 7752 pF Coss output capacitance VDS = 20 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; Fig. 14 923 1421 1989 pF Crss reverse transfer capacitance 70 233 513 pF td(on) turn-on delay time - 20 - ns tr rise time - 14 - ns td(off) turn-off delay time - 42 - ns tf fall time Qoss output charge VDS = 20 V; RL = 0.8 Ω; VGS = 10 V; RG(ext) = 5 Ω - 17 - ns VGS = 0 V; VDS = 20 V; f = 1 MHz; Tj = 25 °C - 47 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15 - 0.8 1 V trr reverse recovery time - 38 - ns Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 20 V; Fig. 16 [1] - 37 - nC ta reverse recovery rise time - 21 - ns tb reverse recovery fall time - 18 - ns [1] includes capacitive recovery aaa-029996 300 ID (A) 250 10 V 5.5 V RDSon (mΩ) aaa-029995 6 5 200 4 VGS = 5 V 150 3 100 2 4.5 V 50 1 4V 0 Fig. 7. 0 1 2 3 VDS (V) 0 4 0 2.5 5 7.5 10 12.5 15 17.5 VGS (V) 20 Tj = 25 °C Tj = 25 °C; ID = 25 A Output characteristics; drain current as a Fig. 8. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 6 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology aaa-028656 400 ID (A) RDSon (mΩ) aaa-028640 6 4.5 V 5V 5 300 5.5 V 4 200 3 2 VGS = 10 V 100 175°C 0 0 1 2 3 Tj = 25°C 4 5 6 VGS (V) 1 0 7 VDS = 8 V Fig. 9. a 0 50 100 150 200 250 ID (A) 300 Tj = 25 °C Transfer characteristics; drain current as a function of gate-source voltage; typical values Fig. 10. Drain-source on-state resistance as a function of drain current; typical values aaa-028641 2 VGS (V) aaa-028655 10 1.6 8 1.2 6 0.8 4 0.4 2 32 V 20 V 0 -60 -30 0 30 60 90 120 150 Tj (°C) 0 180 VDS = 8 V 0 10 20 30 40 50 60 70 QG (nC) 80 Tj = 25 °C; ID = 25 A Fig. 11. Normalized drain-source on-state resistance factor as a function of junction temperature PSMN1R5-40YSD Product data sheet Fig. 12. Gate-source voltage as a function of gate charge; typical values All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 7 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology aaa-029997 104 C (pF) VDS ID Ciss VGS(pl) Coss 103 VGS(th) VGS QGS2 QGS1 QGS QGD QG(tot) Crss 003aaa508 102 10-1 Fig. 13. Gate charge waveform definitions 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values IS (A) 003aal160 aaa-028642 103 ID (A) trr 102 ta tb 0 10 0.25 IRM 175°C 1 0 0.2 0.4 Tj = 25°C 0.6 0.8 1 VSD (V) IRM t (s) 1.2 VGS = 0 V Fig. 16. Reverse recovery timing definition Fig. 15. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 8 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology 11. Package outline Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w b A X c 1/2 e A (A3) A1 C q L detail X 0 y C θ 5 mm 8° scale 0° Dimensions (mm are the original dimensions) Unit(1) mm A A1 A2 A3 b b2 max 1.20 0.15 1.10 0.50 4.41 nom 0.25 min 1.01 0.00 0.95 0.35 3.62 c c2 D(1) D1(1) E(1) E1(1) b3 b4 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3 2.0 0.7 0.19 0.24 3.80 4.8 3.1 e 1.27 H L L1 L2 6.2 0.85 1.3 1.3 5.8 0.40 0.8 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. Outline version SOT669 References IEC JEDEC JEITA w y 0.25 0.1 sot669_po European projection Issue date 11-03-25 13-02-27 MO-235 Fig. 17. Package outline LFPAK56; Power-SO8 (SOT669) PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 9 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology 12. Soldering Footprint information for reflow soldering SOT669 4.7 4.2 0.9 (3×) 0.25 (2×) 0.25 (2×) 0.6 (4×) 3.45 0.6 (3×) 2 3.5 2.55 0.25 (2×) SR opening = Cu + 0.075 1.1 2.15 3.3 SP opening = Cu - 0.050 0.7 (4×) 1.27 3.81 solder lands solder paste 125 µm stencil solder resist occupied area Dimensions in mm sot669_fr Fig. 18. Reflow soldering footprint for LFPAK56; Power-SO8 (SOT669) PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 10 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology Wave soldering footprint information for LFPAK56 package SOT669 4.826 1.78 1.72 2.1 1.4 0.6 (x4) 1.27 0.635 solder lands Dimensions in mm Issue date 15-04-13 15-04-16 sot669_fw Fig. 19. Wave soldering footprint for LFPAK56; Power-SO8 (SOT669) PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 11 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology 13. Legal information injury, death or severe property or environmental damage. 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Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 12 / 13 PSMN1R5-40YSD Nexperia N-channel 40 V, 1.5 mΩ, 240 A standard level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technology Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 2 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 5 11. Package outline.......................................................... 9 12. Soldering................................................................... 10 13. Legal information......................................................12 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 27 August 2019 PSMN1R5-40YSD Product data sheet All information provided in this document is subject to legal disclaimers. 27 August 2019 © Nexperia B.V. 2019. All rights reserved 13 / 13