XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
DESCRIPTION
The 24C04is 4096 bits of serial Electrical Erasable and Programmable Read Only Memory, commonly known as
EEPROM. They are organized as 512 words of 8 bits (1 byte) each. The devices are fabricated with proprietary
advanced CMOS process for low power and low voltage applications. These devices are available in standard 8-lead
DIP, 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-lead DFN and 5-lead SOT- 23/TSOT-23 packages. A standard 2wire serial interface is used to address all read and write functions. Our extended VCC range (1.8V to 5.5V) devices
enables wide spectrum of applications.
FEATURES
Low voltage and low power operations:
24C04: VCC = 1.8V to 5.5V, Industrial temperature range (-40℃ to 85℃).
Maximum Standby current < 1µA.
16 bytes page write mode.
Partial page write operation allowed.
Internally organized: 512 × 8 (4K).
Standard 2-wire bi-directional serial interface.
Write protect pin for hardware data protection.
Schmitt trigger, filtered inputs for noise protection.
Self-timed programming cycle (5ms maximum).
1 MHz (2.5V-5V), 400 kHz (1.8V) Compatibility.
Automatic erase before write operation.
High reliability: typically 1,000,000 cycles endurance.
100 years data retention.
Standard 8-pin DIP/SOP/MSOP/TSSOP/DFN and 5-pin SOT-23/TSOT-23 Pb-free packages.
ORDERING INFORMATION
DEVICE
24C04N
24C04BN
XBLW version 1.0
Package Type
DIP-8
SOP-8
MARKING
24C04N
24C04BN
Packing
Tube
Tape
Packing QTY
2000/Box
4000/Reel
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第 1 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
PIN CONFIGURATION
Pin Name
A2,A1
SDA
SCL
VCC
WP
GND
NC
Pin Function
Device Address Inputs
Serial Data Input/ Open Drain Output
Serial Clock Input
Power Supply
Write Protect
Ground
No-Connect
Table 1
All these packaging types come in conventional or Pb-free certified.
Figure 1: Package types
ABSOLUTE MAXIMUM RATINGS
Industrial operating temperature ............................................................................................................ -4 0 ℃ to 85 ℃
Storage temperature .............................................................................................................................. -50 ℃ to 125 ℃
Input voltage on any pin relative to ground .................................................................................... -0.3V to VCC +0.3V
Maximum voltage .......................................................................................................................................................... 8V
ESD protection on all pins .................................................................................................................................... >4000V
* Stresses exceed those listed under “ Absolute Maximum Rating” may cause permanent damage to the
device. Functional operation of the device at conditions beyond those listed in the specification is not
guaranteed.
Prolonged exposure to extreme conditions may affect device reliability or functionality.
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第 2 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
Block Diagram
Figure 2: Block Diagram
PIN DESCRIPTIONS
(A) SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of this clock is
to clock data out of the EEPROM device.
(B) SERIAL DATA LINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can be wired
OR with other open-drain output devices.
(C) DEVICE / CHIP SELECT ADDRESSES (A2, A1)
These are the chip select input signals for the serial EEPROM devices. Typically, these signals are hardwired to
either VIH or VIL. If left unconnected, they are internally recognized as VIL. However, due to capacitive coupling
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第 3 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
that may appear in customer applications, recommends always connecting the address pins to a known state.
When using a pull-up or pull-down resistor, recommends using 10kΩ or less.
(D) WRITE PROTECT (WP)
The 24C04 devices have a WP pin to protect the whole EEPROM array from programming. Programming
operations are allowed if WP pin is left un-connected or input to VIL. Conversely all programming functions are
disabled if WP pin is connected to VIH or VCC. Read operations is not affected by the WP pin’s input level. If left
unconnected, it is internally recognized as VIL. However, due to capacitive coupling that may appear in customer
applications, recommends always connecting the WP pin to a known state. When using a pull-up or pull-down
resistor, recommends using 10kΩ or less.
MEMORY ORGANIZATION
The 24C04devices have 32 pages. Since each page has 16 bytes, random word addressing to 24C04 will require
9 bits data word addresses.
DEVICE OPERATION
(A) SERIAL CLOCK AND DATA TRANSITIONS
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when Serial clock
SCL is at VIL. Any SDA signal transition may interpret as either a START or STOP condition as described below.
(B) START CONDITION
With SCL ≥ VIH, a SDA transition from high to low is interpreted as a START condition. All valid commands
must begin with a START condition.
(C) STOP CONDITION
With SCL ≥ VIH, a SDA transition from low to high is interpreted as a STOP condition. All valid read or write
commands end with a STOP condition. The device goes into the STANDBY mode if it is after a read command.
A STOP condition after page or byte write command will trigger the chip into the STANDBY mode after the self
timed internal programming finish.
(D) ACKNOWLEDGE
The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The EEPROM
acknowledges the data or address by outputting a "0" after receiving each word. The ACKNOWLEDGE signal
occurs on the 9th serial clock after each word.
(E) STANDBY MODE
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP bit in read
mode, or after completing a self-time internal programming operation.
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第 4 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
(F) SOFT RESET
After an interruption in protocol power loss or system reset, any two-wire part can be reset by following these
steps:
1. Creat a START condition,
2. Clock eighteen data bits “1”,
3. Creat a start condition as SDA is high.
Figure 3: Timing diagram for START and STOP conditions
START Condition
Figure 4: Timing diagram for output ACKNOWLEDGE
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第 5 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
DEVICE ADDRESSING
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to invoke a
valid read or write command. The first four most significant bits of the device address must be 1010, which is
common to all serial EEPROM devices. The next two bits are device address bits. These two device address bits (5th
and 6 th) are to match with the external chip select/address pin states. If a match is made, the EEPROM device outputs
an ACKNOWLEDGE signal after the 8th read/write bit, otherwise the chip will go into STANDBY mode. However,
matching may not be needed for some or all device address bits (5th and 6th ) as noted below. The seventh bit of the
device address (P0) is a memory page address bit.
The last or 8th bit is a read/write command bit. If the 8th bit is at VIH then the chip goes into read mode. If a
“0” is detected, the device enters programming mode.
WRITE OPERATIONS
(A) BYTE WRITE
A write operation requires the seventh bit of the device address (P0) and 8-bit data word address following the
device address word and ACKNOWLEDGE signal. Upon receipt of this address, the EEPROM will respond with a “0”
and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will again output a
“0”. The addressing device, such as a microcontroller, must terminate the write sequence with a STOP condition. At
this time the EEPROM enters into an internallytimed write cycle state. All inputs are disabled during this write cycle
and the EEPROM will not respond until the writing is completed.
(B) PAGE WRITE
A page write is similar to a byte write with the exception that one to sixteen bytes can be programmed along the
same page or memory row. All 24C04are organized to have 16 bytes per memory row or page. With the same write
command as the byte write, the micro-controller does not issue a STOP bit after sending the 1st byte data and
receiving the ACKNOWLEDGE signal from the EEPROM on the 27th clock cycle. Instead it sends out a second 8-bit
data word, with the EEPROM acknowledging at the 36th cycle. This data sending and EEPROM acknowledging cycle
repeats until the microcontroller sends a STOP bit after the n × 9th clock cycle. After which the EEPROM device will
go into a self-timed partial or full page programming mode. After the page programming completes after a time of
TWC, the devices will return to the STANDBY mode.
The least significant 4 bits of the word address (column address) increments internally by one after receiving
each data word. The rest of the word address bits (row address) do not change internally, but pointing to a specific
memory row or page to be programmed. The first page write data word can be of any column address. Up to 16 data
words can be loaded into a page. If more then 16 data words are loaded, the 9th data word will be loaded to the 1st data
word column address. The 10th data word will be loaded to the 2nd data word column address and so on. In other word,
data word address (column address) will “roll” over the previously loaded data.
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第 6 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
(C) ACKNOWLEDGE POLLING
ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal
programming. By issuing a valid read or write address command, the EEPROM will not acknowledge at the 9th clock
cycle if the device is still in the self-timed programming mode. However, if the programming completes and the chip
has returned to the STANDBY mode, the device will return a valid ACKNOWLEDGE signal at the 9th clock cycle.
READ OPERATIONS
The read command is similar to the write command except the 8th read/write bit in address word is set to “1”. The
three read operation modes are described as follows:
(A) CURRENT ADDRESS READ
The EEPROM internal address word counter maintains the last read or write address plus one if the power supply
to the device has not been cut off. To initiate a current address read operation, the micro-controller issues a START bit
and a valid device address word with the read/write bit (8th) set to “1”. The EEPROM will response with an
ACKNOWLEDGE signal on the 9th serial clock cycle. An 8- bit data word will then be serially clocked out. The
internal address word counter will then automatically increase by one. For current address read the micro-controller
will not issue an ACKNOWLEDGE signal on the 18th clock cycle. The micro-controller issues a valid STOP bit after
the 18th clock cycle to terminate the read operation. The device then returns to STANDBY mode.
(B) SEQUENTIAL READ
The sequential read is very similar to current address read. The micro-controller issues a START bit and a valid
device address word with read/write bit (8th) set to “1”. The EEPROM will response with an ACKNOWLEDGE
signal on the 9th serial clock cycle. An 8-bit data word will then be serially clocked out. Meanwhile the internally
address word counter will then automatically increase by one. Unlike current address read, the micro-controller sends
an ACKNOWLEDGE signal on the 18th clock cycle signaling the EEPROM device that it wants another byte of data.
Upon receiving the ACKNOWLEDGE signal, the EEPROM will serially clocked out an 8-bit data word based on the
incremented internal address counter. If the micro-controller needs another data, it sends out an ACKNOWLEDGE
signal on the 27th clock cycle. Another 8-bit data word will then be serially clocked out. This sequential read continues
as long as the micro-controller sends an ACKNOWLEDGE signal after receiving a new data word. When the internal
address counter reaches its maximum valid address, it rolls over to the beginning of the memory array address.
Similar to current address read, the micro-controller can terminate the sequential read by not acknowledging the last
data word received, but sending a STOP bit afterwards instead.
(C) RANDOM READ
Random read is a two-steps process. The first step is to initialize the internal address counter with a target read
address using a “dummy write” instruction. The second step is a current address read. To initialize the internal address
counter with a target read address, the micro-controller issues a START bit first, follows by a valid device address
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第 7 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
th
with the read/write bit (8 ) set to “0”. The EEPROM will then acknowledge. The micro-controller will then send the
address word. Again the EEPROM will acknowledge. Instead of sending a valid written data to the EEPROM, the
micro-controller performs a current address read instruction to read the data. Note that once a START bit is issued, the
EEPROM will reset the internal programming process and continue to execute the new instruction - which is to read
the current address.
Figure 5: Byte Write
Figure 6: Page Write
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XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
Figure 7: Current Address Read
Figure 8: Sequential Read
Figure 9: Random Read
XBLW version 1.0
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第 9 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
Figure 10: SCL and SDA Bus Timing
Electrical Specifications
(A)Power-Up Requirements
During a power-up sequence, the VCC supplied to the device should monotonically rise from GND to the
minimum VCC level, with a slew rate no faster than 0.05 V/μs and no slower then 0.1 V/ms. A decoupling cap
should be connected to the VCC PAD which is no smaller than 10nF.
(B)Device Reset
To prevent inadvertent write operations or any other spurious events from occurring during a power-up sequence,
this device includes a Power-on Reset (POR) circuit. Upon power-up, the device will not respond to any commands
until the VCC level crosses the internal voltage threshold (VPOR) that brings the device out of Reset and into Standby
mode. The system designer must ensure the instructions are not sent to the device until the VCC supply has reached a
stable value greater than or equal to the minimum VCC level.
Figure 11: Power on and Power down
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XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
If an event occurs in the system where the VCC level supplied to the device drops below the maximum VPOR
level specified, it is recommended that a full power cycle sequence be performed by first driving the VCC pin to GND,
waiting at least the minimum tPOFF time and then performing a new power-up sequence in compliance with the
requirements defined in this section.
AC CHARACTERISTICS
Symbol
Parameter
1.8 V
Min Max
2.5V-5.5 V
Min
Max
fSCL
tLOW
tHIGH
tI
tAA
Clock frequency,SCL
400
Clock pulse width low
1.3
0.4
Clock pulse width high
0.6
0.4
(1)
Noise suppression time
50
Clock low to data out valid
0.9
Time the bus must be free
tBUF
1.3
0.5
before a new transmission can start(1)
tHD.STA
START hold time
0.6
0.25
tSU.STA
START set-up time
0.6
0.25
tHD.DAT
Data in hold time
0
0
tSU.DAT
Data in set-up time
100
100
tR
Input rise time(1)
0.3
tF
Input fall time(1)
300
tSU.STo
STOP set-up time
0.6
0.25
tDH
Date out hold time
50
50
(1)
tPWR,R
Vcc slew rate at power up
0.1
50
0.1
Time
required
after
VCC
is
stable
before
the
device
tPUP(1)
100
100
can accept commands
Minimum time at Vcc=0V
tPOFF(1)
500
500
between power cycles
tWR
Write cycle time
5
(1)
Endurance
25℃, Page Mode,3.3V
1,000,000
Notes: 1. This Parameter is expected by characterization but is not fully screened by test.
1000
50
0.55
Unit
kHz
μS
μS
ns
μS
μS
0.3
100
50
μS
μS
μS
ns
μS
ns
μS
ns
V/ms
μS
ms
5
ms
Write Cycles
2. AC Measurement conditions:
RL (Connects to Vcc): 1.3KΩ
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
Input and output timing reference Voltages: 0.5Vcc
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第 11 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
DC CHARACTERISTICS
Symbol
VCC1
ICC1
ICC2
ISB1
ISB2
ISB3
IIL
ILO
VIL
VIH
VOL1
VOL2
Parameter
Test Conditions
Power supply Vcc
Supply read current
Supply write current
Supply current
Supply current
Supply current
Input leakage current
Output leakage current
Input low level
Input high level
Output low level
Output low level
XBLW version 1.0
Min
Typical
1.8
Vcc @ 5.0V SCL = 400 kHz
Vcc @ 5.0V SCL=400 kHz
Vcc @ 1.8V,VIN = Vcc or Vss
Vcc @ 2.5V,VIN = Vcc or Vss
Vcc @ 5.0V,VIN = Vcc or Vss
VIN = Vcc or Vss
VIN = Vcc or Vss
0.5
2.0
-0.6
Vcc × 0.7
Vcc @ 1.8V,lOL =0.15 mA
Vcc @3.0V,lOL =2.1 mA
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Max
Unit
S
5.5
1.0
3.0
1.0
1.0
1.0
3.0
3.0
Vcc × 0.3
Vcc + 0.5
0.2
0.4
V
mA
mA
μA
μA
μA
μA
μA
V
V
V
V
第 12 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
PACKAGE OUTLINE DIMENSIONS
SOT23-5
Symbol
A
A1
A2
b
c
D
E
E1
e
e1
L
θ
XBLW version 1.0
Dimensions In Millimeters
Min
Max
1.050
0.000
1.050
0.300
0.100
2.820
1.500
2.650
1.250
0.100
1.150
0.500
0.200
3.020
1.700
2.950
Dimensions In Inches
Min
Max
0.041
0.000
0.041
0.012
0.004
0.111
0.059
0.104
0.95(BSC)
1.800
0.300
0°
0.049
0.004
0.045
0.020
0.008
0.119
0.067
0.116
0.037(BSC)
2.000
0.600
8°
0.071
0.012
0°
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0.079
0.024
6°
第 13 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
TSOT23-5
Symbol
A
A1
A2
b
c
D
E
E1
e
e1
L
θ
XBLW version 1.0
Dimensions In Millimeters
Min
Max
0.700
0.900
0.000
0.100
0.700
0.800
0.350
0.500
0.080
0.200
2.820
3.020
1.600
1.700
2.650
2.950
0.95(BSC)
1.90(BSC)
0.300
0.600
0°
8°
Dimensions In Inches
Min
Max
0.028
0.035
0.000
0.004
0.028
0.031
0.014
0.020
0.003
0.008
0.111
0.119
0.063
0.067
0.104
0.116
0.037(BSC)
0.075(BSC)
0.012
0.024
0°
8°
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第 14 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
DIP8
Symbol
A
A1
A2
B
B1
C
D
E
E1
e
L
E2
XBLW version 1.0
Dimensions In Millimeters
Min
Max
3.710
0.510
3.200
0.380
4.310
3.600
0.570
Dimensions In Inches
Min
Max
0.146
0.020
0.126
0.015
1.524(BSC)
0.204
9.000
6.200
7.320
0.142
0.022
0.060(BSC)
0.360
9.400
6.600
7.920
0.008
0.354
0.244
0.288
2.540(BSC)
3.000
8.400
0.170
0.014
0.370
0.260
0.312
0.100(BSC)
3.600
9.000
0.118
0.331
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0.142
0.354
第 15 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
SOP8
Symbol
A
A1
A2
b
c
D
E
E1
e
L
θ
XBLW version 1.0
Dimensions In Millimeters
Min
Max
1.350
0.100
1.350
0.330
0.170
4.700
3.800
5.800
1.750
0.250
1.550
0.510
0.250
5.100
4.000
6.200
Dimensions In Inches
Min
Max
0.053
0.004
0.053
0.013
0.006
0.185
0.150
0.228
1.270(BSC)
0.400
0°
0.069
0.010
0.061
0.020
0.010
0.200
0.157
0.244
0.050(BSC)
1.270
8°
0.016
0°
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0.050
8°
第 16 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
TSSOP8
Symbol
D
E
b
c
E1
A
A2
A1
e
L
H
θ
XBLW version 1.0
Dimensions In Millimeters
Min
Max
2.900
4.300
0.190
0.090
6.250
3.100
4.500
0.300
0.200
6.550
1.100
1.000
0.150
0.800
0.020
Dimensions In Inches
Min
Max
0.114
0.169
0.007
0.004
0.246
0.031
0.001
0.65(BSC)
0.500
0.026(BSC)
0.700
0.020
0.25(TYP)
1°
0.122
0.177
0.012
0.008
0.258
0.043
0.039
0.006
0.028
0.01(TYP)
7°
1°
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7°
第 17 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
UDFN8
Symbol
A
A1
b
b1
C
D
D2
e
Nd
E
E2
L
h
XBLW version 1.0
Dimensions In Millimeters
Min
Max
0.450
0.000
0.180
0.550
0.050
0.300
Dimensions In Inches
Min
Max
0.017
0.000
0.007
0.160REF
0.100
1.900
1.400
0.006REF
0.200
2.100
1.600
0.004
0.075
0.055
0.500BSC
1.500BSC
2.900
1.500
0.300
0.200
0.021
0.002
0.039
0.008
0.083
0.062
0.020BSC
0.059BSC
3.100
1.700
0.500
0.300
0.114
0.059
0.012
0.066
文档仅供参考,实际应用测试为准
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0.122
0.067
0.020
0.12
第 18 页 共 19 页
XBLW 24C04
Two-Wire Serial EEPROM 4K(8-bit wide)
Statement:
Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice!
Before placing an order, the customer needs to confirm whether the information obtained is the latest version,
and verify the integrity of the relevant information.
Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be
responsible for complying with safety standards in the system design and whole machine manufacturing using
Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk
of failure may result in personal injury or property losses of the situation occurred!
Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide
customers with better performance, better quality of integrated circuit products.
XBLW version 1.0
文档仅供参考,实际应用测试为准
www.xinboleic.com 技术支持热线:4009682003
第 19 页 共 19 页