CD4072BE

XBLW CD4072 Positive Dual 4-Input General Description The CD4072 provides the positive dual 4-input OR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. Features  Wide supply voltage range from 3V to 15V  Fully static operation  5V, 10V, and 15V parametric ratings  Standardized symmetrical output characteristics  Inputs and outputs are protected against eletrostatic effects  Specified from -40℃ to +105℃  Packaging information: DIP14/SOP14/TSSOP14 ORDERING INFORMATION DEVICE Package Type MARKING Packing Packing QTY CD4072BE CD4072BDTR CD4072BTDTR DIP-14 SOP-14 TSSOP-14 CD4072BE CD4072B CD4072B Tube Tape Tape 1000/Box 2500/Reel 3000/Reel XBLW version 1.0 文档仅供参考，实际应用测试为准 第 1 页 共 11 页 XBLW CD4072 Positive Dual 4-Input Block Diagram And Pin Description Block Diagram Figure 1. Functional diagram Figure 2. Logic diagram(one gate) Pin Configurations XBLW version 1.0 文档仅供参考，实际应用测试为准 第 2 页 共 11 页 XBLW CD4072 Positive Dual 4-Input Pin Description Pin No. Pin Name Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1Y 1A 1B 1C 1D n.c. VSS n.c. 2A 2B 2C 2D 2Y VDD data output data input data input data input data input not connected ground (0V) not connected data input data input data input data input data output supply voltage Function Table Input Output nA nB nC L L L H X X X H X X X H X X X Note: H=HIGH voltage level; L=LOW voltage level;X=don’t care nD L X X X H nY L H H H H Electrical Parameter Absolute Maximum Ratings (Voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter Symbol Conditions Min. Max. Unit supply voltage DC input current input voltage storage temperature total power dissipation device dissipation VDD IIK VI Tstg any one input all inputs - -0.5 -0.5 -65 +18 ±10 VDD +0.5 +150 V mA V ℃ Ptot - - 500 mW - 100 mW ℃ ℃ Soldering temperature XBLW version 1.0 P TL per output transistor DIP 10s SOP 文档仅供参考，实际应用测试为准 245 250 第 3 页 共 11 页 XBLW CD4072 Positive Dual 4-Input Note: [1] For DIP14 packages: above 70℃ the value of Ptot derates linearly with 12mW/K. [2] For SOP14 packages: above 70℃ the value of Ptot derates linearly with 8mW/K. [3] For (T)SSOP14 packages: above 60℃ the value of Ptot derates linearly with 5.5mW/K. Recommended Operating Conditions Parameter Symbol Conditions Min. Typ. Max. Unit supply voltage ambient temperature VDD - 3 - 15 V Tamb in free air -40 - +105 ℃ Electrical Characteristics DC Characteristics 1 (Tamb=25℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter supply current Symbol IDD LOW-level output current IOL HIGH-level output current IOH LOW-level output voltage VOL HIGH-level output voltage VOH LOW-level input voltage VIL HIGH-level input voltage VIH XBLW version 1.0 VO Conditions(V) VIN VDD Min. Tamb=25℃ Typ. Max. Unit - 0, 5 5 - 0.01 0.25 μA - 0, 10 10 - 0.01 0.5 μA - 0, 15 15 - 0.01 1 μA 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0.5, 4.5 1, 9 1.5, 13.5 4.5 9 13.5 0, 5 0, 10 0, 15 0, 5 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 - 5 10 15 5 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 0.51 1.3 3.4 -0.51 -1.6 -1.3 -3.4 4.95 9.95 14.95 3.5 7 11 1 2.6 6.8 -1 -3.2 -2.6 -6.8 0 0 0 5 10 15 - 0.05 0.05 0.05 1.5 3 4 - mA mA mA mA mA mA mA V V V V V V V V V V V V 文档仅供参考，实际应用测试为准 第 4 页 共 11 页 XBLW CD4072 Positive Dual 4-Input input leakage II current DC Characteristics 2 - 0, 15 15 - ±10-5 μA ±0.1 (Tamb=-40℃ to +105℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.) Parameter supply current Symbol IDD LOW-level output current IOL HIGH-level output current IOH LOW-level output voltage VOL HIGH-level output voltage VOH LOW-level input voltage VIL HIGH-level input voltage VIH input leakage current II XBLW version 1.0 Conditions(V) VO VIN VDD Tamb=-40℃ Min. Max. Tamb=+85℃ Min. Max. Tamb=+105℃ Min. Max. Unit - 0, 5 5 - 0.25 - 7.5 - 7.5 μA - 0, 10 10 - 0.5 - 15 - 15 μA - 0, 15 15 - 1 - 30 - 30 μA 0.4 0.5 1.5 4.6 2.5 9.5 13.5 0.5, 4.5 1, 9 1.5, 13.5 4.5 9 13.5 0, 5 0, 10 0, 15 0, 5 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 0, 5 0, 10 0, 15 - 5 10 15 5 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 0.61 1.5 4 -0.61 -1.8 -1.5 -4 4.95 9.95 14.95 3.5 7 11 0.05 0.05 0.05 1.5 3 4 - 0.42 1.1 2.8 -0.42 -1.3 -1.1 -2.8 4.95 9.95 14.95 3.5 7 11 0.05 0.05 0.05 1.5 3 4 - 0.36 0.9 2.4 -0.36 -1.15 -0.9 -2.4 4.95 9.95 14.95 3.5 7 11 0.05 0.05 0.05 1.5 3 4 - mA mA mA mA mA mA mA V V V V V V V V V V V V - 0, 15 15 - ±0.1 - ±1.0 - ±1.0 μA 文档仅供参考，实际应用测试为准 第 5 页 共 11 页 XBLW CD4072 Positive Dual 4-Input AC Characteristics (Tamb=25℃, VSS=0V, tr, tf=20ns, CL=50pF, RL=200KΩ, unless otherwise specified.) Parameter Symbol Conditions propagation delay time tPHL, tPLH see Figure 4 transition time tTHL, tTLH see Figure 4 input capacitance CI Min. Typ. Max. Unit - 125 60 45 100 50 40 250 120 90 200 100 80 ns ns ns ns ns ns - 5 7.5 pF VDD=5V VDD=10V VDD=15V VDD=5V VDD=10V VDD=15V any input Testing Circuit AC Testing Circuit Figure 3. Test circuit for switching times Definitions for test circuit: DUT=Device Under Test CL=Load capacitance including jig and probe capacitance. RT=Termination resistance should be equal to the output impedance Zo of the pulse generator. XBLW version 1.0 文档仅供参考，实际应用测试为准 第 6 页 共 11 页 XBLW CD4072 Positive Dual 4-Input AC Testing Waveforms Figure 4. Propagation delay, output transition time Measurement Points Supply voltage VDD 5V to 15V Input VM 0.5×VDD Output VM 0.5×VDD Test Data Supply voltage VDD VI tr, tf Load CL 5V to 15V VSS or VDD ≤20ns 50pF XBLW version 1.0 Input 文档仅供参考，实际应用测试为准 第 7 页 共 11 页 XBLW CD4072 Positive Dual 4-Input Package Information DIP14 Symbol A A1 A2 B B1 C D E E1 e L E2 XBLW version 1.0 Dimensions In Millimeters Min Max 3.710 4.310 0.510 3.200 3.600 0.380 0.570 1.524(BSC) 0.204 0.360 18.800 19.200 6.200 6.600 7.320 7.920 2.540(BSC) 3.000 3.600 8.400 9.000 文档仅供参考，实际应用测试为准 Dimensions In Inches Min Max 0.146 0.170 0.020 0.126 0.142 0.015 0.022 0.060(BSC) 0.008 0.014 0.740 0.756 0.244 0.260 0.288 0.312 0.100(BSC) 0.118 0.142 0.331 0.354 第 8 页 共 11 页 XBLW CD4072 Positive Dual 4-Input SOP14 XBLW version 1.0 文档仅供参考，实际应用测试为准 第 9 页 共 11 页 XBLW CD4072 Positive Dual 4-Input TSSOP14 SYMBOL A A1 A2 A3 b b1 c c1 D E1 E e L L1 θ XBLW version 1.0 文档仅供参考，实际应用测试为准 MILLIMETER MIN MAX 1.20 0.05 0.15 0.90 1.05 0.39 0.49 0.20 0.30 0.19 0.25 0.13 0.19 0.12 0.14 4.86 5.06 4.30 4.50 6.20 6.60 0.65BSC 0.45 0.75 1.00BSC 0° 8° 第 10 页 共 11 页 XBLW CD4072 Positive Dual 4-Input Statements And Notes Part name Lead and lead compounds Lead frame ○ Plastic resin ○ ○ ○ ○ ○ ○ Chip ○ ○ ○ ○ ○ The lead Plastic sheet installed ○ ○ ○ ○ ○ ○ ○ ○ explanation Cadmium and cadmium compounds ○ Hazardous substances or Elements Polybro Hexavalent Polybro minated Dibutyl chromium minated phthalate biphenyl compounds biphenyls ethers ○ ○ ○ ○ Mercury and mercury compounds ○ Butyl benzyl phthalate Di-2ethylhexyl phthalate Diisobutyl phthalate ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○: Indicates that the content of hazardous substances or elements in the detection limit of the following the SJ/T11363-2006 standard. ×: Indicates that the content of hazardous substances or elements exceeding the SJ/T11363-2006 Standard limit requirements Statement：  Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice! Before placing an order, the customer needs to confirm whether the information obtained is the latest version, and verify the integrity of the relevant information.  Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be responsible for complying with safety standards in the system design and whole machine manufacturing using Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk of failure may result in personal injury or property losses of the situation occurred!  Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide customers with better performance, better quality of integrated circuit products. XBLW version 1.0 文档仅供参考，实际应用测试为准 第 11 页 共 11 页