XBLW CD4050
Six Inverting Buffer and Converter
General Description
The CD4050 provides six non-inverting buffers with high current output capability suitable for driving TTL or
high capacitive loads. Since input voltages in excess of the buffers’ supply voltage are permitted, the buffers may also
be used to convert logic levels of up to 15 V to standard TTL levels.
It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground).
Unused inputs must be connected to VDD, VSS, or another input.
Features
Wide supply voltage range from 3v to 15v
Accepts input voltages in excess of the supply voltage
5V, 10V, and 15V parametric ratings
Specified from -40℃ to +105℃
Packaging information: DIP16/SOP16/TSSOP16
ORDERING INFORMATION
DEVICE
Package Type
MARKING
Packing
Packing QTY
CD4050BE
CD4050BDTR
CD4050BTDTR
DIP-16
SOP-16
TSSOP-16
CD4050BE
CD4050B
CD4050B
Tube
Tape
Tape
1000/Box
2500/Reel
3000/Reel
Block Diagram And Pin Description
XBLW version 1.0
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第 1 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Block Diagram
Figure 1. Functional symbol
Figure 2. Logic diagram for one gate
Figure 3. Input protection circuit
Pin Configurations
Pin Description
XBLW version 1.0
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第 2 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Pin No.
Pin Name
Description
1
2
3
4
VDD
1Y
1A
2Y
supply voltage
output
5
6
7
8
2A
3Y
input
output
3A
VSS
4A
4Y
5A
5Y
n.c.
6A
6Y
n.c.
input
ground supply voltage
9
10
11
12
13
14
15
16
input
output
input
output
input
output
not connected
input
output
not connected
Electrical Parameter
Absolute Maximum Ratings (Tamb=25℃, unless otherwise specified.)
Characteristic
Symbol
Conditions
Min.
Max.
Unit
supply voltage
DC input current
input voltage
output clamping current
input/output current
supply current
storage temperature
VDD
IIK
VI
IOK
II/O
IDD
Tstg
-0.5
-10
-0.5
-65
+18
+18
±10
10
50
+150
soldering temperature
TL
VI < -0.5V
VO < -0.5V or VO > VDD +0.5V
DIP
10s
SOP/TSSOP
V
mA
V
mA
mA
mh
℃
℃
℃
245
260
Recommended Operating Conditions
XBLW version 1.0
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第 3 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
supply voltage
input voltage
ambient temperature
VDD
VI
Tamb
-
3
0
-40
-
15
15
+105
V
V
℃
VDD=5V
-
-
3.75
μs/V
VDD=10V
-
-
0.5
μs/V
VDD=15V
-
-
0.08
μs/V
input transition rise
and fall rate
Δt/ΔV
Electrical Characteristics
DC Characteristics 1 (Tamb=25℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.)
Parameter
Symbol
supply current
LOW-level
output current
HIGH-level
output current
LOW-level
output voltage
HIGH-level
output voltage
LOW-level
input voltage
IDD
IOL
IOH
VOL
VOH
VIL
HIGH-level
input voltage
VIH
input leakage
current
II
VO
Conditions(V)
VIN
VDD
Min.
Tamb=25℃
Typ.
Max.
Unit
-
0, 5
5
-
-
4
μA
-
0, 10
10
-
-
8
μA
-
0, 15
15
-
-
16
μA
0.4
0, 5
5
2.9
-
-
mA
0.5
0, 10
10
10
-
-
mA
1.5
0, 15
15
20
-
-
mA
4.6
0, 5
5
-
-
-0.44
mA
2.5
0, 5
5
-
-
-1.4
mA
9.5
0, 10
10
-
-
-1.1
mA
13.5
0, 15
15
-
-
-3
mA
-
0, 5
5
-
-
0.05
V
-
0, 10
10
-
-
0.05
V
-
0, 15
15
-
-
0.05
V
-
0, 5
5
4.95
-
-
V
-
0, 10
10
9.95
-
-
V
-
0, 15
15
14.95
-
-
V
0.5, 4.5
-
5
-
-
1.5
V
1, 9
-
10
-
-
3
V
1.5, 13.5
-
15
-
-
4
V
0.5, 4.5
-
5
3.5
-
-
V
1, 9
-
10
7
-
-
V
1.5, 13.5
-
15
11
-
-
V
-
0, 15
15
-
-
±0.3
μA
DC Characteristics 2
XBLW version 1.0
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第 4 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
(Tamb=-40℃ to +105℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.)
Parameter
supply
current
Symbol
IDD
LOW-level
output
current
IOL
HIGH-level
output
current
IOH
LOW-level
output
voltage
VOL
HIGH-level
output
voltage
VOH
LOW-level
input voltage
VIL
HIGH-level
input voltage
VIH
input leakage
current
II
Conditions(V)
VO
VIN VDD
Tamb=-40℃
Min.
Max.
Tamb=+105℃
Min. Max.
Unit
-
0, 5
5
-
4
-
30
μA
-
0, 10
10
-
8
-
60
μA
-
0, 15
15
-
16
-
120
μA
0.4
0.5
1.5
4.6
2.5
9.5
13.5
0.5, 4.5
1, 9
1.5, 13.5
0.5, 4.5
1, 9
1.5, 13.5
0, 5
0, 10
0, 15
0, 5
0, 5
0, 10
0, 15
0, 5
0, 10
0, 15
0, 5
0, 10
0, 15
-
5
10
15
5
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
3.5
12
24
4.95
9.95
14.95
3.5
7
11
-0.52
-1.7
-1.3
-3.6
0.05
0.05
0.05
1.5
3
4
-
2.3
8
16
4.95
9.95
14.95
3.5
7
11
-0.36
-1.1
-0.9
-2.4
0.05
0.05
0.05
1.5
3
4
-
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
-
0, 15
15
-
±0.3
-
±1.0
μA
AC Characteristics (Tamb=25℃, VSS=0V, unless otherwise specified.)
XBLW version 1.0
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第 5 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Parameter
Symbol
Conditions
HIGH to LOW
propagation delay
tPHL
nA to nY;
see Figure 5
LOW to HIGH
propagation delay
tPLH
nA to nY;
see Figure 5
HIGH to LOW output
transition time
tTHL
see Figure 5
LOW to HIGH output
transition time
tTLH
see Figure 5
DD
5
10
15
5
10
15
5
10
15
5
10
15
Min.
-
Typ.
35
20
15
55
25
20
25
10
7
60
30
20
Max.
70
35
30
110
55
40
50
20
14
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Testing Circuit
AC Testing Circuit
Figure 4. Test circuit for measuring switching times
Definitions for test circuit:
CL=Load capacitance including jig and probe capacitance.
RT=Termination resistance should be equal to the output impedance Zo of the pulse generator.
AC Testing Waveforms
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第 6 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Figure 5. Input to output propagation delays
Measurement Points
Input
VM
0.5×VDD
Output
VM
0.5×VDD
VI
0V to VDD
Test Data
Supply voltage
VDD
VI
5V to 15V
VDD
Input
VM
0.5×VI
tr, tf
Load
CL
≤20ns
50pF
Package Information
XBLW version 1.0
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第 7 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
DIP16
Symbol
A2
A1
A
L
b
B1
D
E1
e
c
eB
Min.
Dimensions(mm)
3.20
0.51
3.60
3.00
0.36
Max.
3.60
5.33
3.60
0.56
1.52
18.80
6.20
19.94
6.60
2.54
0.20
7.62
0.36
9.30
SOP16
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第 8 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Symbol
A1
A2
b
c
D
E
E1
e
L
θ
Min.
Dimensions (mm)
0.10
1.25
0.33
0.19
9.50
5.80
3.70
Max.
0.25
1.55
0.51
0.25
10.10
6.30
4.10
1.27
0.35
0°
0.89
8°
TSSOP16
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第 9 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
SYMBOL
A
A1
A2
b
c
D
E1
E
e
L
θ
MILLIMETER
MIN
0.05
0.80
0.19
0.09
4.90
4.30
6.20
MAX
1.20
0.15
1.05
0.30
0.20
5.10
4.50
6.60
0.65
0.45
0°
0.75
8°
Statements And Notes
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第 10 页 共 11 页
XBLW CD4050
Six Inverting Buffer and Converter
Part name
Lead and
lead
compounds
Lead frame
○
Plastic resin
○
○
○
○
○
○
Chip
○
○
○
○
○
The lead
Plastic sheet
installed
○
○
○
○
○
○
○
○
explanation
Cadmium
and
cadmium
compounds
○
Hazardous substances or Elements
Polybro
Hexavalent
Polybro
minated
Dibutyl
chromium
minated
biphenyl
phthalate
compounds biphenyls
ethers
○
○
○
○
Mercury
and
mercury
compounds
○
Butyl
benzyl
phthalate
Di-2ethylhexyl
phthalate
Diisobutyl
phthalate
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○: Indicates that the content of hazardous substances or elements in the detection limit of the following the SJ/T11363-2006 standard.
×: Indicates that the content of hazardous substances or elements exceeding the SJ/T11363-2006 Standard limit requirements
Statement:
Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice!
Before placing an order, the customer needs to confirm whether the information obtained is the latest version,
and verify the integrity of the relevant information.
Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be
responsible for complying with safety standards in the system design and whole machine manufacturing using
Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk
of failure may result in personal injury or property losses of the situation occurred!
Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide
customers with better performance, better quality of integrated circuit products.
XBLW version 1.0
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第 11 页 共 11 页