XBLW CD4094
8-Stage Serial Shift Register
General Description
The CD4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data
from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly
to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is
transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the
outputs whenever the output enable (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of CD4094 devices. Serial data is
available at QS1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock
rise time. The same serial data is available at QS2 on the next negative going clock edge. This is used for cascading
CD4094 devices when the clock has a slow rise time.
It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground).
Unused inputs must be connected to VDD, VSS, or another input.
Features
Wide supply voltage range from 3v to 15v
Fully staic operation
5V, 10V, and 15V parametric ratings
Standardized symmetrical output characteristics
Specified from -40℃ to +85℃
Packaging information: DIP16/SOP16/TSSOP16
Ordering Information
DEVICE
Package Type
MARKING
Packing
Packing QTY
CD4094BE
CD4094BDTR
CD4094BTDTR
DIP-16
SOP-16
TSSOP-16
CD4094BE
CD4094B
CD4094B
Tube
Tape
Tape
1000/Box
2500/Reel
3000/Reel
XBLW version 1.0
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第 1 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Block Diagram And Pin Description
Block Diagram
Figure 1. Logic symbol
Figure 2. Functional diagram
Figure 3. Logic diagram
XBLW version 1.0
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第 2 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Figure 4. Timing diagram
Pin Configurations
XBLW version 1.0
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第 3 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Pin Description
Pin No.
Pin Name
Description
1
2
3
4
STR
D
CP
QP0
strobe input
data input
clock input
parallel output
5
6
7
8
QP1
QP2
parallel output
parallel output
QP3
VSS
QS1
QS2
QS7
QS6
QS5
QS4
OE
VDD
parallel output
ground supply voltage
9
10
11
12
13
14
15
16
serial output
serial output
parallel output
parallel output
parallel output
parallel output
output enable input
supply voltage
Function Table
Input
Parallel output
Serial output
CP
OE
STR
D
QP0
QPn
QS1
↑
L
X
X
Z
Z
Q6S
↓
L
X
X
Z
Z
NC
↑
H
L
X
NC
NC
Q6S
↑
H
H
L
L
QPn-1
Q6S
↑
H
H
H
H
QPn-1
Q6S
↓
H
H
H
NC
NC
NC
Note: H=HIGH voltage level; L=LOW voltage level; X=don’t care; Z=HIGH-impedance OFF-state;
QS2
NC
Q7S
NC
NC
NC
Q7S
NC=no change; ↑=positive-going transition; ↓=negative-going transition;
Q6S=the data in register stage 6 before the LOW to HIGH clock transition;
Q7S=the data in register stage 7 before the HIGH to LOW clock transition.
XBLW version 1.0
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第 4 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Electrical Parameter
Absolute Maximum Ratings (Tamb=25℃, unless otherwise specified.)
Characteristic
Symbol
Conditions
Min.
Max.
Unit
supply voltage
DC input current
input voltage
storage temperature
total power dissipation
device dissipation
VDD
IIK
VI
Tstg
Ptot
P
-0.5
-10
-0.5
-65
-
+18
+18
+150
500
100
soldering temperature
TL
any one input
all inputs
Per output transistor
DIP
10s
SOP/TSSOP
V
mA
V
℃
mW
mW
℃
℃
245
260
Note:
[1] For DIP16 packages: above 70℃ the value of Ptot derates linearly with 12mW/K.
[2] For SOP16 packages: above 70℃ the value of Ptot derates linearly with 8mW/K.
[3] For (T)SSOP16 packages: above 60℃ the value of Ptot derates linearly with 5.5mW/K.
Recommended Operating Conditions
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
supply voltage
ambient temperature
VDD
Tamb
data setup time
tSU
clock pulse width
tW
3
-40
125
55
35
200
100
83
clock input frequency
fmax
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
-
15
+85
1.25
2.5
3
V
℃
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
VDD=5V
-
-
15
μs
VDD=10V
-
-
5
μs
VDD=15V
-
-
5
μs
VDD=5V
200
-
-
μs
VDD=10V
80
-
-
μs
VDD=15V
70
-
-
μs
clock rise and fall time
strobe setup time
XBLW version 1.0
trCL,tfCL
tW
dc
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第 5 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Electrical Characteristics
DC Characteristics 1 (Tamb=25℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.)
Parameter
supply current
LOW-level
output current
HIGH-level
output current
LOW-level
output voltage
HIGH-level
output voltage
LOW-level
input voltage
Symbol
IDD
IOL
IOH
VOL
VOH
VIL
VO
Conditions(V)
VIN
VDD
Min.
Tamb=25℃
Typ.
Max.
Unit
-
0, 5
5
-
0.04
5
μA
-
0, 10
10
-
0.04
10
μA
-
0, 15
15
-
0.04
20
μA
0.4
0, 5
5
0.51
1
-
mA
0.5
0, 10
10
1.3
2.6
-
mA
1.5
0, 15
15
3.4
6.8
-
mA
4.6
0, 5
5
-0.51
-1
-
mA
2.5
0, 5
5
-1.6
-3.2
-
mA
9.5
0, 10
10
-1.3
-2.6
-
mA
13.5
0, 15
15
-3.4
-6.8
-
mA
-
0, 5
5
-
-
0.05
V
-
0, 10
10
-
-
0.05
V
-
0, 15
15
-
-
0.05
V
-
0, 5
5
4.95
5
-
V
-
0, 10
10
9.95
10
-
V
-
0, 15
15
14.95
15
-
V
0.5, 4.5
-
5
-
-
1.5
V
1, 9
-
10
-
-
3
V
1.5, 13.5
-
15
-
-
4
V
0.5, 4.5
-
5
3.5
-
-
V
1, 9
-
10
7
-
-
V
1.5, 13.5
-
15
11
-
-
V
HIGH-level
input voltage
VIH
input leakage
current
II
-
0, 15
15
-
±10-5
±0.1
μA
OFF-state output
current
IOZ
0, 15
0, 15
15
-
±10-4
±0.4
μA
XBLW version 1.0
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第 6 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
DC Characteristics 2
(Tamb=-40℃ to +85℃, voltages are referenced to VSS (ground=0V), unless otherwise specified.)
Parameter
supply current
Symbol
Tamb=+85℃
Min. Max.
Unit
0, 5
5
-
5
-
150
μA
-
0, 10
10
-
10
-
300
μA
-
0, 15
15
-
20
-
600
μA
0.4
0.5
1.5
4.6
2.5
9.5
13.5
0.5, 4.5
1, 9
1.5, 13.5
0.5, 4.5
1, 9
1.5, 13.5
0, 5
0, 10
0, 15
0, 5
0, 5
0, 10
0, 15
0, 5
0, 10
0, 15
0, 5
0, 10
0, 15
-
5
10
15
5
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
0.61
1.5
4
-0.61
-1.8
-1.5
-4
4.95
9.95
14.95
3.5
7
11
0.05
0.05
0.05
1.5
3
4
-
0.42
1.1
2.8
-0.42
-1.3
-1.1
-2.8
4.95
9.95
14.95
3.5
7
11
0.05
0.05
0.05
1.5
3
4
-
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
II
-
0, 15
15
-
±0.1
-
±1
μA
IOZ
0, 15
0, 15
15
-
±0.4
-
±12
μA
IDD
IOL
HIGH-level
output current
IOH
LOW-level
output voltage
VOL
HIGH-level
output voltage
VOH
LOW-level
input voltage
VIL
HIGH-level
input voltage
VIH
XBLW version 1.0
Tamb=-40℃
Min. Max.
-
LOW-level
output current
input leakage
current
OFF-state output
current
Conditions(V)
VO
VIN VDD
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第 7 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
AC Characteristics (Tamb=25℃, VSS=0V, tr,tf=20ns,CL=50pF,RL=200KΩ,unless otherwise specified.)
Parameter
Symbol
Conditions
CP to QS1;
see Figure 6
propagation
delay time
CP to QS2;
see Figure 6
tPHL, tPLH
CP to QPn;
see Figure 6
STR to QPn;
see Figure 7
HIGH to OFF-state/OFF
-state to HIGH
propagation delay
tPHZ, tPZH
OE to QPn;
see Figure 8
LOW to OFF-state/OFFstate to LOW
propagation delay
tPLZ,tPZL
OE to QPn;
see Figure 8
minimum HIGH
strobe pulse;
see Figure 7
pulse width
tW
data setup time
tSU
D to CP;
see Figure 9
transition time
tt
-
clock input rise
and fall time
trCL, tfCL
-
Maximum clock
frequency
fmax
see Figure 6
input
CI
XBLW version 1.0
minimum LOW
clock pulse;
see Figure 6
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
Min.
Typ.
Max.
Unit
15
5
5
1.25
2.5
3
300
125
95
230
110
75
420
195
135
290
145
100
140
60
45
100
50
40
100
40
35
100
50
40
60
30
20
100
50
40
2.5
5
6
5
600
250
190
460
220
150
840
390
270
580
290
200
280
120
90
200
100
80
200
80
70
200
100
83
125
55
35
200
100
80
7.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
us
us
MHz
MHz
MHz
pF
any input
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第 8 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
capacitance
Note: tt is the same as tTLH and tTHL.
Testing Circuit
AC Testing Circuit
Figure 5. Test circuit for switching times
Definitions for test circuit:
DUT=Device Under Test
CL=Load capacitance including jig and probe capacitance.
RT=Termination resistance should be equal to the output impedance Zo of the pulse generator.
RL=Load resistance
VEXT=External voltage for measuring switching times
XBLW version 1.0
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第 9 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
AC Testing Waveforms
Figure 6. Clock to outputs propagation delays, and clock pulse width and maximum frequency
Figure 7. Strobe to output propagation delays, and strobe pulse width, set up and hold times
XBLW version 1.0
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第 10 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Figure 8. 3-state output enable and disable times for OE input
Figure 9. Data input data set up and hold times
XBLW version 1.0
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第 11 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Measurement Points
Supply voltage
VDD
5V to 15V
Input
VM
0.5×VDD
Output
VX
0.1×VDD
VM
0.5×VDD
VY
0.9×VDD
Test Data
Supply voltage
VDD
VI
tr, tf
CL
RL
5V to 15V
VSS or VDD
≤20ns
50pF
1KΩ
XBLW version 1.0
Input
Load
tPHL,tPLH
Load
tPHZ,tPZH
tPLZ,tPZL
open
VSS
VDD
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第 12 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Package Information
DIP16
Symbol
A
A1
A2
B
B1
C
D
E
E1
e
L
E2
XBLW version 1.0
Dimensions In Millimeters
Min
Max
3.710
4.310
0.510
3.200
3.600
0.380
0.570
1.524(BSC)
0.204
0.360
18.800
19.200
6.200
6.600
7.320
7.920
2.540(BSC)
3.000
3.600
8.400
9.000
Dimensions In Inches
Min
Max
0.146
0.170
0.020
0.126
0.142
0.015
0.022
0.060(BSC)
0.008
0.014
0.740
0.756
0.244
0.260
0.288
0.312
0.100(BSC)
0.118
0.142
0.331
0.354
文档仅供参考,实际应用测试为准
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第 13 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
SOP16
Symbol
A
A1
A2
b
c
D
E
E1
e
L
θ
XBLW version 1.0
Dimensions In Millimeters
Min
Max
1.350
1.750
0.100
0.250
1.350
1.550
0.330
0.510
0.170
0.250
9.800
10.200
3.800
4.000
5.800
6.200
1.270(BSC)
0.400
1.270
0°
8°
Dimensions In Inches
Min
Max
0.053
0.069
0.004
0.010
0.053
0.061
0.013
0.020
0.007
0.010
0.386
0.402
0.150
0.157
0.228
0.244
0.050(BSC)
0.016
0.050
0°
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8°
第 14 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
TSSOP16
SYMBOL
A
A1
A2
A3
b
b1
c
c1
D
E
E1
e
L
L1
θ
XBLW version 1.0
MIN
0.05
0.90
0.39
0.20
0.19
0.13
0.12
4.90
6.20
4.30
0.45
0
MILLIMETER
NOM
1.00
0.44
0.22
0.13
5.00
6.40
4.40
0.65BSC
0.60
1.00BSC
-
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MAX
1.20
0.15
1.05
0.49
0.28
0.25
0.17
0.14
5.10
6.60
4.50
0.75
8°
第 15 页 共 16 页
XBLW CD4094
8-Stage Serial Shift Register
Statements And Notes
Part name
Lead and
lead
compounds
Lead frame
○
Plastic resin
○
○
○
○
○
○
Chip
○
○
○
○
○
The lead
Plastic sheet
installed
○
○
○
○
○
○
○
○
○
○
explanation
Cadmium
and
cadmium
compounds
○
Hazardous substances or Elements
Polybro
Hexavalent
Polybro
minated
Dibutyl
chromium
minated
biphenyl
phthalate
compounds biphenyls
ethers
○
○
○
○
Mercury
and
mercury
compounds
○
Butyl
benzyl
phthalate
Di-2ethylhexyl
phthalate
Diisobutyl
phthalate
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○
○: Indicates that the content of hazardous substances or elements in the detection limit of the following the SJ/T11363-2006 standard.
×: Indicates that the content of hazardous substances or elements exceeding the SJ/T11363-2006 Standard limit requirements
Statement:
Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice!
Before placing an order, the customer needs to confirm whether the information obtained is the latest version,
and verify the integrity of the relevant information.
Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be
responsible for complying with safety standards in the system design and whole machine manufacturing using
Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk
of failure may result in personal injury or property losses of the situation occurred!
Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide
customers with better performance, better quality of integrated circuit products.
XBLW version 1.0
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第 16 页 共 16 页