PIMN32X

PIMN32 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 16 February 2022 Product data sheet 1. General description NPN/NPN Resistor-Equipped double Transistor (RET) in a small SOT457 (SC-74) SurfaceMounted Device (SMD) plastic package. PNP/PNP complement: PIMP32 NPN/PNP complement: PIMC32 2. Features and benefits • • • • • 500 mA output current capability Built-in bias resistors Simplifies circuit design Reduces component count Reduces pick and place costs 3. Applications • • • • Digital applications Cost-saving alternative to BC817 series in digital applications Control of IC inputs Switching loads 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit open base - - 50 V - - 500 mA kΩ Per transistor VCEO collector-emitter voltage IO output current R1 bias resistor 1 (input) [1] 1.54 2.2 2.86 R2/R1 bias resistor ratio [1] 4.1 4.55 5 [1] See section "Test information" for resistor calculation and test conditions. PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 GND1 GND (emitter) TR1 2 I1 input (base) TR1 3 O2 output (collector) TR2 4 GND2 GND (emitter) TR2 5 I2 input (base) TR2 6 O1 output (collector) TR1 Graphic symbol O1 6 5 4 I2 R1 GND2 R2 TR2 TR1 1 2 3 R2 R1 SC-74; TSOP6 (SOT457) GND1 I1 O2 aaa-019894 6. Ordering information Table 3. Ordering information Type number Package Name PIMN32 Description Version SC-74; TSOP6 plastic, surface-mounted package (SC-74; TSOP6); 6 leads SOT457 7. Marking Table 4. Marking codes Type number Marking code PIMN32 4G 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 5 V VI input voltage -5 12 V IO output current - 500 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 290 mW Ptot total power dissipation Tamb ≤ 25 °C [1] - 420 mW Tj junction temperature - 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C Per transistor Per device [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 µm copper, tin-plated and standard footprint. PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 2 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 006aab531 500 Ptot (mW) 400 300 200 100 0 - 75 - 25 25 75 125 175 Tamb (°C) FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint Fig. 1. Per device: Power derating curve 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit - - 432 K/W - - 105 K/W - - 298 K/W Per transistor Rth(j-a) thermal resistance from in free air junction to ambient Rth(j-sp) thermal resistance from junction to solder point [1] Per device Rth(j-a) [1] thermal resistance from in free air junction to ambient [1] Device mounted on an FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint. 006aaa494 103 δ= 1 Zth(j-a) (K/W) 0.50 102 0.75 0.33 0.20 0.10 0.05 10 0.02 0.01 0 1 10- 5 10- 4 10- 3 10- 2 10- 1 1 10 102 tp (s) 103 FR4 PCB, single-sided, 35µm copper, tin-plated and standard footprint Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 3 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor V(BR)CBO collector-base breakdown voltage IC = 100 µA; IE = 0 A; Tamb = 25 °C 50 - - V V(BR)CEO collector-emitter breakdown voltage IC = 10 mA; IB = 0 A; Tamb = 25 °C 50 - - V ICBO collector-base cut-off current VCB = 50 V; IE = 0 A; Tamb = 25 °C - - 100 nA ICEO collector-emitter cut-off VCE = 50 V; IB = 0 A; Tamb = 25 °C current - - 0.5 µA IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A; Tamb = 25 °C - - 0.65 mA hFE DC current gain VCE = 5 V; IC = 50 mA; Tamb = 25 °C 70 - - VCEsat collector-emitter saturation voltage IC = 50 mA; IB = 2.5 mA; Tamb = 25 °C - - 100 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C 0.4 0.65 1 V VI(on) on-state input voltage VCE = 0.3 V; IC = 20 mA; Tamb = 25 °C 0.5 0.95 1.4 V R1 bias resistor 1 (input) [1] 1.54 2.2 2.86 kΩ R2/R1 bias resistor ratio [1] 4.1 4.55 5 Cc collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C - 7 - pF fT transition frequency VCE = 5 V; IC = 50 mA; f = 100 MHz; Tamb = 25 °C - 225 - MHz [1] [2] [2] See section "Test information" for resistor calculation and test conditions. Characteristics of built-in transistor 006aaa322 103 1.5 IC (A) (1) (2) (3) hFE aaa-012434 0.5 1.35 0.4 1.2 1.05 102 0.9 0.3 0.75 0.6 0.2 10 0.45 0.3 0.1 IB = 0.15 mA 1 10- 1 1 10 102 IC (mA) 0 103 VCE = 5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -40 °C Fig. 3. 0 1 2 3 4 VCE (V) 5 Tamb = 25 °C Fig. 4. Collector current as a function of collectoremitter voltage; typical values DC current gain as a function of collector current; typical values PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 4 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 006aaa324 10 006aaa325 10 VI(on) (V) VI(off) (V) (1) 1 (1) 1 (2) (2) (3) 10- 1 10- 1 Fig. 5. 1 (3) 102 10 IC (mA) 10- 1 10- 1 103 1 IC (mA) 10 VCE = 0.3 V (1) Tamb = -40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C VCE = 5 V (1) Tamb = -40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C On-state input voltage as a function of collector Fig. 6. current; typical values Off-state input voltage as a function of collector current; typical values aaa-012448 10-1 Cc (pF) (1) (2) VCEsat (V) aaa-012439 25 20 (3) 15 10 5 10-2 1 10 102 IC (mA) 0 103 IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = -40 °C Fig. 7. Product data sheet 10 20 30 40 50 VCB (V) f = 1 MHz Tamb = 25 °C Fig. 8. Collector-emitter saturation voltage as a function of collector current; typical values PIMN32 0 Collector capacitance as a function of collectorbase voltage; typical values All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 5 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ aaa-012066 103 fT (MHz) 102 10 1 10-1 1 10 102 IC (mA) 103 f = 100 MHz Tamb = 25 °C VCE = 5 V Fig. 9. Transition frequency as a function of collector current; typical values of built-in transistor PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 6 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 11. Test information Resistor calculation • Calculation of bias resistor 1 (R1) • Calculation of bias resistor ratio (R2/R1) n.c. II1; II2 R1 II3; II4 R2 GND aaa-020082 Fig. 10. Resistor test circuit Resistor test conditions Table 8. Resistor test conditions R1 (kΩ) 2.2 R2 (kΩ) Test conditions 10 II1 II2 II3 II4 0.7 mA 0.8 mA -0.45 mA -0.55 mA 12. Package outline 3.1 2.7 6 3.0 2.5 1.7 1.3 1.1 0.9 5 4 2 3 0.6 0.2 pin 1 index 1 0.95 1.9 0.40 0.25 Dimensions in mm 0.26 0.10 18-03-11 Fig. 11. Package outline SC-74; TSOP6 (SOT457) PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 7 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 13. Soldering 3.45 1.95 0.45 0.55 (6×) (6×) 0.95 solder lands solder resist 3.3 2.825 0.95 solder paste occupied area 0.7 (6×) Dimensions in mm 0.8 (6×) 2.4 sot457_fr Fig. 12. Reflow soldering footprint for SC-74; TSOP6 (SOT457) 5.3 1.5 (4×) 1.475 0.45 (2×) 5.05 1.475 solder lands solder resist occupied area Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 sot457_fw Fig. 13. Wave soldering footprint for SC-74; TSOP6 (SOT457) PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 8 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 14. Revision history Table 9. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PIMN32 v.1 Product data sheet - - PIMN32 Product data sheet 20220216 All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 9 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. 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Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 10 / 11 PIMN32 Nexperia 50 V, 500 mA NPN/NPN Resistor-Equipped double Transistor (RET); R1 = 2.2 kΩ, R2 = 10 kΩ Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 2 9. Thermal characteristics............................................... 3 10. Characteristics............................................................ 4 11. Test information.......................................................... 7 12. Package outline.......................................................... 7 13. Soldering..................................................................... 8 14. Revision history..........................................................9 15. Legal information......................................................10 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 16 February 2022 PIMN32 Product data sheet All information provided in this document is subject to legal disclaimers. 16 February 2022 © Nexperia B.V. 2022. All rights reserved 11 / 11