PSMN4R3-40MSHX

PSMN4R3-40MSH N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology 27 April 2020 Product data sheet 1. General description 95 A, standard level N-channel enhancement mode MOSFET in 175 °C LFPAK33 package using advanced TrenchMOS Superjunction technology. This product has been designed and qualified for high efficiency applications at high switching frequencies. 2. Features and benefits • • • • • • • Avalanche rated, 100% tested NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery' Low QRR, QG and QGD for high system efficiency, especially at high switching frequencies Low spiking and ringing for low EMI designs High reliability clip bonded and solder die attach Mini Power SO8 package; no glue, no wire bonds, qualified to 175 °C Exposed leads can be wave soldered, visual solder joint inspection and high quality solder joints Low parasitic inductance and resistance 3. Applications • • • • Secondary side synchronous rectification DC-to-DC converters Brushless DC motor drive LED lighting 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 40 V ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - - 95 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 90 W Tj junction temperature -55 - 175 °C VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 3.5 4.3 mΩ ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 1.1 3.6 7.3 nC 15 23 32 nC [1] Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge [1] 95A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 S source 2 S source 3 S source G 4 G gate mbb076 mb D Mounting base; connected to drain D 1 2 3 S 4 LFPAK33 (SOT1210) 6. Ordering information Table 3. Ordering information Type number Package PSMN4R3-40MSH Name Description Version LFPAK33 Plastic, single ended surface mounted package (LFPAK33); 8 leads; 0.65 mm pitch SOT1210 7. Marking Table 4. Marking codes Type number Marking code PSMN4R3-40MSH 4H3S40 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 40 V VDSM peak drain-source voltage tp ≤ 20 ns; f ≤ 500 kHz; EDS(AL) ≤ 200 nJ; pulsed - 45 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 40 V VGS gate-source voltage -20 20 V Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 90 W ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - 95 A VGS = 10 V; Tmb = 100 °C; Fig. 2 - 69 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 392 A [1] IDM peak drain current Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C - 95 A Source-drain diode IS PSMN4R3-40MSH Product data sheet source current Tmb = 25 °C All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 2 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology Symbol Parameter Conditions Min Max Unit ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 392 A Avalanche ruggedness EDS(AL)S IAS [1] [2] ID = 32.6 A; Vsup ≤ 40 V; RGS = 50 Ω; non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 117 µs [2] - 99 mJ ID = 25 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped; tp = 204 µs [2] - 132 mJ [2] - 70 A non-repetitive avalanche Vsup ≤ 40 V; VGS = 10 V; Tj(init) = 25 °C; current RGS = 50 Ω 95A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Protected by 100% test 03aa16 120 aaa-029734 100 ID (A) Pder (%) (1) 80 80 60 40 40 20 0 Fig. 1. 0 50 100 150 Tmb (°C) 0 200 Fig. 2. Product data sheet 25 50 75 100 125 150 175 Tmb (°C) 200 VGS ≥ 10 V (1) 95A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB, thermal design and operating temperature. Normalized total power dissipation as a function of mounting base temperature PSMN4R3-40MSH 0 Continuous drain current as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 3 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology ID (A) aaa-031176 103 Limit RDSon = VDS / ID 102 tp = 10 µs DC 100 µs 10 1 ms 10 ms 100 ms 1 10-1 10-1 1 10 102 VDS (V) Tmb = 25 °C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Min Typ Max Unit Rth(j-mb) thermal resistance from Fig. 4 junction to mounting base Conditions - 1.48 1.67 K/W Rth(j-a) thermal resistance from Fig. 5 junction to ambient Fig. 6 - 50 - K/W - 130 - K/W aaa-029737 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 P 10-1 0.05 0.02 10-2 10-6 Fig. 4. single shot 10-5 δ= 10-3 10-2 T t tp 10-4 tp T 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 4 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology aaa-028025 aaa-028026 Copper area 25.4 mm x 25.4 mm; 70 µm thick on FR4 board Fig. 5. PCB layout for thermal resistance from junction to ambient 70 µm thick copper on FR4 board Fig. 6. PCB layout with minimum footprint for thermal resistance from junction to ambient 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS=VGS; Tj = 25 °C 2.4 3 3.6 V ΔVGS(th)/ΔT gate-source threshold voltage variation with temperature 25 °C ≤ Tj ≤ 150 °C - -5.9 - mV/K IDSS drain leakage current VDS = 32 V; VGS = 0 V; Tj = 25 °C - 0.01 1 µA VDS = 32 V; VGS = 0 V; Tj = 125 °C - 2 - µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; Fig. 10 - 3.5 4.3 mΩ VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 11 - - 9.4 mΩ f = 1 MHz; Tj = 25 °C 0.3 0.8 2 Ω ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 15 23 32 nC ID = 0 A; VDS = 0 V; VGS = 10 V - 12.3 - nC ID = 25 A; VDS = 20 V; VGS = 10 V; Fig. 12; Fig. 13 4.4 7.3 11 nC 2.8 4.7 7 nC 1.5 2.6 3.8 nC 1.1 3.6 7.3 nC - 4.5 - V Static characteristics V(BR)DSS IGSS RDSon RG gate leakage current drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gatesource charge QGS(th-pl) post-threshold gatesource charge QGD gate-drain charge VGS(pl) gate-source plateau voltage PSMN4R3-40MSH Product data sheet ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13 All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 5 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology Symbol Parameter Conditions Min Typ Max Unit Ciss input capacitance 1086 1670 2338 pF Coss output capacitance VDS = 25 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; Fig. 14 363 559 782 pF Crss reverse transfer capacitance 25 83 182 pF td(on) turn-on delay time - 6.5 - ns tr rise time - 4.5 - ns td(off) turn-off delay time - 12.4 - ns tf fall time Qoss output charge VDS = 20 V; RL = 0.8 Ω; VGS = 10 V; RG(ext) = 5 Ω - 4.4 - ns VGS = 0 V; VDS = 20 V; f = 1 MHz; Tj = 25 °C - 17.2 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15 - 0.83 1 V trr reverse recovery time - 26 - ns Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 20 V; Fig. 16 [1] - 20 - nC ta reverse recovery rise time - 16 - ns tb reverse recovery fall time - 10 - ns [1] includes capacitive recovery aaa-029738 120 ID (A) 100 5.5 V 12 10 V 80 aaa-029739 16 RDSon (mΩ) VGS =5 V 6V 60 8 40 4 4.5 V 20 4V 0 Fig. 7. 0 1 2 3 VDS (V) 0 4 0 4 8 12 16 VGS (V) 20 Tj = 25 °C Tj = 25 °C; ID = 25 A Output characteristics; drain current as a Fig. 8. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 6 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology aaa-031178 120 ID (A) 100 aaa-029741 16 RDSon (mΩ) 4.5 V 5V 5.5 V 12 80 60 8 6V 40 175°C 20 0 0 1 2 3 4 25°C 4 5 VGS (V) VGS = 10 V 0 6 VDS = 8 V Fig. 9. a 0 20 40 60 80 100 ID (A) 120 Tj = 25 °C Transfer characteristics; drain current as a function of gate-source voltage; typical values Fig. 10. Drain-source on-state resistance as a function of drain current; typical values aaa-026897 2.4 VGS (V) 2 aaa-031177 10 8 1.6 6 32 V 1.2 20 V 4 VDS = 8 V 0.8 2 0.4 0 -60 -30 0 30 60 90 120 150 Tj (°C) 0 180 0 5 10 15 20 QG (nC) 25 Tj = 25 °C; ID = 25 A Fig. 11. Normalized drain-source on-state resistance factor as a function of junction temperature PSMN4R3-40MSH Product data sheet Fig. 12. Gate-source voltage as a function of gate charge; typical values All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 7 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology aaa-029742 104 C (pF) VDS ID Ciss 103 VGS(pl) Coss VGS(th) VGS QGS2 QGS1 QGS 102 QGD QG(tot) Crss 003aaa508 10 10-1 Fig. 13. Gate charge waveform definitions 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values IS (A) 003aal160 aaa-031179 102 ID (A) trr ta tb 0 10 0.25 IRM 175°C 1 0 0.2 0.4 Tj = 25°C 0.6 0.8 1 VSD (V) IRM t (s) 1.2 VGS = 0 V Fig. 16. Reverse recovery timing definition Fig. 15. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 8 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology 11. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E A e1 A c1 b1 L1 SOT1210 D2 mounting base D1 (D) H E1 L 1 4 b e w A A1 C X c Lp y C detail X 0 2.5 5 mm scale Dimensions Unit(1) mm A A1 b(1) max 0.90 0.10 0.35 nom min 0.80 0.00 0.25 b1(1) c c1 2.4 0.20 0.30 2.2 0.10 0.20 D ref 2.60 D1 2.35 1.90 D2 0.50 E(1) E1 3.40 2.45 3.20 2.00 e e1 0.65 0.65 H L L1 Lp 3.40 0.65 0.25 0.50 3.20 0.45 0.13 0.30 w 0.20 0.10 Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version sot1210_po References IEC JEDEC y JEITA European projection Issue date 14-04-25 16-08-09 SOT1210 Fig. 17. Package outline LFPAK33 (SOT1210) PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 9 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology 12. Soldering Footprint information for reflow soldering of LFPAK33 package SOT1210 2.35 2.25 0.635 0.617 0.05 (all around) 0.75 0.62 1.05 1.91 2.47 0.51 3.9 0.51 0.6 0.83 0.4 (x8) solder land occupied area solder paste aperture 0.65 (x6) 0.3 (x8) 0.25 (x6) Notes : 1. Dimensions in mm solder resist sot1210_fr Fig. 18. Reflow soldering footprint for LFPAK33 (SOT1210) PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 10 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 13. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 11 / 12 PSMN4R3-40MSH Nexperia N-channel 40 V, 4.3 mΩ, standard level MOSFET in LFPAK33 using NextPower-S3 technology Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 2 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 5 11. Package outline.......................................................... 9 12. Soldering................................................................... 10 13. Legal information......................................................11 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 27 April 2020 PSMN4R3-40MSH Product data sheet All information provided in this document is subject to legal disclaimers. 27 April 2020 © Nexperia B.V. 2020. All rights reserved 12 / 12