TP65H480G4JSG-TR

TP65H480G4JSG 650V SuperGaN® GaN FET in PQFN (source tab) Description Features The TP65H480G4JSG 650V, 480mΩ Gallium Nitride (GaN) FET is a normally-off device using Transphorm’s Gen IV platform. It combines a state-of-the-art high voltage GaN HEMT with a low voltage silicon MOSFET to offer superior reliability and performance. The Gen IV SuperGaN® platform uses advanced epi and patented design technologies to simplify manufacturability while improving efficiency over silicon via lower gate charge, output capacitance, crossover loss, and reverse recovery charge. Related Literature • • • • AN0003: Printed Circuit Board Layout and Probing AN0007: Recommendations for Vapor Phase Reflow AN0009: Recommended External Circuitry for GaN FETs AN0012: PQFN Tape and Reel Information Product Series and Ordering Information Part Number Package Package Configuration TP65H480G4JSG-TR* 5x6 PQFN Source * “-TR” suffix refers to tape and reel. Refer to AN0012 for details. TP65H480G4JSG PQFN (bottom view) S D G Pin 1 Cascode Schematic Symbol September 12, 2023 tp65h480g4lsg.3v3 • • • • Gen IV technology JEDEC-qualified GaN technology Dynamic RDS(on)eff production tested Robust design, defined by — Wide gate safety margin — Transient over-voltage capability • Very low QRR • Reduced crossover loss • RoHS compliant and Halogen-free packaging Benefits • Achieves increased efficiency in both hard- and softswitched circuits — Increased power density — Reduced system size and weight — Overall lower system cost • Easy to drive with commonly-used gate drivers • GSD pin layout improves high speed design Applications • • • • Consumer Power adapters Low power SMPS Lighting Key Specifications VDS (V) 650 VDSS(TR)(V) 800 RDS(on) (mΩ) max* 560 QRR (nC) typ 14 QG (nC) typ 9 * Dynamic RDS(on); see Figures 18 and 19 Cascode Device Structure © 2023 Transphorm Inc. Subject to change without notice. 1 TP65H480G4JSG Absolute Maximum Ratings (Tc=25°C unless otherwise stated.) Symbol VDSS VDSS (TR) VGSS PD ID IDM TC TJ TS TSOLD Parameter Limit Value Unit Drain to source voltage (TJ = -55°C to 150°C) 650 Transient drain to source voltage a 800 Gate to source voltage ±18 Maximum power dissipation @TC=25°C 13.2 W Continuous drain current @TC=25°C b 3.6 A Continuous drain current @TC=100°C b 2.3 A Pulsed drain current (pulse width: 10µs) 17 A Case -55 to +150 °C Junction -55 to +150 °C -55 to +150 °C 260 °C Operating temperature Storage temperature Reflow soldering temperature c V Notes: a. In off-state, spike duration < 30s, non-repetitive b. For increased stability at high current operation, see Circuit Implementation on page 3 c. Reflow MSL3 VDSS(TR) VDSS(BL) Thermal Resistance Symbol Parameter Maximum Unit RΘJC Junction-to-case 9.5 °C/W RΘJA Junction-to-ambient d 50 °C/W Notes: d. Device on one layer epoxy PCB for drain connection (vertical and without air stream cooling, with 6cm2 copper area and 70µm thickness) September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 2 TP65H480G4JSG Circuit Implementation DC Bus RCDCL Driver RG Driver VBUS FB VO RG FB Simplified Half-bridge Schematic Recommended gate drive: (0V, 8V) with RG(tot) = 30 Ωa Simplified Single Ended Schematic Recommended gate drive: (0V, 12V) with RG(ON) = 100 to 300 Ω RG(OFF) = 0 to 15 Ω Gate Ferrite Bead (FB1) Required DC Link RC Snubber (RCDCL) b 240Ω @ 100MHz 4.7-10nF + 5Ω Notes: a. For bridge topologies only. RG could be much smaller in single ended topologies. b. RCDCL should be placed as close as possible to the drain pin. September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 3 TP65H480G4JSG Electrical Parameters (TJ=25°C unless otherwise stated) Symbol Parameter Min Typ Max Unit Test Conditions Forward Device Characteristics VDSS(BL) Maximum drain-source voltage 650 — — V VGS(th) Gate threshold voltage 1.6 2.1 2.8 V — -5.8 — mV/°C — 480 560 — 1000 — — 1 10 ΔVGS(th)/TJ RDS(on)eff IDSS Gate threshold voltage temperature coefficient Drain-source on-resistance a Drain-to-source leakage current 5 — Gate-to-source forward leakage current — — 100 Gate-to-source reverse leakage current — — -100 CISS Input capacitance — 760 — COSS Output capacitance — 9 — CRSS Reverse transfer capacitance — 1.5 — CO(er) Output capacitance, energy related b — 13 — CO(tr) Output capacitance, time related c — 29 — QG Total gate charge — 9 — QGS Gate-source charge — 2.1 — QGD Gate-drain charge — 2.1 — QOSS Output charge — 13.5 — tD(on) Turn-on delay — 16.6 — Rise time — 3.5 — Turn-off delay — 53.2 — Fall time — 7.6 — tR tD(off) tF VDS=VGS, ID=0.5mA VGS=8V, ID=3.4A VGS=8V, ID=3.4A, TJ=150°C VDS=650V, VGS=0V µA — IGSS mΩ VGS=0V VDS=650V, VGS=0V, TJ=150°C nA VGS=18V VGS=-18V pF VGS=0V, VDS=400V, f=1MHz pF VGS=0V, VDS=0V to 400V nC VDS=400V, VGS=0V to 8V, ID=3.4A nC VGS=0V, VDS=0V to 400V ns VDS=400V, VGS=0V to 8V, ID=3.4A, RG=30Ω, ZFB=240Ω at 100MHz (See Figure 14) Notes: a. Dynamic RDS(on) value; see Figures 18 and 19 for conditions b. Equivalent capacitance to give same stored energy from 0V to 400V c. Equivalent capacitance to give same charging time from 0V to 400V September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 4 TP65H480G4JSG Electrical Parameters (TJ=25°C unless otherwise stated) Symbol Parameter Min Typ Max Unit — — 2.3 A — 1.3 — — 1.8 — Test Conditions Reverse Device Characteristics IS Reverse current VSD Reverse voltage a V tRR Reverse recovery time — 14.5 — ns QRR Reverse recovery charge — 14 — nC VGS=0V, TC=100°C, ≤25% duty cycle VGS=0V, IS=1.15A VGS=0V, IS=2.3A IS=3.4A, VDD=400V, di/dt=1000A/us Notes: a. Includes dynamic RDS(on) effect September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 5 TP65H480G4JSG Typical Characteristics (TC=25°C unless otherwise stated) Figure 1. Typical Output Characteristics TJ=25°C Figure 2. Typical Output Characteristics TJ=150°C Parameter: VGS Parameter: VGS Figure 3. Typical Transfer Characteristics Figure 4. Normalized On-resistance VDS=20V, parameter: TJ ID=16A, VGS=10V September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 6 TP65H480G4JSG Typical Characteristics (TC=25°C unless otherwise stated) Figure 5. Typical Capacitance VGS=0V, f=1MHz Figure 6. Typical COSS Stored Energy Figure 7. Typical QOSS Figure 8. Typical Gate Charge IDS=3.4A, VDS=400V September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 7 TP65H480G4JSG Typical Characteristics (TC=25°C unless otherwise stated) Figure 9. Power Dissipation Figure 11. Forward Characteristics of Rev. Diode IS=f(VSD), parameter: TJ September 12, 2023 tp65h480g4lsg.3v3 Figure 10. Current Derating Pulse width ≤ 10µs, VGS ≥ 10V Figure 12. Transient Thermal Resistance transphormusa.com 8 TP65H480G4JSG Typical Characteristics (TC=25°C unless otherwise stated) Figure 13. Safe Operating Area TC=25°C September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 9 TP65H480G4JSG Test Circuits and Waveforms Figure 14. Switching Time Test Circuit (see circuit implementation on page 3 for methods to ensure clean switching) Figure 15. Switching Time Waveform Figure 16. Diode Characteristics Test Circuit Figure 17. Diode Recovery Waveform Figure 18. Dynamic RDS(ON)eff Test Circuit Figure 19. Dynamic RDS(ON)eff Waveform September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 10 TP65H480G4JSG Design Considerations The fast switching of GaN devices reduces current-voltage crossover losses and enables high frequency operation while simultaneously achieving high efficiency. However, taking full advantage of the fast switching characteristics of GaN switches requires adherence to specific PCB layout guidelines and probing techniques. Before evaluating Transphorm GaN devices, see application note Printed Circuit Board Layout and Probing for GaN Power Switches. The table below provides some practical rules that should be followed during the evaluation. When Evaluating Transphorm GaN Devices: DO Minimize circuit inductance by keeping traces short, both in the drive and power loop Minimize lead length of TO-220 and TO-247 package when mounting to the PCB Use shortest sense loop for probing; attach the probe and its ground connection directly to the test points DO NOT Twist the pins of TO-220 or TO-247 to accommodate GDS board layout Use long traces in drive circuit, long lead length of the devices Use differential mode probe or probe ground clip with long wire See AN0003: Printed Circuit Board Layout and Probing GaN Design Resources The complete technical library of GaN design tools can be found at transphormusa.com/design: • • • • • Evaluation kits Application notes Design guides Simulation models Technical papers and presentations September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 11 Mechanical 5x6 PQFN Package TP65H480G4JSG September 12, 2023 tp65h480g4lsg.3v3 transphormusa.com 12