PSMN8R5-40HSX

PSMN8R5-40HS N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 26 September 2022 Product data sheet 1. General description Dual standard level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package using TrenchMOS technology. 2. Features and benefits • • • • • Dual MOSFET Repetitive avalanche rated High reliability LFPAK56D package Copper-clip, solder die attach Qualified to 175 °C 3. Applications • • • • Brushless DC motor control DC-to-DC converters High-performance synchronous rectification High performance and high efficiency server power supply 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 40 V ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 - - 30 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 53 W Tj junction temperature -55 - 175 °C VGS = 10 V; ID = 15 A; Tj = 25 °C; Fig. 11 - 7 8.5 mΩ VGS = 10 V; ID = 15 A; Tj = 175 °C; Fig. 11; Fig. 12 - 13.8 16.7 mΩ - 7.8 - nC - 21.8 - nC - - 84 mJ [1] Static characteristics FET1 and FET2 RDSon drain-source on-state resistance Dynamic characteristics FET1 and FET2 QGD gate-drain charge QG(tot) total gate charge ID = 15 A; VDS = 32 V; VGS = 10 V; Tj = 25 °C; Fig. 13; Fig. 14 Avalanche ruggedness FET1 and FET2 EDS(AL)S non-repetitive drainsource avalanche energy ID = 30 A; Vsup ≤ 40 V; VGS = 10 V; Tj(init) = 25 °C; Fig. 4 [2] [3] PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology Symbol Parameter Conditions Min Typ Max Unit IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 20 V; Tj = 25 °C - 11.7 - nC Source-drain diode FET1 and FET2 Qr [1] [2] [3] recovered charge Continuous current is limited by package. Refer to application note AN10273 for further information Single-pulse avalanche rating limited by maximum junction temperature of 175 °C 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 S1 source1 2 G1 gate1 3 S2 source2 4 G2 gate2 5 D2 drain2 6 D2 drain2 7 D1 drain1 8 D1 Simplified outline 8 7 6 Graphic symbol 5 D1 D1 1 drain1 2 3 S1 4 D2 D2 G1 S2 G2 mbk725 LFPAK56D; Dual LFPAK (SOT1205) 6. Ordering information Table 3. Ordering information Type number Package PSMN8R5-40HS Name Description Version LFPAK56D; Dual LFPAK plastic, single ended surface mounted package (LFPAK56D); 8 leads SOT1205 7. Marking Table 4. Marking codes Type number Marking code PSMN8R5-40HS 8R5S40H 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 40 V VDGR drain-gate voltage RGS = 20 kΩ - 40 V VGS gate-source voltage DC; Tj ≤ 175 °C -20 20 V Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 53 W ID drain current VGS = 10 V; Tmb = 25 °C; Fig. 2 [1] - 30 A VGS = 10 V; Tmb = 100 °C; Fig. 2 [1] - 30 A PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 2 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology Symbol Parameter Conditions Min Max Unit IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 225 A Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C - 30 A - 225 A - 84 mJ Source-drain diode FET1 and FET2 IS source current Tmb = 25 °C [1] ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C Avalanche ruggedness FET1 and FET2 EDS(AL)S [1] [2] [3] non-repetitive drainID = 30 A; Vsup ≤ 40 V; VGS = 10 V; source avalanche energy Tj(init) = 25 °C; Fig. 4 [2] [3] Continuous current is limited by package. Refer to application note AN10273 for further information Single-pulse avalanche rating limited by maximum junction temperature of 175 °C 03aa16 120 ID (A) Pder (%) 003aal014 60 50 80 40 30 40 (1) 20 10 0 0 50 100 150 Tmb (°C) 0 200 0 30 60 90 120 150 Tmb (°C) 180 (1) Capped at 30 A due to package Fig. 1. Fig. 2. Normalized total power dissipation as a function of mounting base temperature ID (A) Continuous drain current as a function of mounting base temperature 003aal016 103 Limit RDSon = VDS / ID 102 tp = 10 us 100 us 10 DC 1 ms 10 ms 100 ms 1 10-1 10-1 Fig. 3. 1 10 VDS (V) 102 Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 3 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology IAL (A) 003aal015 102 (1) 10 (2) 1 (3) 10-1 10-3 10-2 10-1 1 tAL (ms) 10 (1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche Fig. 4. Avalanche rating; avalanche current as a function of avalanche time 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from Fig. 5 junction to mounting base - - 2.84 K/W Rth(j-a) thermal resistance from Minimum footprint; mounted on a junction to ambient printed circuit board - 95 - K/W 003aal017 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10-1 0.05 0.02 P δ= Fig. 5. T single shot tp 10-2 10-6 tp 10-5 10-4 10-3 10-2 10-1 t T tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 4 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - V gate-source threshold voltage ID = 1 mA; VDS=VGS; Tj = 25 °C; Fig. 9; Fig. 10 2.4 3 4 V ID = 1 mA; VDS=VGS; Tj = 175 °C; Fig. 9; Fig. 10 1 - - V ID = 1 mA; VDS=VGS; Tj = -55 °C; Fig. 9; Fig. 10 - - 4.5 V VDS = 40 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA VDS = 40 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 15 A; Tj = 25 °C; Fig. 11 - 7 8.5 mΩ VGS = 10 V; ID = 15 A; Tj = 175 °C; Fig. 11; Fig. 12 - 13.8 16.7 mΩ - 21.8 - nC - 5.9 - nC - 7.8 - nC - 1079 1439 pF - 235 282 pF - 149 204 pF - 7.4 - ns - 12 - ns Static characteristics FET1 and FET2 V(BR)DSS VGS(th) IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Dynamic characteristics FET1 and FET2 QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time - 13.8 - ns tf fall time - 10.3 - ns ID = 15 A; VDS = 32 V; VGS = 10 V; Tj = 25 °C; Fig. 13; Fig. 14 VDS = 25 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; Fig. 15 VDS = 32 V; RL = 2.4 Ω; VGS = 10 V; RG(ext) = 5 Ω; Tj = 25 °C Source-drain diode FET1 and FET2 VSD source-drain voltage IS = 15 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.78 1.2 V trr reverse recovery time - 20.3 - ns Qr recovered charge IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 20 V; Tj = 25 °C - 11.7 - nC PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 5 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 003aal019 30 RDSon ID (A) 25 40 003aal018 10 V 7 V 6V 32 20 VGS = 5.5 V 24 6V 15 GS = 5.5 V 16 10 5V 8 5 4.5 V 0 0 4 8 12 16 VGS (V) 0 20 Tj = 25 °C; ID = 15 A Fig. 6. 003aal021 80 2 3 VDS (V) 4 Fig. 7. Output characteristics; drain current as a function of drain-source voltage; typical values 003aah028 10-1 ID (A) 64 10-2 48 10-3 32 10-4 16 0 2 4 6 VGS (V) 8 10-6 VDS = 10 V Product data sheet typ max 0 2 4 VGS (V) 6 Tj = 25 °C; VDS = 5 V Transfer characteristics; drain current as a function of gate-source voltage; typical values PSMN8R5-40HS min 10-5 175°C Tj = 25°C 0 Fig. 8. 1 Tj = 25 °C; tp = 300 μs Drain-source on-state resistance as a function of gate-source voltage; typical values ID (A) 0 Fig. 9. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 6 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 003aah027 5 VGS(th) (V) max 4 003aal022 50 RDSon 4.5 V 5 V 5.5 V 40 6V 3 typ 30 2 min 20 6.5 V 8V 10 1 VGS = 10 V 0 -60 0 60 120 T j (°C) 0 180 10 20 30 ID (A) 40 Tj = 25 °C; tp = 300 μs ID = 1 mA; VDS = VGS Fig. 10. Gate-source threshold voltage as a function of junction temperature a 0 Fig. 11. Drain-source on-state resistance as a function of drain current; typical values 003aaj813 2 VDS 1.6 ID 1.2 VGS(pl) 0.8 VGS(th) VGS 0.4 0 -60 QGS2 QGS1 -30 0 30 60 90 120 150 Tj (°C) QGS 180 QGD QG(tot) 003aaa508 Fig. 13. Gate charge waveform definitions Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 7 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology VGS (V) 003aal023 10 8 003aal024 104 C (pF) VDS = 14 V 32 V 6 Ciss 103 4 2 Coss Crss 0 0 4 8 12 16 20 QG (nC) 102 10-1 24 Tj = 25 °C; ID = 15 A 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 14. Gate-source voltage as a function of gate charge; typical values IS (A) Fig. 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 003aal025 40 32 24 16 8 0 175°C 0 0.2 0.4 Tj = 25°C 0.6 0.8 1 VSD (V) 1.2 VGS = 0 V Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 8 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 11. Package outline Plastic single ended surface mounted package LFPAK56D; 8 leads E SOT1205 A A b1 c1 L1 mounting base D H D1 D2 L 1 2 3 e b (8x) 4 w X c A E1 E2 A1 C θ Lp detail X 0 2.5 A max 1.05 nom min 1.02 mm 5 mm scale Dimensions Unit y C D(1) D1(1) D2 (ref) E(1) E1(1) 4.4 0.25 0.30 4.70 4.55 3.5 5.30 1.8 0.85 4.1 0.19 0.24 4.45 4.35 3.4 4.95 1.6 0.60 A1 b b1 0.1 0.50 0.0 0.35 c c1 E2 e 1.27 H L L1 Lp 6.2 1.3 0.55 0.85 5.9 0.8 0.30 0.40 w y 0.25 0.1 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. Outline version References IEC JEDEC JEITA θ 8° 0° sot1205_po European projection Issue date 14-08-21 14-10-28 SOT1205 Fig. 17. Package outline LFPAK56D; Dual LFPAK (SOT1205) PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 9 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 12. Soldering Footprint information for reflow soldering of LFPAK56D package SOT1205 5.85 0.57 0.025 0.57 0.7 1.97 0.65 1.27 1.9 3.325 3.175 3.2 2.0 1.275 0.8 1.875 2.1 2.7 1.0 3.85 3.975 0.025 1.1 1.15 0.65 1.27 1.1 1.44 solder land solder land plus solder paste solder paste deposit solder resist occupied area Dimensions in mm Issue date 0.7 14-07-28 20-04-20 sot1205_fr Fig. 18. Reflow soldering footprint for LFPAK56D; Dual LFPAK (SOT1205) PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 10 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology 13. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 11 / 12 PSMN8R5-40HS Nexperia N-channel 40 V, 8.5 mOhm, standard level MOSFET in LFPAK56D using TrenchMOS technology Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 2 9. Thermal characteristics............................................... 4 10. Characteristics............................................................ 5 11. Package outline.......................................................... 9 12. Soldering................................................................... 10 13. Legal information......................................................11 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 26 September 2022 PSMN8R5-40HS Product data sheet All information provided in this document is subject to legal disclaimers. 26 September 2022 © Nexperia B.V. 2022. All rights reserved 12 / 12