CD4052BDTR

CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer General Description The CD4052 is a dual single- pole quad- throw analog switch ( 2 ×SP4 T) suitable for use in analog or digital 4 : 1 multiplexer/ demultiplexer applications. inputs/ outputs ( nY0 , nY1 , nY2 and nY3 ) two digital select inputs ( S0 turned off. Inputs include and S1) clamp Each switch features — and a common input/ output ( nZ) . A digital enable input ( E) and are common to both switches. diodes. This four independent enables the use When of current — E is HIGH, the switches are limiting resistors to interface inputs to voltages in excess of VCC . Features       Wide analog input voltage range from - 5 V to + 5 V Low ON resistance: 80 Ω (typical) at VCC - VEE = 4 . 5 V 70 Ω (typical) at VCC - VEE = 6 . 0 V 60 Ω (typical) at VCC - VEE = 9 . 0 V Logic level translation: to enable 5 V logic to communicate with ± 5 V analog signals Typical “ break before make” built- in Specified from -40C to + 105C Packaging information: DIP16/ SOP16/ SSOP16/ TSSOP16 Features    Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating Ordering Information MARKING Packing DIP-16 CD4052BE CD4052BDTR SOP-16 CD4052B Tube Tape 2500/Reel CD4052BTDTR TSSOP-16 CD4052B Tape 3000/Reel DEVICE CD4052BE XBLWversion1.0 Package Type 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 Packing QTY 1000/Box 第 1 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer 2、Block Diagram And Pin Description 2. 1 Block Diagram Figure 1 . Logic symbol Figure 2 . IEC logic symbol Figure 3 . XBLWversion1.0 Schematic diagram ( one switch) 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 2 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Figure 4 . 2.2 Functional diagram Pin Configurations XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 3 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Pin Description 2 .3 Pin No. Description Pin Name 2Y0 independent input or output 2 2Y2 independent input or output 3 2Z 4 2Y3 independent input or output 5 2Y1 independent input or output 6 — 7 V EE negative supply voltage 8 GND ground supply voltage 9 S1 select logic input 10 S0 select logic input 11 1Y3 independent 12 1Y0 independent input or output 13 1Z common input or output 14 1Y1 independent input or output 15 1Y2 independent input or output 16 V CC 1 common input or output enable input ( active LOW) E positive input or output supply voltage Function Table 2. 4 Input Channel ON E — S1 S0 L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X Note: H= HIGH voltage level; L= LOW voltage level; X= don’ t care. none 3 Electrical Parameter Absolute Maximum Ratings 3 . 1 ( Voltages are referenced to VEE = GND ( ground=0 V) , unless otherwise specified. ) Symbol Parameter Conditions Min. supply input voltage clamping switch clamping current current V CC IIK VI < -0 .5 V or VI > VCC + 0 . 5 V ISK VSW < -0 . 5 V or VSW > VCC + 0 . 5 V - 0 .5 V < VSW < VCC + 0.5 V switch current ISW supply current IEE supply current ICC current IGND ground storage XBLWversion1.0 temperature [ 1] Tstg -0 5 - - - - - - -65 - 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 Max. + 11 Unit ± 20 mA ± 20 mA ± 25 mA ± 20 mA 50 mA -50 + 150 mA V C 第 4 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer total power power dissipation dissipation Soldering [2] P tot P temperature per - - DIP 10s TL - switch SOP 500 mW 100 mW 245 C 250 C Note: [ 1 ] To avoid drawing VCC the voltage current out of terminal nZ, when switch current flows into terminals nYn, drop across the bidirectional switch must not exceed 0 . 4 into terminal nZ, no VCC current will flow out of terminals nYn, for the voltage drop across the switch, V. If the switch current flows and in this case there is no limit but the voltages at nYn and nZ may not exceed VCC or VEE . [ 2 ] For DIP16 packages: above 70 C the value of Ptot derates linearly with 12 mW/ K. For SOP16 packages: above 7 0 C the value of Ptot derates linearly with 8 mW/ K. For ( T) SSOP16 packages: above 60 C the value of Ptot derates linearly with 5 . 5 mW/ K. 3 . 2 Recommended Operating Conditions Symbol Parameter Min. Typ. Max. Unit VCC - GND 3.0 5.0 9.0 V VCC - VEE 3.0 5.0 9.0 V V CC V V CC V + 105 139 C ns/ V 83 ns/ V 31 ns/ V Max. Unit 100 225 Ω 90 200 Ω 70 165 Ω 80 175 Ω 70 150 Ω 60 130 Ω Conditions CD4052 supply voltage V CC input voltage VI switch ambient voltage V SW temperature 3 .3 . 1 1.67 - VCC = 6 . 0 V VCC = 9 . 0 V 3 .3 - -40 VCC = 4 . 5 V Δ t/ΔV - V EE in free air Tamb input transition rise and fall rate 0 - - - - - Electrical Characteristics DC Characteristics 1 ( Tamb = - 40 C~ 85 C, voltages are reference to GND ( ground=0 V) , unless otherwise specified, unless otherwise specified. ) Parameter Symbol Conditions VCC = 4 . 5 V; VEE = 0 V ON resistance ( peak) RON( Vis = VCC to VEE ; peak) ISW = 1000 uA Min. - VCC = 6 .0 V; VEE = 0 V - VCC = 4 . 5 V; VEE = -4 .5 V - VCC = 4 . 5 V; VEE = 0 V Vis = VEE ; ISW = 1000 uA - VCC = 6 .0 V; VEE = 0 V - VCC = 4 . 5 V; VEE = -4 .5 V XBLWversion1.0 - Typ. [1] 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 5 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer ON resistance ( rail) VCC = 4 . 5 V; RON( rail) VEE = 0 V - VCC = 6 .0 V; Vis = VCC ; VEE = 0 V ISW = 1000 uA - VCC = 4 . 5 V; VEE = -4 .5 V - 90 200 Ω 80 175 Ω 65 150 Ω VCC = 4 . 5 V; ON resistance mismatch between VEE = 0 V Δ RON Vis = VCC to VEE channels 9 - VCC = 6 .0 V; VEE = 0 V 8 - VCC = 4 . 5 V; VEE = -4 .5 V 6 - - Ω Ω Ω CD4052 HIGH- level input voltage LOW- level input voltage V IH OFF- state leakage 3. 15 VCC = 6 . 0 V 4.2 3.2 VCC = 9 . 0 V 6.3 4.7 - VCC = 4 . 5 V VCC = 6 . 0 V V IL II IS( OFF) VCC = 6 . 0 V VEE = 0 V; VI = VCC or GND VCC = 9 . 0 V per VCC= 9 . 0 V; channel 2.4 - V - V 2.1 1.35 V 2.8 1.8 V - 4.3 2.7 V - - ± 1.0 uA - - ± 2.0 uA - - ± 1.0 uA - - ± 2.0 uA - - ± 2.0 uA - - 80.0 uA - - 160.0 uA - VCC = 9 . 0 V input leakage current VCC = 4 . 5 V V VEE= 0 V; current VI= VIH or VIL ; |VSW | = VCC - VEE ; all channels see Figure 7 ON- state leakage current VI= VIH or VIL ; | VSW | = VCC- VEE ; VCC= 9 . 0 V;VEE= 0 V; IS( ON) see Figure 8 VEE = 0 V; supply current ICC VI = VCC or GND; Vis = VEE or VCC ; Vos = VCC or VEE input capacitance CI switch capacitance C SW VCC = 6 . 0 V VCC = 9 . 0 V - - independent pins nYn common pins nZ 3.5 - 5 12 - pF pF pF Note: [ 1 ] All typical values are measured at Tamb= 25 C. [ 2] VI= VIH or VIL ; for test circuit see Figure 5 . [ 3 ] Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. [ 4 ] Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 6 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer DC Characteristics 2 3 .3 .2 ( Tamb = - 40 C~ 10 5 C, voltages are reference to GND ( ground=0 V) , unless otherwise specified, unless otherwise specified. ) Parameter Min. Typ. [1] - - - - - - - - - - - - - - - - - - VCC = 4 . 5 V 3. 15 VCC = 6 . 0 V 4.2 VCC = 9 . 0 V 6.3 Symbol Conditions Max. Unit 270 Ω 240 Ω 195 Ω 210 Ω 180 Ω 160 Ω 240 Ω 210 Ω 180 Ω - - V - - V - 1.35 V V 1.8 V 2.7 V ± 1.0 uA ± 2.0 uA ± 1.0 uA ± 2.0 uA ± 2.0 uA 160.0 uA 320.0 uA VCC = 4 . 5 V; VEE = 0 V ON resistance ( peak) RON( Vis = VCC to VEE ; peak) ISW = 1000 uA VCC = 6 .0 V; VEE = 0 V VCC = 4 . 5 V; VEE = -4 .5 V VCC = 4 . 5 V; VEE = 0 V Vis = VEE ; ISW = 1000 uA VCC = 6 .0 V; VEE = 0 V VCC = 4 . 5 V; ON resistance ( rail) VEE = -4 .5 V RON( rail) VCC = 4 . 5 V; VEE = 0 V Vis = VCC ; ISW = 1000 uA VCC = 6 .0 V; VEE = 0 V VCC = 4 . 5 V; VEE = -4 .5 V CD4052 HIGH- level input voltage LOW- level input voltage V IH VCC = 4 . 5 V V IL VCC = 9 . 0 V input leakage current VCC = 6 . 0 V II VEE = 0 V; VI = VCC or GND VCC= 9 . 0 V; VEE= 0 V; OFF- state leakage IS( OFF) current VI= VIH or VIL ; |VSW | = VCC - VEE ; VCC = 6 . 0 V VCC = 9 . 0 V per channel all channels - - - - - - - - - - - - - - - - - - - - see Figure 7 ON- state leakage current VI= VIH or VIL ; | VSW | = VCC- VEE ; IS( ON) VCC= 9 . 0 V;VEE= 0 V; see Figure 8 VEE = 0 V; supply current ICC VI = VCC or GND; Vis = VEE or VCC ; Vos = VCC or VEE VCC = 6 . 0 V VCC = 9 . 0 V Note: XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 7 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer [ 1 ] All typical values are measured at Tamb= 25 C. [ 2] VI= VIH or VIL ; for test circuit see Figure 5 . [ 3 ] Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. [ 4 ] Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output 3 .3 .3 AC Characteristics 1 ( Tamb= -4 0 C~+ 85 C; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified.) Parameter Symbol Conditions Min. Typ. [1] CD4052 VCC = 4 . 5 V; propagation delay VEE = 0 V Vis to Vos ; tpd see Figure 9 [2 ] VEE = 0 V 15 ns 4 13 ns 4 10 ns 38 81 ns - ns 30 69 ns 26 58 ns 27 63 ns - ns 22 54 ns 22 48 ns - VCC = 4 . 5 V; VEE = -4 .5 V - VCC = 4. 5 V; VEE = 0 V - Unit 5 - VCC = 6 .0 V; RL= ∞ Ω; Max. VCC = 5.0 V; — E, Sn to Vos ; turn- on time t on RL= ∞ Ω; see Figure 10 [ 3 ] VEE =0 V; CL= 15pF - VCC = 6.0 V; VEE = 0 V - VCC = 4 . 5 V; VEE = -4 .5 V - VCC = 4. 5 V; VEE = 0 V - 28 VCC = 5.0 V; E, Sn to Vos ; — turn- off time t off RL = 1 kΩ; see Figure 10 [4 ] VEE =0 V; CL= 15pF - VCC = 6.0 V; VEE = 0 V - VCC = 4 . 5 V; VEE = -4 .5 V - 21 power dissipation capacitance per switch;VI = GND to VCC[ C PD 5 ] - VCC = 4 . 5 V; VEE = -4 .5 V - 57 28 60 pF ns Note: [ 1 ] All typical values are measured at Tamb= 25 C. [ 2] tpd is the same as tPHL and tPLH . [ 3] ton is the same as tPZH and tPZL . [ 4 ] toff is the same as tPHZ and tPLZ . [ 5 ] CPD is used to determine the dynamic power dissipation ( PD in uW) . PD = CPD ×VCC2 × fi ×N + Σ {(CL+ CSW) ×VCC2 × fO } where: fi = input frequency in MHz; fO = output frequency in MHz; N = number of inputs switching; XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 8 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Σ {(CL+ CSW) ×V CC2 × fO } = sum of outputs; CL = output load capacitance in pF; CSW = switch capacitance in pF; VCC = supply voltage in V. [ 6] For test circuit see Figure 1 1 . [ 7 ] Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. [ 8 ] Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. 3 .3 .4 AC Characteristics 2 ( Tamb= -4 0 C~+ 1 0 5 C; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified.) Parameter Symbol Min. Typ. [1] - - - - - - - - - - VEE = -4 .5 V VCC = 4. 5 V; - - VEE = 0 V - - - - - - Conditions CD4052 VCC = 4 . 5 V; propagation delay VEE = 0 V Vis to Vos ; tpd VCC = 6 .0 V; RL= ∞ Ω; see Figure 9 [2 ] VEE = 0 V VCC = 4 . 5 V; VEE = -4 .5 V VCC = 4. 5 V; — E, Sn to Vos ; turn- on time t on RL= ∞ Ω; see Figure 10 [ 3 ] — E, Sn to Vos ; turn- off time t off RL = 1 kΩ; see Figure 10 [4 ] VEE = 0 V VCC = 6.0 V; VEE = 0 V VCC = 4 . 5 V; VCC = 6.0 V; VEE = 0 V VCC = 4 . 5 V; VEE = -4 .5 V Note: [ 1 ] All typical values are measured at Tamb= Max. Unit 18 ns 15 ns 12 ns 98 ns 83 ns 69 ns 75 ns 64 ns 57 ns 2 5 C. [ 2] tpd is the same as tPHL and tPLH . [ 3] ton is the same as tPZH and tPZL . [ 4 ] toff is the same as tPHZ and tPLZ . [ 5] For test circuit see Figure 1 1 . [ 6 ] Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. [ 7 ] Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 9 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer AC Characteristics 3 ( Tamb= 25 C; GND = 0 V; CL= 50 pF; recommended conditions and typical values. ) 3 .3 .5 Parameter Symbol Conditions Vis = 4 .0 V (p-p) ; fi = 1 kHz; RL = 10 kΩ; see Figure 1 2 sine- wave distortion VCC = 2 .25 V; - VEE = -2 .25 V RL = 10 kΩ; see Figure 1 2 VCC = 4 . 5 V; - VCC = 2 .25 V; - VEE = -2 .25 V RL= 600 Ω; isolation fi= 1 MHz; α iso see Figure 1 3 between Xtalk two VCC = 4 . 5 V; - VCC = 4.5 V; - VCC = 2.25 V; VCC = 4.5 V; control and any switch; 0. 12 - 0.06 - - -50 - - -50 - [ 1] VEE = -4 .5 V RL= 600 Ω;fi= 1 MHz; between % % % [ 1] - -60 - [ 1] - VEE = -4 .5 V -60 VCC = 4 .5 V; 110 - VEE = 0 V - - % dB dB dB dB mV RL= 600 Ω; fi= 1MHz; crosstalk response 0.02 [ 1] VEE = -2 .25 V VEE = -2 .25 V peak- to- peak value; -3 dB frequency VCC = 2.25 V; switches/ multiplexers; see Figure 1 4 voltage - Unit Vis = 8 .0 V (p-p) ; VEE = -4 .5 V crosstalk 0.04 Max. Vis = 4 .0 V (p-p) ; fi = 10 kHz; (OFF- state) Typ. Vis = 8 .0 V (p-p) ; VEE = -4 .5 V dsin Min. V ct — E or Sn square wave between VCC and GND; tr= tf= 6 ns; see Figure 1 5 VCC = 4 . 5 V; VCC = 2.25 V; f( -3 dB) - VEE = -4 .5 V RL = 50 Ω; VEE = -2 .25 V see Figure 1 6 VCC = 4.5 V; 220 - mV [2 ] - 170 - MHz [2] VEE = -4 .5 V - 180 - MHz Note： [ 1 ] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω ) . [ 2 ] Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω ) . [ 3 ] Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. [ 4 ] Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 10 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer 4、Testing Circuit 4 . 1 DC Testing Circuit 1 Vis = 0 V to ( VCC - VEE) RON = VSW/ ISW Figure 5 . Test circuit for measuring RON Vis = 0 V to ( VCC - VEE) ( 1)VCC = 4.5V Figure 6 . 4 .2 (2) VCC = 6 V ( 3)VCC = 9V Typical RON as a function of input voltage Vis DC Testing Circuit 2 XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 11 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Vis = VCC and Vos= VEE . Figure 7 . Vis = VEE and Vos= VCC . Test circuit for measuring OFF- state current Vis= VCC and Vos= open- circuit. Vis= VEE and Vos= open- circuit. Figure 8 . 4 .3 Test circuit for measuring ON- state current AC Testing Waveforms Figure 9 . XBLWversion1.0 Input ( Vis) to output ( Vos) propagation delays 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 12 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer For CD4052 : VM = 0 . 5 ×VCC .For SN7 4HCT4052: VM = 1 .3 V. Figure 10 . Turn-on and turn- off times AC Testing Circuit 1 4 .4 Figure 1 1 . Test circuit for measuring switching times Definitions for test circuit: RT = termination resistance should be equal to the output impedance ZO of the pulse generator. CL = load capacitance including jig and probe capacitance. RL = load resistance. S1 = Test selection switch. 4 .5 Test Data Input Test Load S1 position tr, tf VI tPHL, tPLH [2] tPZH, tPHZ [2] tPZL, tPLZ [2] CL RL V is at fmax other[ 1] pulse < 2ns 6ns 50pF 1kΩ open V CC < 2ns 6ns 50pF 1kΩ V EE V EE < 2ns 6ns 50pF 1kΩ V CC Note: XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 13 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer [ 1 ] tr = tf= 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor. [2 ] VI values: For CD4052 : VI = VCC .For SN7 4 HCT40 52 : VI = 3V. 4 .6 AC Testing Circuit 2 Figure 12 . Test circuit for measuring sine- wave distortion VCC = 4 . 5 V; GND = 0 V; VEE = -4 .5 V; RL = 600 Ω; RS = 1 kΩ . a. Test circuit XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 14 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer b. Isolation ( OFF- state) as a function of frequency Figure 13 . Figure XBLWversion1.0 14 . Test circuit for measuring isolation ( OFF- state) Test circuits for measuring crosstalk between any two switches/ multiplexers 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 15 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Figure 1 5 . Test circuit for measuring crosstalk between control input and any switch VCC = 4. 5 V; GND = 0 V; VEE = -4 .5 V; RL = 50 Ω; RS = 1 kΩ a. Test circuit b. Figure XBLWversion1.0 16 . Typical frequency response Test circuit for frequency response 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 16 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer 5、Package Information 5.1 DIP16 XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 17 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer 5.2 SOP16 XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 18 页 共 19 页 CD4052 XBLW CD4052 Dual 4-channel Analog Multiplexer/Demultiplexer Statement：  Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice! Before placing an order, the customer needs to confirm whether the information obtained is the latest version, and verify the integrity of the relevant information.  Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be responsible for complying with safety standards in the system design and whole machine manufacturing using Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk of failure may result in personal injury or property losses of the situation occurred!  Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide customers with better performance, better quality of integrated circuit products. XBLWversion1.0 文档仅供参考，实际应用测试为准 www.xinboleic.com 技术支持热线：4009682003 第 19 页 共 19 页