XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
General Description
The 74HC597/74HCT597 is an 8-bit shift register with input flip-flops
Features
Supply voltage range:
SN74HC597: 2~6V
SN74HCT597: 4.5~5.5V
Input levels:
SN74HC597: CMOS level
SN74HCT597: TTL level
Temperature range:-40℃ to +125℃
Packaging information: DIP16/SOP16/TSSOP16
Ordering Information
Product Model
XBLW SN74HC597N
XBLW SN74HC597DTR
XBLW SN74HC597TDTR
XBLW SN74HCT597N
XBLW SN74HCT597DTR
XBLW SN74HCT597TDTR
XBLWversion1.0
Package Type
DIP-16
SOP-16
TSSOP-16
DIP-16
SOP-16
TSSOP-16
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Marking
74HC597N
74HC597
74HC597
74HCT597N
74HCT597
74HCT597
Packing
Tube
Tape
Tape
Tube
Tape
Tape
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Packing Qty
1000Pcs/Box
2500Pcs/Reel
3000Pcs/Reel
1000Pcs/Box
2500Pcs/Reel
3000Pcs/Reel
1 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Block Diagram And Pin Description
Block Diagram
Figure 1. Logic symbol
XBLWversion1.0
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Pin Configurations
Pin Description
Pin No.
Pin Name
Description
1
D1
parallel data output
2
D2
parallel data output
3
D3
parallel data output
4
D4
parallel data output
5
D5
parallel data outputt
6
D6
parallel data output
7
D7
parallel data output
8
GND
ground (0V)
9
Q
serial data output
10
MR
asynchronous master reset input (active LOW)
11
SHCP
shift register clock input (LOW-to-HIGH, edge-triggered)
12
STCP
storage register clock input (LOW-to-HIGH, edge-triggered)
13
PL
parallel load input (active LOW)
14
DS
serial data input
15
D0
parallel data inputs
16
VCC
supply voltage
Function Table
Input
STCP
SHCP
Function
X
PL
X
MR
X
data loaded to input latches
X
L
H
data loaded from inputs to shift register
No clock edge
X
L
H
X
X
L
L
data transferred from input flip-flops to shift register
invalid logic, state of shift register is indeterminate
when signals removed
X
X
H
L
shift register cleared
H
H
shift register clocked Qn = Qn-1, Q0 = DS
↑
↑
X
↑
Note: H=HIGH voltage level; L=LOW voltage level.↑=LOW-to-HIGH transition .X= don’t care
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Electrical Parameter
Absolute Maximum Ratings
(Voltages are referenced to GND (ground=0V), unless otherwise specified.)
Parameter
supply voltage
Symbol
Conditions
Min.
Max.
Unit
VCC
-
-0.5
+7
V
ground current
IGND
-
-50
-
mA
input clamping
current
output clamping
current
IIK
VI < -0.5V or VI > VCC+0.5V
-
±20
mA
IOK
VO < -0.5V or VO > VCC+0.5V
-
±20
mA
-0.5V < VO < VCC+0.5V
-65
±25
mA
+150
℃
output current
IO
storage temperature
Tstg
soldering temperature
TL
10s
DIP
SOP/TSSOP
245
260
℃
Recommended Operating Conditions
Symbol
Conditions
Min.
Typ.
Max.
Unit
SN74HC597
supply voltage
VCC
2.0
5.0
6.0
V
input voltage
VI
-
0
-
VCC
V
-
VCC
V
Parameter
output voltage
ambient
temperature
SN74HCT597
supply voltage
-
0
Tamb
-
-40
-
+125
℃
VCC
-
4.5
5.0
5.5
V
0
-
VCC
V
-
VCC
V
-
+125
℃
VO
input voltage
VI
output voltage
VO
ambient
temperature
Tamb
XBLWversion1.0
-
-
0
-
-40
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Electrical Characteristics
DC Characteristics 1
(Tamb=-40℃ to +85℃, voltages are referenced to GND (ground=0V), unless otherwise specified.)
Parameter
Symbol
VCC
Conditions
2.0V
VIH
4.5V
-
Min.
Typ.
Max.
Unit
-
V
SN74HC597
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
LOW-level
output voltage
4.2
3.2
-
-
-
V
V
0.8
0.5
V
-
2.1
1.35
V
1.9
2.8
1.8
V
2.0V
IO=-20uA
2.0
IO=-20uA
4.4
4.5
-
V
4.5V
6.0V
IO=-20uA
5.9
6.0
4.5V
IO=-4.0mA
3.84
4.32
6.0V
IO=-5.2mA
5.34
5.81
2.0V
IO=20uA
4.5V
IO=20uA
-
6.0V
IO=20uA
4.5V
IO=4.0mA
4.5V
6.0V
VOL
-
-
2.0V
VOH
1.2
2.4
-
6.0V
VIL
1.5
3.15
6.0V
IO=5.2mA
-
V
V
-
V
V
0
0.1
V
0
0.1
V
0
0.1
V
0.15
0.33
V
-
0.16
0.33
V
-
input leakage
current
II
6.0V
VI=VCC or GND
-
-
±2
uA
supply current
ICC
6.0V
VI=VCC or GND;IO=0A
-
-
80
uA
-
2.0
1.6
-
V
-
-
1.2
0.8
V
IO=-20uA
4.4
4.5
3.84
4.32
-
V
IO=-4.0mA
-
0.1
V
0
V
-
0.15
0.33
V
SN74HCT597
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
VIH
VIL
VOH
4.5~
5.5V
4.5~
5.5V
4.5V
LOW-level
output voltage
VOL
4.5V
input leakage
current
II
5.5V
VI=VCC or GND
-
-
±2
uA
supply current
ICC
6.0V
-
-
80
uA
additional
supply current
ΔICC
4.5~
5.5V
VI=VCC or GND;IO=0A
One input at VI=VCC-2.1V;
Other inputs at VCC or GND;
IO=0A
-
-
135
uA
XBLWversion1.0
IO=20uA
IO=4.0mA
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
DC Characteristics 2
(Tamb=-40℃ to +125℃, voltages are referenced to GND (ground=0V), unless otherwise specified.)
Parameter
Symbol
VCC
Conditions
Min.
Typ.
Max.
Unit
2.0V
-
1.5
-
-
V
4.5V
-
3.15
-
-
V
6.0V
-
4.2
-
V
2.0V
-
-
-
0.5
4.5V
-
-
-
1.35
V
6.0V
1.9
-
1.8
V
2.0V
IO=-20uA
-
-
V
4.5V
IO=-20uA
4.4
-
-
V
6.0V
IO=-20uA
5.9
-
V
IO=-4.0mA
-
4.5V
3.7
-
-
V
6.0V
IO=-5.2mA
5.2
-
V
2.0V
IO=20uA
-
-
0.1
4.5V
IO=20uA
-
-
0.1
V
6.0V
IO=20uA
-
-
0.1
V
4.5V
IO=4.0mA
-
-
0.4
V
6.0V
IO=5.2mA
-
-
0.4
V
SN74HC597
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
LOW-level
output voltage
VIH
VIL
VOH
VOL
V
V
input leakage
current
II
6.0V
VI=VCC or GND
-
-
±4
uA
supply current
ICC
6.0V
VI=VCC or GND;IO=0A
-
-
160
uA
SN74HCT597
HIGH-level
input voltage
VIH
4.5~
5.5V
-
2.0
-
-
V
LOW-level
input voltage
VIL
4.5~
5.5V
-
-
-
0.8
V
HIGH-level
output voltage
VOH
4.5V
IO=-20uA
4.4
-
V
IO=-4.0mA
-
3.7
-
V
LOW-level
output voltage
VOL
4.5V
IO=20uA
-
-
0.1
V
IO=4.0mA
-
-
0.4
V
input leakage
current
II
5.5V
VI=VCC or GND
-
-
±4
uA
supply current
ICC
6.0V
-
-
160
uA
additional
supply current
ΔICC
4.5~
5.5V
VI=VCC or GND;IO=0A
One input at VI=VCC-2.1V;
Other inputs at VCC or GND;
IO=0A
-
-
147
uA
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
AC Characteristics 1
(Tamb=-40℃ to +85℃, voltages are referenced to GND (ground=0V), unless otherwise specified.)
Parameter
Symbol
Conditions
VCC
Min.
Typ.
Max.
Unit
-
55
220
ns
20
44
ns
17
16
37
ns
58
220
ns
21
44
ns
17
37
ns
80
315
ns
29
63
ns
25
23
54
ns
SN74HC597
SHCP to Q
propagation
delay
R to Q
propagation
delay
2.0V
CL=50pF
4.5V
CL=50pF
5.0V
CL=15pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
5.0V
CL=15pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
5.0V
CL=15pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
STCP(HIGH or
LOW)
pulse width
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
SHCP(HIGH
or LOW)
pulse width
STCP to Q
propagation
delay
tPLH, tPHL
—
PL to Q
propagation
delay
transition time
tt
tw
MR LOW
PL LOW
Dn to STCP
Set_up time
DS to SHCP
Set_up time
tsu
—
PL to SHCP
Set_up time
Dn to STCP
hold time
th
R to SHCP
recovery time
trec
maximum
frequency
fmax
XBLWversion1.0
see Figure 5
-
see Figure 6
-
see Figure 5
-
ns
ns
69
270
ns
25
54
ns
21
ns
20
46
ns
19
95
ns
7
19
ns
100
6
16
ns
11
4
-
ns
20
17
3
-
ns
CL=50pF
ns
2.0V
CL=50pF
100
14
-
ns
4.5V
CL=50pF
20
5
-
CL=50pF
17
4
-
ns
6.0V
CL=50pF
100
22
-
ns
2.0V
ns
4.5V
CL=50pF
20
8
-
CL=50pF
17
6
-
ns
6.0V
CL=50pF
100
22
-
ns
2.0V
ns
4.5V
CL=50pF
20
8
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
see Figure 7
-
see Figure 5
see Figure 5
see Figure 5
see Figure 6
see Figure 7
-
6.0V
CL=50pF
17
6
2.0V
CL=50pF
75
8
4.5V
CL=50pF
15
3
see Figure 9
6.0V
CL=50pF
13
2
2.0V
CL=50pF
75
11
4.5V
CL=50pF
15
4
6.0V
CL=50pF
13
3
2.0V
CL=50pF
75
11
4.5V
CL=50pF
15
4
6.0V
CL=50pF
13
3
2.0V
CL=50pF
5
-3
4.5V
CL=50pF
5
-1
4.5V
CL=50pF
15
-2
-
ns
4.5V
CL=15pF
24
75
CL=15pF
-
83
-
MHZ
5.0V
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see Figure 9
see Figure
10
see Figure 9
see Figure 8
see Figure 5
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-
MHZ
7 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
AC Characteristics 2
(Tamb=-40℃ to +125℃, voltages are referenced to GND (ground=0V), unless otherwise specified.)
Parameter
Symbol
Conditions
VCC
Min.
Typ.
Max.
Unit
-
-
265
ns
-
-
53
ns
-
-
SN74HC597
SHCP to Q
propagation
delay
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
R to Q
propagation
delay
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
STCP(HIGH or
LOW)
pulse width
2.0V
CL=50pF
SHCP(HIGH
or LOW)
pulse width
STCP to Q
propagation
delay
tPLH, tPHL
—
PL to Q
propagation
delay
transition time
tt
tw
MR LOW
PL LOW
Dn to STCP
Set_up time
DS to SHCP
Set_up time
tsu
—
PL to SHCP
Set_up time
Dn to STCP
hold time
DS to SHCP
hold time
XBLWversion1.0
th
see Figure 5
see Figure 6
see Figure 5
see Figure 7
see Figure 5
see Figure 5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
120
24
4.5V
CL=50pF
6.0V
CL=50pF
20
2.0V
CL=50pF
120
4.5V
CL=50pF
6.0V
CL=50pF
20
2.0V
CL=50pF
120
4.5V
CL=50pF
see Figure 5
see Figure 6
24
24
6.0V
CL=50pF
20
2.0V
CL=50pF
120
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
see Figure 7
24
20
90
see Figure 9
18
15
90
see Figure 9
18
15
see Figure
10
90
18
15
5
see Figure 9
5
6.0V
CL=50pF
5
2.0V
CL=50pF
5
4.5V
CL=50pF
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see Figure 9
5
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45
ns
265
ns
53
ns
45
ns
375
ns
75
ns
64
ns
325
ns
65
ns
55
ns
110
ns
22
ns
-
19
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
8 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
—
PL to SHCP
hold time
R to SHCP
recovery time
trec
6.0V
CL=50pF
2.0V
CL=50pF
4.5V
CL=50pF
6.0V
CL=15pF
2.0V
CL=50pF
4.5V
CL=50pF
5
see Figure
10
5
5
5
90
see Figure 8
18
ns
-
-
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
-
-
ns
MHZ
-
-
-
-
MHZ
6.0V
CL=50pF
15
2.0V
CL=50pF
4.8
4.5V
CL=50pF
6.0V
CL=50pF
4.5V
CL=50pF
see Figure 5
-
-
60
ns
4.5V
CL=50pF
see Figure 6
-
-
74
ns
4.5V
CL=50pF
see Figure 5
-
-
86
ns
4.5V
CL=50pF
see Figure 7
-
-
78
ns
4.5V
CL=50pF
see Figure 5
-
-
22
ns
4.5V
CL=50pF
see Figure 5
24
-
-
ns
4.5V
CL=50pF
see Figure 5
24
-
-
ns
MR LOW
4.5V
CL=50pF
see Figure 6
38
-
-
ns
PL LOW
Dn to STCP
Set_up time
4.5V
CL=50pF
see Figure 7
30
-
4.5V
CL=50pF
see Figure 9
18
-
-
ns
4.5V
CL=50pF
see Figure 9
18
-
-
ns
PL to SHCP
Set_up time
4.5V
CL=50pF
see Figure
10
18
-
-
ns
Dn to SHCP
hold time
4.5V
CL=50pF
see Figure 9
5
-
-
ns
4.5V
CL=50pF
see Figure 9
5
-
-
ns
4.5V
CL=50pF
see Figure
10
5
-
-
ns
trec
4.5V
CL=50pF
see Figure 8
18
-
-
ns
fmax
4.5V
CL=15pF
see Figure 5
20
-
-
MHZ
SHCP
maximum
frequency
fmax
SN74HCT597
SHCP to Q
propagation
delay
R to Q
propagation
delay
STCP to Q
propagation
delay
see Figure 5
24
28
MHZ
tPLH, tPHL
—
PL to Q
propagation
delay
transition time
STCP(HIGH or
LOW)
pulse width
SHCP(HIGH
or LOW)
pulse width
DS to SHCP
Set_up time
tt
tw
tsu
—
DS to SHCP
hold time
th
—
PL to SHCP
hold time
R to SHCP
recovery time
maximum
frequency
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ns
9 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Testing Circuit
AC Testing Circuit
Figure 4. Test circuit for measuring switching times
CL includes probe and jig capacitance.
AC Testing Waveforms
Figure 5. Shift clock and storage clock inputs to output, propagation delays, pulse widths and maximum
clock frequency
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Figure 6. input (
R) to (Q), output propagation delays and (
—
R) pulse width
—
Figure 7 Input (PL) to (Q), output propagation delays, PL pulse width and output transition times
Figure 8 Input (
XBLWversion1.0
R) to shift clock (SHCP) and storage clock (STCP) recovery times
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XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Figure 9 Hold and set-up times for (DS), (Dn) inputs to (SHCP), (STCP) inputs
—
Figure 10 Set-up times for (PL) input to (SHCP) input
Measurement Points
Input
Type
Output
SN74HC597
VM
VM
VX
VY
0.5×VCC
0.5×VCC
0.1×VCC
0.9×VCC
SN74HCT597
1.3V
1.3V
0.1×VCC
0.9×VCC
Test Data
Type
Input
Load
VEXT
VI
tr = tf
SN74HC597
CL
RL
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
VCC
3.0ns
15pF, 50pF
1KΩ
Open
VCC
GND
SN74HCT597
3.0V
3.0ns
15pF, 50pF
1KΩ
Open
VCC
GND
XBLWversion1.0
www.xinboleic.com
Technical Support:4009682003
12 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Package Information
DIP16
XBLWversion1.0
www.xinboleic.com
Technical Support:4009682003
13 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
SOP16
XBLWversion1.0
www.xinboleic.com
Technical Support:4009682003
14 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
TSSOP16
XBLWversion1.0
www.xinboleic.com
Technical Support:4009682003
15 / 16
XBLW SN74HC/HCT597
8-Bit Shift Register With Input Flip-Flops
Statement:
Shenzhen xinbole electronics co., ltd. reserves the right to change the product specifications, without notice!
Before placing an order, the customer needs to confirm whether the information obtained is the latest version,
and verify the integrity of the relevant information.
Any semiconductor product is liable to fail or malfunction under certain conditions, and the buyer shall be
responsible for complying with safety standards in the system design and whole machine manufacturing using
Shenzhen xinbole electronics co., ltd products, and take appropriate security measures to avoid the potential risk
of failure may result in personal injury or property losses of the situation occurred!
This document is for referenceonly,and the actual use should be based on the application test results.
Product performance is never ending, Shenzhen xinbole electronics co., ltd will be dedicated to provide
customers with better performance, better quality of integrated circuit products.
XBLWversion1.0
www.xinboleic.com
Technical Support:4009682003
16 / 16
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