AOB428-VB

AOB428 www.VBsemi.com Power MOSFET FEATURES PRODUCT SUMMARY RDS(on) () • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Low-Profile Through-Hole • Available in Tape and Reel • Dynamic dV/dt Rating • 150 °C Operating Temperature • Fast Switching • Fully Avalanche Rated • Compliant to RoHS Directive 2002/95/EC 100 VDS (V) VGS = 10 V Qg (Max.) (nC) 0.020 70 Qgs (nC) 13 Qgd (nC) 39 Configuration Single D D2PAK (TO-263) G G D S S N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current SYMBOL VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta, e Linear Derating Factor Single Pulse Avalanche Energyb, e Avalanche Currenta Repetiitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) ID IDM EAS IAR EAR TC = 25 °C TA = 25 °C PD dV/dt TJ, Tstg for 10 s LIMIT 100 ±20 70 56 250 1.0 580 20 13 3.1 130 5.0 - 55 to + 150 300d UNIT V A W/°C mJ A mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 2.7 mH, Rg = 25 , IAS = 18 A (see fig. 12). c. ISD 20 A, dI/dt  150 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply 服务热线：400-655-8788 1 AOB428 www.VBsemi.com THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient (PCB Mounted, Steady-State)a PARAMETER RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0 V, ID = 250 μA 100 - - V VDS/TJ Reference to 25 °C, ID = 1 mAc - 0.29 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS =100 V, VGS = 0 V - - 25 VDS = 80 V, VGS = 0 V, TJ = 125 °C - - 250 - 0.020 -  6.7 - - S - 1300 - - 430 - - 130 - - - 70 Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = 11 Ab VGS = 10 V VDS = 50 V, ID = 11 Ad μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs - - 13 Gate-Drain Charge Qgd - - 39 Turn-On Delay Time td(on) - 14 - tr - 51 - - 45 - - 36 - - - 20 - - 72 - - 2.0 - 300 610 ns - 3.4 7.1 μC Rise Time Turn-Off Delay Time Fall Time td(off) VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5d VGS = 10 V ID = 20 A, VDS = 160 V, see fig. 6 and 13b, c VDD = 50 V, I D = 20 A, Rg = 9.1 , RD = 5.4 , see fig. 10b, c tf pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 20 A, VGS = 0 Vb TJ = 25 °C, IF = 20 A, dI/dt = 100 A/μsb, c V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. c. Uses IRF640/SiHF640 data and test conditions. 服务热线：400-655-8788 2 AOB428 www.VBsemi.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 101 ID, Drain Current (A) ID, Drain Current (A) Top 100 25 °C 100 4.5 V 20 µs Pulse Width TC = 25 °C 100 10-1 4 4.5 V 100 20 µs Pulse Width TC = 150 °C 10-1 91037_02 100 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TJ = 175 °C 6 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) Top 5 VGS, Gate-to-Source Voltage (V) 91037_03 Fig. 1 - Typical Output Characteristics, TJ = 25 °C VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 20 µs Pulse Width VDS = 50 V 10-1 101 VDS, Drain-to-Source Voltage (V) 91037_01 101 150 °C 101 91037_04 3.0 2.5 ID = 20 A VGS = 10 V 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature 服务热线：400-655-8788 3 AOB428 3000 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 2500 2000 Ciss 1500 1000 Coss 500 Crss ISD, Reverse Drain Current (A) www.VBsemi.com 150 °C 25 °C 101 100 VGS = 0 V 0 100 101 0.50 VDS, Drain-to-Source Voltage (V) 91037_05 2 VDS = 100 V VDS = 40 V 8 4 0 91037_06 102 10 µs 5 100 µs 2 10 5 1 ms 2 10 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 5 For test circuit see figure 13 0 15 30 45 1.50 Operation in this area limited by RDS(on) 5 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 103 VDS = 160 V 12 1.30 1.10 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 20 A 16 0.90 VSD, Source-to-Drain Voltage (V) 91037_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 20 0.70 60 2 0.1 75 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 0.1 91037_08 2 5 1 2 5 10 2 5 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area 服务热线：400-655-8788 4 AOB428 www.VBsemi.com RD VDS 22 ID, Drain Current (A) VGS D.U.T. Rg 18 14 + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 10 Fig. 10a - Switching Time Test Circuit 5 VDS 90 % 0 50 25 75 100 125 150 TC, Case Temperature (°C) 91037_09 10 % VGS Fig. 9 - Maximum Drain Current vs. Case Temperature td(on) td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 0.1 0 − 0.5 0.2 0.1 0.05 0.02 0.01 PDM 10-3 10-5 91037_11 t1 Single Pulse (Thermal Response) 10-2 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 服务热线：400-655-8788 5 AOB428 www.VBsemi.com VDS 15 V tp Driver L VDS Rg D.U.T. + A - VDD IAS 20 V tp IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 1400 ID 8.0 A 11.0 A Bottom 20.0 A Top 1200 1000 800 600 400 200 0 VDD = 50 V 25 91037_12c 50 75 100 125 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit 服务热线：400-655-8788 6 AOB428 www.VBsemi.com Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel 服务热线：400-655-8788 7 AOB428 www.VBsemi.com TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L2 B A1 L4 Detail “A” Rotated 90° CW scale 8:1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. 4 E1 Section B - B and C - C Scale: none View A - A INCHES MILLIMETERS MAX. MIN. MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. 服务热线：400-655-8788 8 AOB428 www.VBsemi.com RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) 服务热线：400-655-8788 9 AOB428 www.VBsemi.com Disclaimer All products due to improve reliability, function or design or for other reasons, product specifications and data are subject to change without notice. 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