SiT3808
1 MHz to 80 MHz High Performance MEMS VCXO
Features
◼
◼
◼
◼
◼
◼
◼
◼
◼
◼
Applications
Any frequency between 1 MHz and 80 MHz with 6 decimal
places of accuracy
100% pin-to-pin drop-in replacement to quartz-based VCXO
Frequency stability as tight as ±10 ppm
Widest pull range options from ±25 ppm to ±1600 ppm
Industrial or extended commercial temperature range
Superior pull range linearity of ≤1%, 10 times better
than quartz
LVCMOS/LVTTL compatible output
Four industry-standard packages:
2.7 mm x 2.4 mm (4-pin), 3.2 mm x 2.5mm (4-pin),
5.0 mm x 3.2 mm (6-pin), 7.0 mm x 5.0 mm (6-pin)
Instant samples with Time Machine II and Field
Programmable Oscillators
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
◼
◼
◼
Telecom clock synchronization, instrumentation
Low bandwidth analog PLL, jitter cleaner,
clock recovery, audio
Video, 3G/HD-c SDI, FPGA, broadband and
networking
Electrical Specifications
Table 1. Electrical Characteristics[1, 2, 3]
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
1
–
80
MHz
Frequency Stability and Aging
Frequency Stability
Aging
Operating Temperature Range
Inclusive of Initial tolerance[4] at 25°C, and variation over
temperature, rated supply voltage and load.
-10
–
+10
ppm
-25
–
+25
ppm
-50
–
+50
ppm
F_aging
-5
–
+5
ppm
T_use
-20
–
+70
°C
Extended Commercial
-40
–
+85
°C
Industrial
F_stab
10 years, 25°C
Supply Voltage and Current Consumption
Supply Voltage
Current Consumption
Standby Current
Vdd
Idd
I_std
1.71
1.8
1.89
V
2.25
2.5
2.75
V
Additional supply voltages between 2.5 V and 3.3 V can be
supported. Contact SiTime for additional information.
2.52
2.8
3.08
V
2.97
3.3
3.63
V
–
31
33
mA
No load condition, f = 20 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V
–
29
31
mA
No load condition, f = 20 MHz, Vdd = 1.8 V
–
–
70
A
Vdd = 2.5 V, 2.8 V, 3.3 V, ST = GND, output is Weakly Pulled Down
–
–
10
A
Vdd = 1.8 V, ST = GND, output is Weakly Pulled Down
VCXO Characteristics
Pull Range[5, 6]
Upper Control Voltage
PR
VC_U
±25, ±50, ±100, ±150, ±200,
±400, ±800, ±1600
ppm
1.7
–
–
V
Vdd = 1.8 V, Voltage at which maximum deviation is guaranteed.
2.4
–
–
V
Vdd = 2.5 V, Voltage at which maximum deviation is guaranteed.
2.7
–
–
V
Vdd = 2.8 V, Voltage at which maximum deviation is guaranteed.
3.2
–
–
V
Vdd = 3.3 V, Voltage at which maximum deviation is guaranteed.
Voltage at which minimum deviation is guaranteed.
Lower Control Voltage
VC_L
–
–
0.1
V
Control Voltage Input Impedance
Z_in
100
–
–
kΩ
Control Voltage Input Capacitance
C_in
–
5
–
pF
Lin
–
0.1
1
Linearity
Frequency Change Polarity
Control Voltage Bandwidth (-3dB)
Rev 1.02
–
V_BW
8
%
–
Positive slope
–
See the APR (Absolute Pull Range) Table 11
–
kHz
25 February 2022
Contact SiTime for 16 kHz and other high bandwidth options
www.sitime.com
SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Electrical Specifications (continued)
Table 1. Electrical Characteristics[1, 2, 3]
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
LVCMOS Output Characteristics
DC
45
–
55
%
All Vdds. Refer to Note 11 for definition of Duty Cycle
Rise/Fall Time
Tr, Tf
–
1.5
2
ns
Vdd = 1.8 V, 2.5 V, 2.8 V or 3.3 V, 10% - 90% Vdd level
Output High Voltage
VOH
90%
–
–
Vdd
IOH = -7 mA (Vdd = 3.0 V or 3.3 V)
IOH = -4 mA (Vdd = 2.8 V or 2.5 V)
IOH = -2 mA (Vdd = 1.8 V)
Output Low Voltage
VOL
–
–
10%
Vdd
IOL = 7 mA (Vdd = 3.0 V or 3.3 V)
IOL = 4 mA (Vdd = 2.8 V or 2.5 V)
IOL = 2 mA (Vdd = 1.8 V)
Input Pull-up Impedance
Z_in
–
100
250
kΩ
For the OE/ST pin for 6-pin devices
Input Capacitance
C_in
–
5
–
pF
For the OE/ST pin for 6-pin devices
Duty Cycle
Input Characteristics
Startup and Resume Timing
Startup Time
OE Enable/Disable Time
Resume Time
T_start
–
–
10
ms
See Figure 7 for startup resume timing diagram
T_oe
–
–
180
ns
f = 40 MHz, all Vdds. For other freq,
T_oe = 100 ns + 3 clock periods
T_resume
–
7
10
ms
See Figure 8 for resume timing diagram
Jitter
RMS Period Jitter
RMS Phase Jitter (random)
T_jitt
T_phj
–
1.5
2
ps
f = 20 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V
–
2
3
ps
f = 20 MHz, Vdd = 1.8 V
–
0.5
1
ps
f = 20 MHz, Integration bandwidth = 12 kHz to 20 MHz, All Vdds
Notes:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
2. The typical value of any parameter in the Electrical Characteristics table is specified for the nominal value of the highest voltage option for that
parameter and at 25°C temperature.
3. All max and min specifications are guaranteed across rated volta ge variations and operating temperature ranges, unless specified otherwise.
4. Initial tolerance is measured at Vin = Vdd/2.
5. Absolute Pull Range (APR) is defined as the guaranteed pull range over temperature and voltage.
6. APR = pull range (PR) - frequency stability (F_stab) - Aging (F_aging).
Rev 1.02
Page 2 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Table 2. Pin Description. 4-Pin Configuration
Top View
(For 2.7 x 2.4 mm and 3.2 x 2.5 mm packages)
Pin
Symbol
1
VIN
Functionality
2
GND
Power
Electrical ground
3
CLK
Output
Oscillator output
4
VDD
Power
Power supply voltage[7]
Input
0-Vdd: produces voltage dependent frequency change
Note:
7. A capacitor value of 0.1 µF between VDD and GND is recommended.
Figure 1. Pin Assignments
Table 3. Pin Description. 6-Pin Configuration
Top View
(For 5.0 x 3.2 mm and 7.0 x 5.0 mm packages)
Pin
Symbol
1
VIN
Functionality
Input
No Connect
2
NC/OE/ ST
Output Enable
Standby
0-Vdd: produces voltage dependent frequency change
H or L or Open: No effect on output frequency or other
device functions
H or Open[8]: specified frequency output L: output is high
H or Open[8]: specified frequency output
L: output is low (weak pull down)[9]. Oscillation stops
3
GND
Power
Electrical ground
4
CLK
Output
5
NC
No Connect
Oscillator output
H or L or Open: No effect on output frequency or other
device functions
6
VDD
Power
Figure 2. Pin Assignments
Power supply voltage[10]
Notes:
8. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 2 in the 6-pin package is not externally driven. If pin 2 needs to be left floating,
use the NC option.
9. Typical value of the weak pull-down impedance is 5 mΩ.
10. A capacitor value of 0.1 µF between VDD and GND is recommended.
Table 4. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Min.
Max.
Unit
Storage Temperature
-65
150
°C
Vdd
-0.5
4
V
Electrostatic Discharge
–
2000
V
Soldering Temperature (follow standard Pb free soldering guidelines)
–
260
°C
Package
JA, 4 Layer Board
JA, 2 Layer Board
JC, Bottom
(°C/W)
(°C/W)
(°C/W)
7050
191
263
30
5032
97
199
24
3225
109
212
27
2724
117
222
26
Table 5. Thermal Consideration
Table 6. Environmental Compliance
Parameter
Condition/Test Method
Mechanical Shock
MIL-STD-883F, Method 2002
Mechanical Vibration
MIL-STD-883F, Method 2007
Temperature Cycle
JESD22, Method A104
Solderability
MIL-STD-883F, Method 2003
Moisture Sensitivity Level
MSL1 @ 260°C
Rev 1.02
Page 3 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Phase Noise Plot
-100
-110
Integrated random phase jitter (RMS, 12 kHz–
5 MHz): 0.52 ps
Phase Noise (dBc/Hz)
-120
-130
-140
-150
-160
-170
3
4
10
5
10
6
10
10
Frequency Offset (Hz)
Figure 3. Phase Noise, 10 MHz, 3.3 V, LVCMOS Output
Test Circuit and Waveform[11, 12]
Power
Supply
0.1µF
Vdd
Vout
4
3
1
Vout
Test
Point
Power
Supply
15pF
(including probe
and fixture
capacitance)
2
OE/ST Function
0.1µF
6
5
4
1
2
3
Test
Point
15pF
(including probe
and fixture
capacitance)
OE/ST Function
Vc
Vc
Figure 4. Test Circuit (4-Pin Device)
Vdd
Figure 5. Test Circuit (6-Pin Device)
tf
tr
90% Vdd
50%
10% Vdd
High Pulse
(TH)
Low Pulse
(TL)
Period
Figure 6. Waveform
Note:
11. Duty Cycle is computed as Duty Cycle = TH/Period.
12. SiT3808 supports the configurable duty cycle feature. For custom duty cycle at any given frequency, contact SiTime.
Rev 1.02
Page 4 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Timing Diagram
80% Vdd, 2.5/2.8/3.3V devices
80% Vdd, 1.8V devices
Vdd
Vdd
50% Vdd
T_start
Pin 4 Voltage
[13]
No Glitch
during start up
T_resume
ST Voltage
CLK Output
CLK Output
T_start: Time to start from power-off
Figure 7. Startup Timing (OE/ ST Mode)
T_resume: Time to resume from ST
Figure 8. Standby Resume Timing ( ST Mode Only)
Vdd
Vdd
50% Vdd
OE Voltage
50% Vdd
T_oe
OE Voltage
T_oe
CLK Output
HZ
CLK Output
T_oe: Time to re-enable the clock output
T_oe: Time to put the output in High Z mode
Figure 9. OE Enable Timing (OE Mode Only)
Figure 10. OE Disable Timing (OE Mode Only)
Notes:
13. SiT3808 supports “no runt” pulses and “no glitch” output during startup or resume.
14. SiT3808 supports gated output which is accurate within rated frequency stability from the first cycle.
Rev 1.02
Page 5 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Programmable Drive Strength
The SiT3808 includes a programmable drive strength
feature to provide a simple, flexible tool to optimize the clock
rise/fall time for specific applications. Benefits from the
programmable drive strength feature are:
◼
Improves system radiated electromagnetic interference
(EMI) by slowing down the clock rise/fall time.
◼
Improves the downstream clock receiver’s (RX) jitter by
decreasing (speeding up) the clock rise/fall time.
◼
Ability to drive large capacitive loads while maintaining
full swing with sharp edge rates.
For more detailed information about rise/fall time control and
drive strength selection, see the SiTime Application Notes
section.
EMI Reduction by Slowing Rise/Fall Time
Figure 11 shows the harmonic power reduction as the
rise/fall times are increased (slowed down). The rise/fall
times are expressed as a ratio of the clock period. For the
ratio of 0.05, the signal is very close to a square wave. For
the ratio of 0.45, the signal is very close to near-triangular
waveform. These results, for example, show that the 11th
clock harmonic can be reduced by 35 dB if the rise/fall edge
is increased from 5% of the period to 45% of the period.
trise=0.05
trise=0.1
trise=0.15
trise=0.2
trise=0.25
trise=0.3
trise=0.35
trise=0.4
trise=0.45
10
Harmonic amplitude (dB)
0
-10
-20
The SiT3808 can support up to 60 pF maximum capacitive
loads. Refer to the Rise/Tall Time Tables to determine the
proper drive strength for the desired combination of output
load vs. rise/fall time.
SiT3808 Drive Strength Selection
Tables 7 through 10 define the rise/fall times for a given
capacitive load and supply voltage.
1. Select the table that matches the SiT3808 nominal
supply voltage (1.8 V, 2.5 V, 2.8 V, 3.3 V).
2. Select the capacitive load column that matches the
application requirement (5 pF to 60 pF)
3. Under the capacitive load column, select the desired
rise/fall times.
4. The left-most column represents the part number
code for the corresponding drive strength.
5. Add the drive strength code to the part number for
ordering purposes.
Calculating Maximum Frequency
Based on the rise and fall time data given in Tables 7
through 10, the maximum frequency the oscillator can
operate with guaranteed full swing of the output voltage
over temperature can be calculated as follows:
Max Frequency =
1
6 x Trf_10/90
where Trf_10/90 is the typical rise/fall time at
10% to 90% Vdd.
-30
-40
Example 1
-50
Calculate fMAX for the following condition:
-60
-70
-80
1
3
5
7
9
11
Harmonic number
Figure 11. Harmonic EMI reduction as a Function of
Slower Rise/Fall Time
◼
Vdd = 3.3 V (Table 10)
◼
Capacitive Load: 30 pF
◼
Typical Tr/f time = 1.66 ns
(drive strength part number code = G)
Jitter Reduction with Faster Rise/Fall Time
Part number for the above example:
Power supply noise can be a source of jitter for the downstream
chipset. One way to reduce this jitter is to increase rise/fall time
(edge rate) of the input clock. Some chipsets would require
faster rise/fall time in order to reduce their sensitivity to this
type of jitter. Refer to the Rise/Fall Time Tables to determine
the proper drive strength.
SiT3808AIGG2-33EH-49.152000
Drive strength code is inserted here. Default setting is “-”
High Output Load Capability
The rise/fall time of the input clock varies as a function of the
actual capacitive load the clock drives. At any given drive
strength, the rise/fall time becomes slower as the output
load increases. As an example, for a 3.3 V SiT3808 device
with default drive strength setting, the typical rise/fall time is
1.15 ns for 15 pF output load. The typical rise/fall time slows
down to 2.72 ns when the output load increases to 45 pF.
One can choose to speed up the rise/fall time to 1.41 ns by
then increasing the drive strength setting to “P” (refer to the
drive strength code in Table 10) on the SiT3808.
Rev 1.02
Page 6 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Rise/Fall Time (10% to 90%) vs CLOAD Tables
Table 7. Vdd = 1.8 V Rise/Fall Times
for Specific CLOAD
Table 8. Vdd = 2.5 V Rise/Fall Times
for Specific CLOAD
Rise/Fall Time Typ (ns)
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
L
12.45
17.68
19.48
46.21
57.82
L
8.68
13.59
18.36
32.70
42.06
A
6.50
10.27
16.21
23.92
30.73
A
4.42
7.18
11.93
16.60
21.38
R
4.38
7.05
11.61
16.17
20.83
R
2.93
4.78
8.15
11.19
14.59
B
3.27
5.30
8.89
12.18
15.75
B
2.21
3.57
6.19
8.55
11.04
S
2.62
4.25
7.20
9.81
12.65
S
1.67
2.87
4.94
6.85
8.80
D
2.19
3.52
6.00
8.31
10.59
D
1.50
2.33
4.11
5.68
7.33
T
1.76
3.01
5.14
7.10
9.15
T
1.06
2.04
3.50
4.84
6.26
E
1.59
2.59
4.49
6.25
7.98
E
0.98
1.69
3.03
4.20
5.51
U
1.49
2.28
3.96
5.55
7.15
U
0.93
1.48
2.69
3.73
4.92
F
1.22
2.10
3.57
5.00
6.46
F
0.90
1.37
2.44
3.34
4.42
W
1.07
1.88
3.23
4.50
5.87
W
0.87
1.29
2.21
3.04
4.02
G
1.01
1.64
2.95
4.12
5.40
G or "-": Default
0.67
1.20
2.00
2.79
3.69
X
0.96
1.50
2.74
3.80
4.98
X
0.44
1.10
1.86
2.56
3.43
K
0.92
1.41
2.56
3.52
4.64
K
0.38
0.99
1.76
2.37
3.18
Y
0.88
1.34
2.39
3.25
4.32
Y
0.36
0.83
1.66
2.20
2.98
Q
0.86
1.29
2.24
3.04
4.06
Q
0.34
0.71
1.58
2.07
2.80
Z or "-": Default
0.82
1.24
2.07
2.89
3.82
Z
0.33
0.65
1.51
1.95
2.65
M
0.77
1.20
1.94
2.72
3.61
M
0.32
0.62
1.44
1.85
2.50
N
0.66
1.15
1.84
2.58
3.41
N
0.31
0.59
1.37
1.77
2.39
P
0.51
1.09
1.76
2.45
3.24
P
0.30
0.57
1.29
1.70
2.28
Table 9. Vdd = 2.8 V Rise/Fall Times
for Specific CLOAD
Table 10. Vdd = 3.3 V Rise/Fall Times
for Specific CLOAD
Rise/Fall Time Typ (ns)
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
L
7.93
12.69
17.94
30.10
38.89
L
7.18
11.59
17.24
27.57
35.57
A
4.06
6.66
11.04
15.31
19.80
A
3.61
6.02
10.19
13.98
18.10
R
2.68
4.40
7.53
10.29
13.37
R
2.31
3.95
6.88
9.42
12.24
B
2.00
3.25
5.66
7.84
10.11
B
1.65
2.92
5.12
7.10
9.17
S
1.59
2.57
4.54
6.27
8.07
S
1.43
2.26
4.09
5.66
7.34
D
1.19
2.14
3.76
5.21
6.72
D
1.01
1.91
3.38
4.69
6.14
T
1.00
1.79
3.20
4.43
5.77
T
0.94
1.51
2.86
3.97
5.25
E
0.94
1.51
2.78
3.84
5.06
E
0.90
1.36
2.50
3.46
4.58
U
0.90
1.38
2.48
3.40
4.50
U
0.86
1.25
2.21
3.03
4.07
F
0.87
1.29
2.21
3.03
4.05
F or "-": Default
0.48
1.15
1.95
2.72
3.65
W
0.62
1.19
1.99
2.76
3.68
W
0.38
1.04
1.77
2.47
3.31
G or "-": Default
0.41
1.08
1.84
2.52
3.36
G
0.36
0.87
1.66
2.23
3.03
X
0.37
0.96
1.72
2.33
3.15
X
0.34
0.70
1.56
2.04
2.80
K
0.35
0.78
1.63
2.15
2.92
K
0.33
0.63
1.48
1.89
2.61
Y
0.33
0.67
1.54
2.00
2.75
Y
0.32
0.60
1.40
1.79
2.43
Q
0.32
0.63
1.46
1.89
2.57
Q
0.32
0.58
1.31
1.69
2.28
Z
0.31
0.60
1.39
1.80
2.43
Z
0.30
0.56
1.22
1.62
2.17
M
0.30
0.57
1.31
1.72
2.30
M
0.30
0.55
1.12
1.54
2.07
N
0.30
0.56
1.22
1.63
2.22
N
0.30
0.54
1.02
1.47
1.97
P
0.29
0.54
1.13
1.55
2.13
P
0.29
0.52
0.95
1.41
1.90
Rev 1.02
Page 7 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
For more information regarding SiTime’s field programmable
solutions, visit Time Machine II and Field Programmable
Devices sections.
Instant Samples with Time Machine and
Field Programmable Oscillators
SiTime supports a field programmable version of the SiT3808
low power oscillator for fast prototyping and real time
customization of features. The Field Programmable Devices
(FP devices) are available for all four standard SiT3808
package sizes and can be configured to one’s exact
specification using the Time Machine II, an USB powered
MEMS oscillator programmer.
SiT3808 is typically factory-programmed per customer
ordering codes for volume delivery.
Customizable Features of the SiT3808 FP Devices
Include
◼
◼
◼
◼
◼
Any frequency between 1 and 80 MHz
Three frequency stability options:
±10 ppm, ±25 ppm, ±50 ppm
Two operating temperatures: -20 to 70°C or -40 to 85°C
Four supply voltage options: 1.8 V, 2.5 V, 2.8 V, and 3.3 V
Eight pull range options: ±25 ppm, ±50 ppm, ±100 ppm,
±150 ppm, ±200 ppm, ±400 ppm, ±800 ppm, ±1600 ppm
Rev 1.02
Page 8 of 15
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)[15]
Recommended Land Pattern (Unit: mm)
2.7 x 2.4 x 0.75 mm (100% compatible with 2.5 x 2. 0 mm footprint)
1.9
2.7 ± 0.05
0.50
1.5
1.0
YXXXX
1.25
2.4 ± 0.05
1.00
0.85
1.1
0.75 ± 0.05
3.2 x 2.5 x 0.75 mm
3.2 ± 0.05
#4
#2
#2
1.2
0.7
1.9
0.9
#3
YXXXX
#1
2.2
2.1
#3
2.5 ± 0.05
#4
#1
0.9
1.4
0.75 ± 0.05
5.0 x 3.2 x 0.75 mm
5.0 ± 0.10
2.54
#4
YXXXX
#5
#6
1.20
#4
3.2 ± 0.10
#5
#6
0.90
#1
#2
#3
#3
#2
#1
0.64
0.75 ± 0.05
7.0 x 5.0x 0.90 mm
#2
#5
#6
1.10
#3
#3
#2
#1
1.60
YXXXX
#1
#4
3.80
#4
2.60
#5
5.0 ± 0.10
#6
5.08
5.08
7.0 ± 0.10
1.40
0.90 ± 0.10
1.60
Note:
15. Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the as sembly location of
the device.
Rev 1.02
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Ordering Information
SiT3808AC -22-33EH-49.152000D
Packing Method
“T”: 12 mm Tape & Reel, 3ku reel
“Y”: 12 mm Tape & Reel, 1ku reel
“D”: 8 mm Tape & Reel, 3ku reel
“E”: 8 mm Tape & Reel, 1ku reel
Blank for Bulk
Part Family
“SiT3808”
Revision Letter
“A” is the revision
Temperature Range
Frequency
“C” Commercial, -20 to 70ºC
“I” Industrial, -40 to 85ºC
1.000000 to 80.000000 MHz
Pull Range Options
“M” for ±25 ppm
“B” for ±50 ppm
“E” for ±100 ppm
“G” for ±150 ppm
“H” for ±200 ppm
“X” for ±400 ppm
“Y” for ±800 ppm
“Z” for ±1600 ppm
Output Drive Strength
“–” Default (datasheet limits)
See Tables 7 to 11 for
rise/fall times
“X” “Z”
“U”
“L” “S”
“K” “M”
“F”
“A” “D”
“W” “Y” “N”
“R” “T”
“Q” “P”
“G”
“B” “E”
Feature Pin
“N” for No Connect in 6-pin devices,
Default value in 4-pin device
Package
“G” 4-pin, 2.7 x 2.4 mm x mm
“2” 4-pin, 3.2 x 2.5 mm x mm
“C” 6-pin, 5.0 x 3.2 mm x mm
“D” 6-pin, 7.0 x 5.0 mm x mm
“E” for Output Enable (6-pin only)
“S” for Standby (6-pin only)
Supply Voltage
“18” for 1.8 V ±5%
“25” for 2.5 V ±10%
“28” for 2.8 V ±10%
“33” for 3.3 V ±10%
Frequency Stability
“F” for ±10 ppm
“2” for ±25 ppm
“3” for ±50 ppm
Table 11. APR Definition
Absolute pull range (APR) = Norminal pull range (PR) - frequency stability (F_stab) - Aging (F_aging)
Frequency Stability
Nominal Pull Range
± 10
± 25
± 50
APR (PPM)
± 25
± 10
–
± 50
± 35
± 20
–
–
± 100
± 85
± 70
± 45
± 150
± 135
± 120
± 95
± 200
± 185
± 170
± 145
± 400
± 385
± 370
± 345
± 800
± 785
± 770
± 745
± 1600
± 1585
± 1570
± 1545
Table 12. Ordering Codes for Supported Tape & Reel Packing Method[16]
Device Size
12 mm T&R (3ku)
12 mm T&R (1ku)
8 mm T&R (3ku)
2.7 x 2.4 mm
T
Y
–
8 mm T&R 1ku)
–
3.2 x 2.5 mm
–
–
D
E
5.0 x 3.2 mm
T
Y
–
–
7.0 x 5.0 mm
T
Y
–
–
Note:
16. “–” indicates “not available.”
Rev 1.02
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SiT3808 1 MHz to 80 MHz High Performance MEMS VCXO
Table 13. Additional Information
Document
Description
Download Link
Manufacturing Notes
Tape & Reel dimension, reflow profile
and other manufacturing related info
https://www.sitime.com/support/resource-library/manufacturing-notes-sitime-products
Qualification Reports
RoHS report, reliability reports,
composition reports
http://www.sitime.com/support/quality-and-reliability
Performance Reports
Additional performance data such as
phase noise, current consumption and
jitter for selected frequencies
http://www.sitime.com/support/performance-measurement-report
Termination Techniques
Termination design recommendations
http://www.sitime.com/support/application-notes
Layout Techniques
Layout recommendations
http://www.sitime.com/support/application-notes
VCXO Specifications
Definition of key VCXO specifications
such as APR and Kv
https://www.sitime.com/sites/default/files/gated/AN10020-VCXO-SpecDefinitions.pdf
VCXO in PLL Design
Selection of VCXO parameters and
trade-offs in PLL designs
https://www.sitime.com/sites/default/files/gated/AN10021-VCXO-PLL-DesignGuidelines.pdf
Table 14. Revision History
Revision
Release Date
Change Summary
0.6
24-Jan-2013
Preliminary
1.0
7-Mar-2014
Preliminary removed from title
Updated Features and Application
Updated Electrical Specifications table
Updated Figure 4
Added new 6-pin device for Figure 5
Updated Timing Diagrams
Updated Programmable Drive Strength section
Updated Ordering Information drawing
Updated APR table
Updated ordering codes for tape and reel table
Reformatted additional information table columns
1.01
8-Jan-2015
Revised VIN functionality description in Table 3
1.02
25-Feb-2022
Corrected CLK and VDD functionality description in Table 2
Updated logo, company address, links and other page layout changes. Date format update
Corrected typo for 2.5x2.0 mm2 to be 2.7x2.4 mm2 package size, with suffixes Y and T in 12mm reels
SiTime Corporation, 5451 Patrick Henry Drive, Santa Clara, CA 95054, USA | Phone: +1-408-328-4400 | Fax: +1-408-328-4439
© SiTime Corporation 2013-2022. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liabi lity for any loss, damage
or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect
or accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or
(iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by
operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or
usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any SiTime product and any product documentation. Products sold by
SiTime are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved
or at stake. All sales are made conditioned upon compliance with the critical uses policy set forth below.
CRITICAL USE EXCLUSION POLICY
BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR
FACILITIES OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products does
not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale
of products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly
prohibited.
Rev 1.02
Page 11 of 15
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Silicon MEMS Outperforms Quartz
Supplemental Information
The Supplemental Information section is not part of the datasheet and is for informational purposes only.
Rev 1.02
Page 12 of 15
www.sitime.com
Silicon MEMS Outperforms Quartz
Best Reliability
Best Electro Magnetic Susceptibility (EMS)
Silicon is inherently more reliable than quartz. Unlike
quartz suppliers, SiTime has in-house MEMS and analog
CMOS expertise, which allows SiTime to develop the most
reliable products. Figure 1 shows a comparison with
quartz technology.
SiTime’s oscillators in plastic packages are up to 54 times
more immune to external electromagnetic fields than
quartz oscillators as shown in Figure 3.
Why is SiTime Best in Class:
Why is SiTime Best in Class:
◼
SiTime’s MEMS resonators are vacuum sealed
using an advanced EpiSeal™ process, which
eliminates foreign particles and improves long term
aging and reliability
◼
World-class MEMS and CMOS design expertise
◼
Internal differential architecture for best common
mode noise rejection
◼
Electrostatically driven MEMS resonator is more
immune to EMS
Reliability (Million Hours)
SiTime
IDT
1,140
38
KYCA
EPSN
EPSN
TXC
CW
SLAB
SiTime
28
Figure 3. Electro Magnetic Susceptibility (EMS)[3]
Best Power Supply Noise Rejection
Figure 1. Reliability Comparison[1]
SiTime’s MEMS oscillators are more resilient against noise
on the power supply. A comparison is shown in Figure 4.
Best Aging
Unlike quartz, MEMS oscillators have excellent long
term aging performance which is why every new SiTime
product specifies 10-year aging. A comparison is shown in
Figure 2.
Why is SiTime Best in Class:
Why is SiTime Best in Class:
◼
◼
SiTime’s MEMS resonators are vacuum sealed
using an advanced EpiSeal™ process, which
eliminates foreign particles and improves long term
aging and reliability
◼
On-chip regulators and internal differential architecture
for common mode noise rejection
◼
MEMS resonator is paired with advanced analog
CMOS IC
SiTime
EPSN
KYCA
Inherently better immunity of electrostatically driven
MEMS resonator
MEMS vs. Quartz Aging
SiTime Oscillator
EpiSeal
MEMS Oscillator
Quartz Oscillator
Oscillator
Quartz
10
8
Aging ( PPM)
8
6
4
2
3
3.5
3.5
Figure 4. Power Supply Noise Rejection[4]
1.5
0
1-Year
10-Year
Figure 2. Aging Comparison[2]
Rev 1.02
Page 13 of 15
www.sitime.com
Silicon MEMS Outperforms Quartz
Best Vibration Robustness
Best Shock Robustness
High-vibration environments are all around us. All electronics,
from handheld devices to enterprise servers and storage
systems are subject to vibration. Figure 5 shows a
comparison of vibration robustness.
SiTime’s oscillators can withstand at least 50,000 g shock.
They all maintain their electrical performance in operation
during shock events. A comparison with quartz devices is
shown in Figure 6.
Why is SiTime Best in Class:
Why is SiTime Best in Class:
◼
The moving mass of SiTime’s MEMS resonators is up
to 3000 times smaller than quartz
◼
The moving mass of SiTime’s MEMS resonators is
up to 3000 times smaller than quartz
◼
Center-anchored MEMS resonator is the most robust
design
◼
Center-anchored MEMS resonator is the most robust
design
Vibration Sensitivity (ppb/g)
TXC
TXC
EPS
CW
KYCA
KYCA
SLAB
EpiSeal
SiTime MEMS
100.0
10.0
1.0
0.1
0.0
10
100
1000
Vibration Frequency (Hz)
KYCA
Figure 5. Vibration Robustness[5]
EPSN
TXC
CW
SLAB
SiTime
Figure 6. Shock Robustness[6]
Figure labels:
▪ TXC = TXC
▪ Epson = EPSN
▪ Connor Winfield = CW
▪ Kyocera = KYCA
▪ SiLabs = SLAB
▪ SiTime = EpiSeal MEMS
Rev 1.02
Page 14 of 15
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Silicon MEMS Outperforms Quartz
Notes:
1. Data source: Reliability documents of named companies.
2. Data source: SiTime and quartz oscillator devices datasheets.
3. Test conditions for Electro Magnetic Susceptibility (EMS):
▪ According to IEC EN61000-4.3 (Electromagnetic compatibility standard)
▪ Field strength: 3V/m
▪ Radiated signal modulation: AM 1 kHz at 80% depth
▪ Carrier frequency scan: 80 MHz – 1 GHz in 1% steps
▪ Antenna polarization: Vertical
▪ DUT position: Center aligned to antenna
Devices used in this test:
Label
Manufacturer
Part Number
Technology
EpiSeal MEMS
SiTime
SiT9120AC-1D2-33E156.250000
MEMS + PLL
EPSN
Epson
EG-2102CA156.2500M-PHPAL3
Quartz, SAW
TXC
TXC
BB-156.250MBE-T
Quartz, 3rd Overtone
CW
Conner Winfield
P123-156.25M
Quartz, 3rd Overtone
KYCA
AVX Kyocera
KC7050T156.250P30E00
Quartz, SAW
SLAB
SiLab
590AB-BDG
Quartz, 3rd Overtone + PLL
4. 50 mV pk-pk Sinusoidal voltage.
Devices used in this test:
Label
Manufacturer
Part Number
Technology
EpiSeal MEMS
SiTime
SiT8208AI-33-33E-25.000000
MEMS + PLL
NDK
NDK
NZ2523SB-25.6M
Quartz
KYCA
AVX Kyocera
KC2016B25M0C1GE00
Quartz
EPSN
Epson
SG-310SCF-25M0-MB3
Quartz
5. Devices used in this test:
same as EMS test stated in Note 3.
6. Test conditions for shock test:
▪ MIL-STD-883F Method 2002
▪ Condition A: half sine wave shock pulse, 500-g, 1ms
▪ Continuous frequency measurement in 100 μs gate time for 10 seconds
Devices used in this test:
same as EMS test stated in Note 3.
7. Additional data, including setup and detailed results, is available upon request to qualified customer. Please contact productsupport@sitime.com.
Rev 1.02
Page 15 of 15
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