FQPF13N50CF-VB

FQPF13N50CF www.VBsemi.com N-Channel 550V (D-S) Power MOSFET FEATURES PRODUCT SUMMARY • Optimal Design VDS (V) 550 RDS(on) max. at 25 °C () Qg max. (nC) 150 Qgs (nC) - Reduced Capacitive Switching Losses - High Body Diode Ruggedness - Avalanche Energy Rated (UIS) • Optimal Efficiency and Operation - Low Cost - Simple Gate Drive Circuitry - Low Figure-of-Merit (FOM): Ron x Qg 12 Qgd (nC) 25 Configuration - Low Area Specific On-Resistance - Low Input Capacitance (Ciss) 0.26 VGS = 10 V Single - Fast Switching APPLICATIONS D TO-220 FULLPAK G S G D S N-Channel MOSFET • Consumer Electronics - Displays (LCD or Plasma TV) • Server and Telecom Power Supplies - SMPS • Industrial - Welding - Induction Heating - Motor Drives • Battery Chargers • SMPS - Power Factor Correction (PFC) Top View ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Gate-Source Voltage AC (f > 1 Hz) Continuous Drain Current (TJ = 150 °C) LIMIT VDS 550 ± 20 30 18 11 56 2.2 281 60 - 55 to + 150 24 0.36 300c VGS VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Maximum Power Dissipation Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dtd Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 10 mH, Rg = 25 , IAS = 7.5 A. c. 1.6 mm from case. d. ISD  ID, starting TJ = 25 °C. 服务热线：400-655-8788 SYMBOL ID IDM EAS PD TJ, Tstg dV/dt UNIT V A W/°C mJ W °C V/ns °C 1 FQPF13N50CF www.VBsemi.com THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 0.45 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = 250 μA - - V VDS/TJ Reference to 25 °C, ID = 250 μA - 0.56 - V/°C 550 VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 1 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 10 Gate-Source Threshold Voltage (N) μA - 0.26 -  gfs VDS = 50 V, ID = 10 A - 12 - S Input Capacitance Ciss 3094 - Coss - 152 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance - 13 - Effective output capacitance, energy relateda Co(er) - 131 - Effective output capacitance, time relatedb Co(tr) - 189 - - 80 150 - 12 - 25 24 50 Drain-Source On-State Resistance Forward Transconductance RDS(on) VGS = 10 V ID = 10 A Dynamic pF VGS = 0 V, VDS = 0 V to 400 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd - Turn-On Delay Time td(on) - Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 10 A, VDS = 400 V VDD = 400 V, ID = 10 A, VGS = 10 V, Rg = 9.1  f = 1 MHz, open drain nC - 31 62 - 117 176 - 56 112 - 1.8 - - - 20 - - 80 - - 1.2 V - 437 - ns - 5.9 - μC - 25 - A ns  Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 10 A, VGS = 0 V TJ = 25 °C, IF = IS = 10 A, dI/dt = 100 A/μs, VR = 20 V Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS. 服务热线：400-655-8788 2 FQPF13N50CF www.VBsemi.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 80 60 TJ = 25 °C RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 15 V 14 V 13 V 12 V 11 11 V V 10 V 9V 8V 7V 6V BOTTOM 5 V 3 TOP 40 20 2.5 2 1.5 1 VGS = 10 V 0.5 0 0 5 10 15 20 25 ID = 10 A 0 - 60 - 40 - 20 0 30 VDS, Drain-to-Source Voltage (V) 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 40 10 000 15 V 14 V 13 V 12 V 11 V V 11 10 V 9V 8V 7V 6V BOTTOM 5 V 30 TJ = 150 °C ġ Capacitance (pF) ID, Drain-to-Source Current (A) TOP 20 Ciss 1000 100 ġ Coss 10 10 ġ Crss 1 0 0 5 10 15 20 25 0 30 VDS, Drain-to-Source Voltage (V) 100 200 300 400 500 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 24 VGS, Gate-to-Source Voltage (V) 80 ID, Drain-to-Source Current (A) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted ġ Crss = Cgd ġ Coss = Cds + Cgd TJ = 25 °C 60 TJ = 150 °C 40 20 VDS = 400 V VDS = 250 V VDS = 100 V 20 16 12 8 4 0 0 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics 服务热线：400-655-8788 25 0 30 60 90 120 150 180 Qg, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage 3 FQPF13N50CF www.VBsemi.com 20 ISD, Reverse Drain Current (A) 100 ID, Drain Current (A) TJ = 150 °C TJ = 25 °C 10 ġ ġ 1 16 12 8 4 VGS = 0 V ġ 0 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 25 1.6 VSD, Source-Drain Voltage (V) 75 100 125 150 TJ, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 7 - Typical Source-Drain Diode Forward Voltage 1000 625 Operation in this area limited by RDS(on) 600 VDS, Drain-to-Source Brakdown Voltage (V) ID, Drain Current (A) 50 100 10 100 μs Limited by RDS(on)* 1 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 550 525 500 BVDSS Limited 10 ms 0.1 475 - 60 - 40 - 20 0 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified 1 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 8 - Maximum Safe Operating Area Normalized Effective Transient Thermal Impedance 575 Fig. 10 - Temperature vs. Drain-to-Source Voltage 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.02 0.05 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case 服务热线：400-655-8788 4 FQPF13N50CF www.VBsemi.com RD VDS QG 10 V VGS D.U.T. RG QGS + - VDD QGD VG 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Charge Fig. 12 - Switching Time Test Circuit Fig. 16 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. VDS 90 % 50 kΩ 12 V 0.2 µF 0.3 µF + 10 % VGS D.U.T. td(on) td(off) tf tr - VDS VGS 3 mA Fig. 13 - Switching Time Waveforms IG ID Current sampling resistors Fig. 17 - Gate Charge Test Circuit L Vary tp to obtain required IAS VDS D.U.T RG + - IAS V DD 10 V 0.01 Ω tp Fig. 14 - Unclamped Inductive Test Circuit VDS tp VDD VDS IAS Fig. 15 - Unclamped Inductive Waveforms 服务热线：400-655-8788 5 FQPF13N50CF www.VBsemi.com Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 18 - For N-Channel 服务热线：400-655-8788 6 FQPF13N50CF www.VBsemi.com TO-220 FULLPAK (HIGH VOLTAGE) A E A1 ØP n d1 d3 D u L1 V L b3 A2 b2 c b e MILLIMETERS DIM. A A1 A2 b b2 b3 c D d1 d3 E e L L1 n ØP u v ECN: X09-0126-Rev. B, 26-Oct-09 DWG: 5972 MIN. 4.570 2.570 2.510 0.622 1.229 1.229 0.440 8.650 15.88 12.300 10.360 INCHES MAX. 4.830 2.830 2.850 0.890 1.400 1.400 0.629 9.800 16.120 12.920 10.630 MIN. 0.180 0.101 0.099 0.024 0.048 0.048 0.017 0.341 0.622 0.484 0.408 13.730 3.500 6.150 3.450 2.500 0.500 0.520 0.122 0.238 0.120 0.094 0.016 2.54 BSC 13.200 3.100 6.050 3.050 2.400 0.400 MAX. 0.190 0.111 0.112 0.035 0.055 0.055 0.025 0.386 0.635 0.509 0.419 0.100 BSC 0.541 0.138 0.242 0.136 0.098 0.020 Notes 1. To be used only for process drawing. 2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads. 3. All critical dimensions should C meet Cpk > 1.33. 4. All dimensions include burrs and plating thickness. 5. No chipping or package damage. 服务热线：400-655-8788 7 FQPF13N50CF www.VBsemi.com Disclaimer All products due to improve reliability, function or design or for other reasons, product specifications and data are subject to change without notice. Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their representatives (collectively, the "Taiwan VBsemi"), assumes no responsibility for any errors, inaccuracies or incomplete data contained in the table or any other any disclosure of any information related to the product.(www.VBsemi.com) Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of any goods or continuous production. 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