PU2BAH

TQL820CA14V50 Taiwan Semiconductor 200mA, Low-IQ 40μA Low-Dropout Regulator with Enable, Reset, Watchdog Functions DESCRIPTION FEATURES The TQL820CA14V50 is a high-performance low ● AEC-Q100 qualified with the following results: dropout voltage regulator for 5V with input range of 3V - Device temperature grade 1: -40°C to 125°C to 50V and low quiescent 40μA. TQL820CA14V50 - Device HBM ESD classification level H2 provides 2% output voltage accuracy and 200mA - Device CDM ESD classification level C3 maximum driving current and is suitable for automotive ● 3V to 50V Input Voltage Range or other supply systems. ● 5V Fixed Output Voltage TQL820CA14V50 just requires one small ceramic ● 70mV@100mA Low Dropout Voltage capacitor of 1μF to exhibit fast regulation and good ● 200mA Output Current stability. And it shows very low-dropout voltage with ● Typical 40μA Low Quiescent Current 70mV in 100mA-load and 110mV in 200mA-load. The ● Typical ±2% Output Voltage Accuracy start operating voltage is 3V which is suitable to ● 1μF Ceramic Output Stable Capacitor cranking condition of automotive system. ● Programmable Delayed Reset timing at Power-On The device has enabled function to switch ON and OFF ● Adjustable Reset Threshold Voltage for power dissipation. And there is Reset function to ● monitor output voltage for UVLO reset and power-ON Flexible Watch-dog Timing and Current Dependent Deactivation delay reset with adjustable lower reset threshold ● Output Current Limit function. The built-in watchdog function monitors ● Enable, Under-voltage Reset. microcontroller’s operation with flexible timings. And ● Over Temperature Protection other protection functions such as thermal-shutdown ● RoHS Compliant and current-limit are against immediate damage. ● Halogen-Free according to IEC 61249-2-21 APPLICATION ● Automotive Power Supply Systems ● General Power Supply applications Pin Definition: TSSOP-14EP 1.IN 2.NC 3.EN 4.NC 5.GND 6.NC 7.WDI 8.RTH 9.PI1 10.PI2 11.RO 12.WDO 13.NC 14.OUT Notes: Moisture sensitivity level: level 3. Per J-STD-020 1 Version: A2111 TQL820CA14V50 Taiwan Semiconductor TYPICAL APPLICATION CIRCUIT ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) (Note 1) PARAMETER SYMBOL LIMIT UNIT Power Supply Pin VIN 55 V EN Voltage to GND VEN -0.3 to 55 V VOUT/VRO/VWDO -0.3 to 7 V VWDI/VPI1/VPI2/VRTH -0.3 to 7 V TJ -40 to +150 °C TSTG -55 to +150 °C HBM ±2 kV CDM ±1 kV SYMBOL TYP UNIT Junction to Case Thermal Resistance RӨJC 9 °C/W Junction to Ambient Thermal Resistance RӨJA 50 °C/W OUT/RO/WDO Voltage to GND WDI/PI1/PI2/RTH Voltage to GND Junction Temperature Range Storage Temperature Range ESD Rating (Human Body Model) (Note 2) ESD Rating (Charged Device Model) THERMAL PERFORMANCE PARAMETER Notes: The thermal data is based on the PCB JESD 51-3 at natural convection on 1s0p board with 1 copper layer (1 x 70μm Cu) and with 300mm2 heatsink area on PCB 2 Version: A2111 TQL820CA14V50 Taiwan Semiconductor RECOMMENDED OPERATING CONDITIONS (Note 3) PARAMETER SYMBOL CONDITIONS UNIT VIN VOUT+Vdr to 50 V VIN,ext 3 to 50 V EN Voltage to GND VEN 0 to 50 V Output Stable Capacitor COUT ≧1 μF ESR of Output Capacitor ESR ≦100 Ω Operating Junction Temperature Range TJ -40 to +150 °C Operating Ambient Temperature Range TOPA -40 to +125 °C Power Supply Pin Extended Power Supply Pin ELECTRICAL SPECIFICATIONS (VIN = 13.5V, TJ = -40 to 150°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT VOUT 4.9 5 5.1 V VOUT 4.9 5 5.1 V dVOUT/dt -- 35 -- V/ms Ilim -- 320 -- mA ΔVOUT,lo -15 -1.5 5 mV ΔVOUT,li -20 0 20 mV Supply Voltage Output Voltage Output Voltage Start-up Slew-rate Current Limit Load Regulation Line Regulation 0.05mA < IOUT < 200mA 5.44V < VIN < 28V 0.05mA < IOUT< 100mA 5.27V < VIN < 40V VIN > 18V/ms, COUT=1μF 0.5V < VOUT < 4.5V 0V < VOUT < 4.8V IOUT = 0.05 to 200mA VIN = 6V VIN = 8 to 32V IOUT = 1mA Dropout Voltage (Vdr=VIN-VOUT) IOUT = 200mA Vdr -- 110 340 mV Dropout Voltage (Vdr=VIN-VOUT) IOUT = 100mA Vdr -- 70 170 mV PSRR -- 59 -- dB Thermal Shutdown Threshold (Note 4) Tth 151 -- 200 °C Thermal Shutdown Hysteresis (Note 4) Thy -- 30 -- °C Power Supply Ripple Rejection f = 100Hz V = 0.5Vpp Current Consumption (PI1=PI2=WDI=GND) Standby Current (IO=IIN) VEN = 0V; TJ < 105°C IO,st -- 1.3 5 μA Standby Current (IO=IIN) VEN = 0.4V; TJ < 125°C IO,st -- -- 8 μA IO -- 40 52 μA 62 77 μA Quiescent Current (IO=IIN-IOUT) Quiescent Current (IO=IIN-IOUT) IOUT=0.05mA TJ = 25°C IOUT = 0.05mA IO TJ < 125°C 3 Version: A2111 TQL820CA14V50 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (VIN = 13.5V, TJ = -40 to 150°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT VENH 2 -- -- V VENL -- -- 0.8 V VENHy 100 -- -- mV Enable High Level Input Voltage VOUT≦0.1V Low Level Input Voltage Threshold Hysteresis EN Input Current VEN = 3.3V IEN -- -- 3.5 μA EN Input Current VEN ≦18V IEN -- -- 22 μA REN 0.95 1.5 2.6 MΩ VRTH 4.6 4.7 4.8 V VRTL 4.4 4.6 4.7 V EN Pull-down Resistor Reset UVLO Reset Upper Threshold UVLO Reset Lower Threshold VOUT increasing VOUT decreasing RTH = GND UVLO Reset Threshold Hysteresis RTH = GND VRTHy 60 100 -- mV UVLO Reset Headroom (VOUT-VRTL) RTH = GND VRH 200 400 -- mV UVLO Adjustment Threshold VRTTH 1.15 1.2 1.25 V UVLO Adjustment Range VRTRG 2.5 -- 2.9 V VROL -- 0.2 0.4 V RRO,int 13 20 36 kΩ RRO,ext 5.1 -- -- kΩ 1V≦VOUT≦VRTL Reset Output Low Voltage RRO≧5.1kΩ Connected to OUT Internal Pull-up Resistor External Pull-up Resistor to OUT 1V≦VOUT≦VRTL VRO≦0.4V Reset Delay Timing Reset Delay Time PI1 to GND tRD,slow 13.2 16.5 20.2 ms Reset Delay Time PI1 to OUT tRD,fast 6.8 8.5 11.5 ms Reset Blanking Time (Note 4) VO.nom = 5V tRB -- 7 -- μs VO.nom = 5V tRR -- 10 33 μs PI1 High Signal Valid VPI1H 2.0 -- -- V PI1 Low Signal Valid VPI1L -- -- 0.8 V dVPI1/dt 1 -- -- V/μs IPI1 -- -- 3.5 μA RPI1 0.9 1.5 2.6 MΩ Internal Reset Reaction Time (Note 4) Reset Delay Input PI1 PI1 Signal Slew Rate (Note 4) VPI1L < VPI1 < VPI1H PI1 Input Current VPI1 = 3.3V PI1 Pull-down Resistor 4 Version: A2111 TQL820CA14V50 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (VIN = 13.5V, TJ = -40 to 150°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT tWDI,i 12.8 16 20.7 ms tWDI,tr1 76.8 96 124.4 ms tWDI,tr2 38.4 48 62.2 ms tWDI,tr3 25.6 32 41.5 ms tWDI,tr4 12.8 16 20.7 ms tWDO,low 6.4 8 10.4 ms Watchdog Watchdog Ignore Time PI1 to GND Watchdog Trigger Time PI2 to GND PI1 to OUT Watchdog Trigger Time PI2 to GND PI1 to GND Watchdog Trigger Time PI2 to OUT PI1 to OUT Watchdog Trigger Time PI2 to OUT Watchdog Low Time Watchdog Input Activation Current Threshold VIN > 5.44V IWD,ac -- -- 7 mA Deactivation Current Threshold VIN > 5.44V IWD,de 1 -- -- mA Current Threshold Hysteresis VIN > 5.44V IWD,Hy 0.35 -- -- mA tFI,min 100 -- -- μs tFI,max -- -- 500 μs WDI High Signal Valid VWDIH 2.0 -- -- V WDI Low Signal Valid VWDIL -- -- 0.8 V Minimum Filter Time By Current (Note 4) Maximum Filter Time By Current (Note 4) WDI High Pulse Length (Note 4) VWDI ≧ VWDIH tWDI,ph 1 -- -- μs WDI Low Pulse Length (Note 4) VWDI ≦ VWDIL tWDI,pl 1 -- -- μs dVWDI/dt 1 -- -- V/μs IWDI -- -- 3.5 μA RWDI 0.9 1.5 2.6 MΩ VWD,dis 1.15 -- 1.4 V tFWDI,min 100 -- -- μs tFWDI,max -- -- 500 μs PI2 High Signal Valid VPI2H 2.0 -- -- V PI2 Low Signal Valid VPI2L -- -- 0.8 V dVPI2/dt 1 -- -- V/μs IPI2 -- -- 3.5 μA PI2 Pull-down Resistor RPI2 0.9 1.5 2.6 MΩ PI1,2 Setup and Hold Time (Note 4) tPI,SH 150 -- -- μs WDI Signal Slew Rate VWDIL < VWDI < VWDIH (Note 4) VWDI = 3.3V WDI Input Current WDI Pull Down Resistor VIN > 5.44V WDI Disable Threshold Minimum Filter Time By WDI (Note 4) Maximum Filter Time By WDI (Note 4) Watchdog Delay Input PI2 PI2 Signal Slew Rate VPI2L < VPI2 < VPI2H PI2 Input Current VPix = 3.3V 5 Version: A2111 TQL820CA14V50 Taiwan Semiconductor ELECTRICAL SPECIFICATIONS (VIN = 13.5V, TJ = -40 to 150°C unless otherwise noted) PARAMETER CONDITIONS SYMBOL MIN TYP MAX UNIT Watchdog Output Watchdog Output Low Voltage RWDO > 5.1kΩ VWDOL -- 0.2 0.4 V Internal Pull-up Resistor Connected to output pin RWDO,int 13 20 36 kΩ External Pull-up Resistor to Output VWDO ≦ 0.4V RWDO,ext 5.1 -- -- kΩ Note: 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. 2. Devices are ESD sensitive. Handing precaution recommended. 3. The device is not guaranteed to function outside its operating conditions. 4. Guaranteed by design. ORDERING INFORMATION ORDERING CODE PACKAGE PACKING TQL820CA14V50 RLG TSSOP-14EP 2,500pcs / 13” Reel 6 Version: A2111 TQL820CA14V50 Taiwan Semiconductor BLOCK DIAGRAM PIN DESCRIPTION PIN NO. NAME FUNCTION 1 IN Power supply pin for system 2 NC Not connected 3 EN Enable system function 4 NC Not connected 5 GND 6 NC Not connected 7 WDI Watchdog monitor input 8 RTH Reset threshold adjustment 9 PI1 Program input 1 for timing adjustment 10 PI2 Program input 2 for timing adjustment 11 RO Reset output 12 WDO 13 NC 14 OUT Pad -- Ground Watchdog output Not connected Output supply voltage Connect to heatsink area and ground. 7 Version: A2111 TQL820CA14V50 Taiwan Semiconductor APPLICATION INFORMATION TQL820CA14V50 is a high-performance low dropout voltage regulator. The device operates with a wide input voltage from 3V to 50V and up to 200mA of output current. It also provides a high accuracy output voltage for ±2% in all the load and line regulation. Enable The EN pin is high voltage tolerant pin. High input enables the device ON and low is disable which can be connected to microcontroller or digital control system. It can be connected to input power pin directly. Reset The TQL820CA14V50 is monitored by Reset system including Power-ON Delayed Reset, Under-Voltage Reset, and Reset Threshold Adjustment. When reset is activated, the RO pin is low. ◼ Power-ON Delayed Reset When device starts up, the RO pin delays becoming “High” in Power-ON Delayed Time (tRD) without reset issue. The timing can be controlled by PI1 pin. ◼ PI1 connected to tRD GND 16.5ms OUT 8.5ms Under-Voltage Reset When the output supply voltage drops below UVLO Reset Lower Threshold (VRTL), the RO switches from “High” to “Low”. The RO pin is an open collector output with an internal pull-up resistor. ◼ Reset Threshold Adjustment - The UVLO Reset Lower Threshold (VRTL) is adjustable by the configuration of the RTH pin. - The threshold voltage is set as default if the RTH pin connects to GND directly. - VRTL can be also set for an expected threshold value by voltage dividers, R th1 and Rth2, with the appropriate - Rth1 is connected between OUT pin and RTH pin; meanwhile, Rth2 is connected between RTH and GND. - The new threshold voltage (VRTL) is calculated as following: resistance and souring current. VRTL, new = VRTTH x (Rth1 + Rth2) / Rth2 ● VRTL, new : Expected UVLO Reset Lower Threshold ● Rth1, Rth2 : External Divider Resistors ● VRTTH : UVLO Adjustment Threshold 8 Version: A2111 TQL820CA14V50 Taiwan Semiconductor APPLICATION INFORMATION (CONTINUE) Typical Timing Diagram Reset Vin t V O UT t