JK-nSMD025
PPTC
DEVICES
Edition:A0
Part Number:Q/JKTD-16-025
Page No: 1 OF 3
Terminal pad materials :Tin-Plated Nickle-copper
Terminal pad solderability : Meets EIA specification
RS 186-9E and ANSI/J-STD-002 Category 3.
Marking : JF=1206(025)
Table1 :DIMENTION(Unit : mm)
Model
Marking
JK-nSMD025
JF
A
B
C
D
E
Min.
Max.
Min.
Max.
Min.
Max
Min.
Min.
3.00
3.50
1.50
1.80
0.40
0.90
0.15
0.10
Table2 :PERFORMANCE RATINGS:
Model
Vmax
(Vdc)
Imax
(A)
Ihold
@25℃
(A)
JK-nSMD025
16.0
100
0.25
Itrip
@25℃
(A)
Pd
Typ
(W)
0.50
0.6
Maximum
Time To Trip
Resistance
Current
(A)
Time
(Sec)
Rimin
(Ω)
Rityp
(Ω)
R1max
(Ω)
8.0
0.08
0.35
0.70
2.700
Table3:Test Conditons and Standards
Item
Initial Resistance
IH
Ttrip
.trip
Trip endurance
Operating Temperature:-40℃ TO
Packaging:Bulk ,5000 pcs per bag
Test Conditon
25℃
25℃,0.25A,60min
25℃,8.0A
16V,100A,1hr
85℃
Standard
0.3500~2.7Ω
No Trip
≤0.08s
No arcing or burning
JK-nSMD025
PPTC
DEVICES
Part Number:Q/JKTD-16-025
Edition:A0
Page No: 2 OF 3
Solder reflow conditions
● Recommended reflow methods: IR, vapor phase
oven, hot air oven, N2 environment for lead-free.
● Devices are not designed to be wave soldered to
the bottom side of the board.
● Recommended maximum paste thickness is
0.25mm (0.010inch).
● Devices can be cleaned using standard industry
methods and solvents.
● Soldering temprature profile meets RoHs leadfree
process.
Notes: If reflow temperatures exceed the recommended profile, devices may not meet the
performance requirements
JK-nSMD025
PPTC
DEVICES
Part Number:Q/JKTD-16-025
Edition:A0
Page No: 3 OF 3
Recommended pad layout (mm)
WARNING
· Use PPTC beyond the maximum ratings or improper use may result in device damage and possible electrical arcing and
flame.
· PPTC are intended for protection against occasional over current or over temperature fault conditions and should not be
used when repeated fault conditions or prolonged trip events are anticipated.
· Device performance can be impacted negatively if devices are handled in a manner inconsistent with recommended
electronic, thermal, and mechanical procedures for electronic components.
· Use PPTC with a large inductance in circuit will generate a circuit voltage (L di/dt) above the rated voltage of the PPTC.
· Avoid impact PPTC device its thermal expansion like placed under pressure or installed in limited space.
· Contamination of the PPTC material with certain silicon based oils or some aggressive solvents can adversely impact the
performance of the devices.PPTC SMD can be cleaned by standard methods.
· Requests that customers comply with our recommended solder pad layouts and recommended reflow profile. Improper
board layouts or reflow profilecould negatively impact solderability performance of our devices.
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