SY7315RDC

SY7315 High Efficiency, 15A Synchronous Step Up Regulator with Accurate Output Current Limit General Description Features • Input Range: 4.5-30V • Programmable Pseudo-constant Frequency • Low RDS(ON) Internal Switch Main FET: 16mΩ Rectified FET: 18mΩ Disconnection FET: 18mΩ • True Shutdown Function • Programmable Output Current Limit • Internal Soft-start Limits the Inrush Current • Input Voltage UVLO • Over Temperature Protection • Over Voltage Protection • Output Short Circuit Protection • Minimum ON Time: 100ns typical • Minimum OFF Time: 120ns typical • RoHS Compliant and Halogen Free • Compact Package:QFN4×4-18 The SY7315 develops a high efficiency synchronous Boost regulator with programmable output current limit. The device adopts adaptive constant off time and current mode control. The integrated low RDS(ON) switches minimize the conduction loss. The SY7315 features cycle-by-cycle peak current limit, output short circuit protection and true shutdown. The device also provides enable control and power good indicator for system sequence control. Low output voltage ripple and small external inductor and capacitor size are achieved with programmable pseudo-constant frequency. Ordering Information SY7315 □(□□)□ Temperature Code Package Code Optional Spec Code Ordering Number SY7315RDC Package type QFN4×4-18 Applications • Power Bank • High Power AP Note ---- Typical Applications L VIN CIN RSVIN CSVIN CBS SVIN LX EN BS PG BD COMP OUT RFS CP CZ CLIM PGND ILIM SGND FS RZ VOUT CBD FB R1 RLIM COUT (opt.) R2 Figure1. Schematic Diagram SY7315 Rev. 0.9 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 1 All Rights Reserved. SY7315 15 13 12 EN 14 PG SVIN 16 SGND 17 ILIM FS 18 COMP FB Pinout (top view) 11 10 OUT 1 BS 9 OUT BD PGND PGND 2 8 BD 7 LX 6 LX 3 4 5 PGND (QFN4×4-18) Top mark: AVZxyz (Device code: AVZ, x=year code, y=week code, z= lot number code) Pin Name OUT Pin Number 1,9 BD 2,8 PGND 3,4,5 LX 6,7 BS 10 EN 11 PG 12 SVIN 13 SGND 14 ILIM 15 FS 16 COMP 17 FB 18 SY7315 Rev. 0.9 © 2019 Silergy Corp. Pin Description The Boost converter output pin. Connect to the Drain of internal Disconnect FET. Bypass at least a 4.7µF ceramic capacitor to PGND. Power ground pin. Inductor node. Connect an inductor from power input to the LX pin. Boot-strap pin. Supply Rectified FET’s gate driver. Connect a 0.1µF ceramic capacitor between the BS pin and the LX pin. Enable control. Pull high to turn on the IC. Do not leave it floating. Power good indicator. Open drain output, pull low when the output < 90% of regulation voltage, high impendence otherwise. IC power supply pin. Decouple this pin to the SGND pin with a 2.2μF ceramic capacitor. Signal ground pin. Output current limit program pin. Connect a resistor RLIM from this pin to SGND to program output current limitation threshold. ILIM(A)=30(V)/ RLIM(kΩ) Switching frequency setting pin. Connect a resistor from this pin to ground to program the switching frequency. fSW(kHz)=1.4×106/RFS(Ω)0.645. Loop compensation pin. Connect a RC network across this pin and ground to stabilize the control loop. Feedback pin. Connect to the center of resistor voltage divider to program the output voltage: VOUT=1V×(R1/R2+1) Silergy Corp. Confidential- Prepared for Customer Use Only 2 All Rights Reserved. SY7315 Block Diagram BD BS LX OUT Rectified FET Disconnect FET Main FET Charge Pump ILIM Peak Current Sense SVIN 1V PWM Control & Protection Logic FB 1V UVLO COMP EN FS PG Thermal Protection PGND SGND Figure2. Block Diagram Absolute Maximum Ratings (Note 1) SVIN, LX, EN, ILIM, OUT, BD, FS, PG, COMP Voltage --------------------------------------------------- -0.3V to 33V FB Voltage------------------------------------------------------------------------------------------------------------- -0.3V to 4V BS-LX Voltage -------------------------------------------------------------------------------------------------------- -0.3V to 4V Dynamic LX Voltage in 10ns Duration ---------------------------------------------------------------------------- -3.5V to 36V Power Dissipation, PD @ TA = 25°C QFN4×4-18------------------------------------------------------------------------3.4W Package Thermal Resistance (Note 2) θ JA ---------------------------------------------------------------------------------------------------------------30°C/W θ JC --------------------------------------------------------------------------------------------------------------3.2°C/W Junction Temperature Range --------------------------------------------------------------------------------- -40°C to 150°C Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C Storage Temperature Range ---------------------------------------------------------------------------------- -65°C to 150°C Recommended Operating Conditions (Note 3) SVIN ------------------------------------------------------------------------------------------------------------------- 4.5V to 30V Junction Temperature Range -------------------------------------------------------------------------------- - 40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------------- -40°C to 85°C SY7315 Rev. 0.9 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 3 All Rights Reserved. SY7315 Electrical Characteristics (VIN =5V, VOUT=12V, IOUT=100mA, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Input Voltage Range VIN Min 4.5 Typ Max 30 Unit V 4 4.35 V 230 5 1.015 V µA µA V Input UVLO Threshold VUVLO UVLO Hysteresis Quiescent Current Shutdown Current Feedback Reference Voltage VHYS IQ ISHDN VREF VOUT=13V EN=0 FB Input Current IFB VFB=2V Main FET RON RDS(ON),M 16 mΩ Rectified FET RON RDS(ON),R 18 mΩ Disconnect FET RON RDS(ON),D 18 mΩ EN Rising Threshold VENH EN Falling Threshold Min ON Time Min OFF Time Switching Frequency VENL tON,MIN tOFF,MIN fSW 0.2 0.985 1 -50 50 1.5 Switching Frequency Programmable Range V 200 Power Good Threshold VPG Power Good Hysteresis VPG,HYS 0.4 V ns ns kHz 1000 kHz 100 120 345 RFS=390kΩ VFB Rising (Good) nA 90 %VREF 2.5 %VREF tPG,RISING Low to high 40 µs tPG,FALLING High to low 30 µs Power Good Output Low VPGL IPG=4mA 0.15 V BD Over Voltage Threshold VOVP VFB Rising BD Over Voltage Hysteresis VOVP,HYS 0.5 V BD OVP Delay tOVP,DLY 5 µs Output Under Voltage Protection Threshold Output UVP Delay Hic-cup ON Time Hic-cup OFF Time Main N-FET Current Limit Output Current Limit Programmable Range Output Current Limit Accuracy VUVP tUVP, DLY tUVP, ON tUVP, OFF ILIM,PEAK ILIM,OUT ILMT,ACC 2 2 2 12 V us ms ms A A % Output Current Limit Reference Voltage VLIM Error Amplifier Trans-conductance Power Good Delay 31 V 15 1 -25 21 4 25 1 V gm 100 µS Current Sense Gain Ri 75 mΩ Thermal Shutdown Temperature Thermal Shutdown Hysteresis TSD THYS 150 15 ˚C ˚C SY7315 Rev. 0.9 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 4 All Rights Reserved. SY7315 Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2: θ JA is measured in the natural convection at TA = 25°C on a two-layer Silergy Evaluation Board. Note 3: The device is not guaranteed to function outside its operating conditions. SY7315 Rev. 0.9 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 5 All Rights Reserved. SY7315 QFN4×4-18 Package Outline Drawing Top View Bottom View Side View Recommended PCB layout (Reference only) Notes: All dimensions in millimeter and exclude mold flash & metal burr; The center of PCB diagram refers to chip body center. SY7315 Rev. 0.9 © 2019 Silergy Corp. Silergy Corp. Confidential- Prepared for Customer Use Only 6 All Rights Reserved. SY7315 Taping & Reel Specification 1. Taping orientation QFN4×4 3.9/4.1 11.7/12.3 1.45/1.55 Feeding direction 2. Carrier Tape & Reel specification for packages Reel Size Package types QFN4×4 Tape width (mm) Pocket pitch(mm) Reel size (Inch) Trailer length(mm) Leader length (mm) Qty per reel 12 8 13" 400 400 5000 3. Others: NA SY7315 Rev. 0.9 © 2019 Silergy Corp. Powered by TCPDF (www.tcpdf.org) Silergy Corp. Confidential- Prepared for Customer Use Only 7 All Rights Reserved.