RoHS Compliant
4GB ECC DDR4 SO-DIMM Halogen free
Product Specifications
September 17, 2020
Version 0.5
Apacer Technology Inc.
1F., No.32, Zhongcheng Rd., Tucheng Dist., New Taipei City 236, Taiwan
Tel: +886-2-2267-8000
www.apacer.com
Fax: +886-2-2267-2261
Table of Contents
General Description ....................................................................................................... 2
Ordering Information ..................................................................................................... 2
Key Parameters .............................................................................................................. 2
Specifications: ................................................................................................................ 3
Features: ......................................................................................................................... 4
Pin Assignments ............................................................................................................. 5
Pin Descriptions ............................................................................................................. 7
Functional Block Diagram ............................................................................................. 8
Absolute Maximum Ratings .......................................................................................... 9
DRAM Component Operating Temperature Range..................................................... 10
Operating Conditions ................................................................................................... 11
Environmental Requirements....................................................................................... 12
Mechanical Drawing .................................................................................................... 13
©Apacer Technology Inc.
1
General Description
Apacer D42.27180S.001 is a 512M x 72 DDR4 SDRAM (Synchronous DRAM)
SO-DIMM. This high-density memory module consists of 9 pieces 512M x 8
bits DDR4 synchronous DRAMs in FBGA packages and a 4K Bits EEPROM.
The module is a 260-pins dual in-line memory module and is intended for
mounting into a connector socket. The following provides general
specifications of this module.
Ordering Information
Part Number
Bandwidth
Speed Grade
Max Frequency
CAS Latency
D42.27180S.001
25.6 GB/sec
3200 Mbps
1600 MHz
CL22
Density
Organization
Component
Rank
4GB
512M x 72
512M x8*9
1
Key Parameters
MT/s
DDR4-2400
DDR4-2666
DDR4-2933
DDR4-3200
Grade
-CL17
-CL19
-CL21
-CL22
Unit
tCK (min)
0.83
0.75
0.68
0.62
ns
CAS latency
17
19
21
22
tCK
tRCD (min)
14.16
14.25
14.32
13.75
ns
tRP (min)
14.16
14.25
14.32
13.75
ns
tRAS (min)
32
32
32
32
ns
tRC (min)
46.16
46.25
46.32
45.75
ns
CL-tRCD-tRP
17-17-17
19-19-19
21-21-21
22-22-22
tCK
©Apacer Technology Inc.
2
Specifications:
Support ECC error detection and correction
On-DIMM thermal sensor : Yes
Organization: 512 words x 72 bits, 1 rank
Integrating 9 pieces of 4G bits DDR4 SDRAM sealed FBGA
Package: 260-pin socket type small outline dual in-line memory module (ECC
SO-DIMM)
PCB: height 30.00 mm, lead pitch 0.50 mm (pin),
Serial Presence Detect (SPD)
Power Supply: VDD=1.2V (1.14V to 1.26V)
VDDQ = 1.2V (1.14V to 1.26V)
VPP = 2.5V (2.375V to 2.75V)
VDDSPD = 2.2V to 3.6V
16 internal banks (4 Bank Groups)
CAS Latency (CL): 10, 11, 12, 13, 14, 15,16,17,18,19, 20, 21, 22,24
CAS Write Latency (CWL): 16,20
Average refresh period
7.8us at 0°C ≦ TC ≦ 85°C
3.9us at 85°C ≦ TC ≦ 95°C
Lead-free (RoHS compliant)
Halogen free
PCB: 30µ inch gold finger
©Apacer Technology Inc.
3
Features:
Functionality and operations comply with the DDR4 SDRAM datasheet
Bank Grouping is applied, and CAS to CAS latency (tCCD_L, tCCD_S) for
the banks in the same or different bank group accesses are available
Bi-Directional Differential Data Strobe
8 bit pre-fetch
Burst Length (BL) switch on-the-fly BL8 or BC4(Burst Chop)
Supports ECC error correction and detection
Per DRAM Addressability is supported
Internal Vref DQ level generation is available
Write CRC is supported at all speed grades
DBI (Data Bus Inversion) is supported(x8)
CA parity (Command/Address Parity) mode is supported
©Apacer Technology Inc.
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Pin Assignments
Pin
No.
Pin name-Front
Pin
No.
Pin name-Back
Pin
No.
Pin name-Front
1
VSS
2
VSS
133
A1
134
EVENT_n
3
DQ5
4
DQ4
135
VDD
136
VDD
5
VSS
6
VSS
137
CK0_t
138
CK1_t
7
DQ1
8
DQ0
139
CK0_c
140
CK1_c
9
VSS
10
VSS
141
VDD
142
VDD
11
DQS0_c
12
DM0_n, DBI0_n
143
PARITY
144
A0
13
DQS0_t
14
VSS
145
BA1
146
A10/AP
15
VSS
16
DQ6
147
VDD
148
VDD
17
DQ7
18
VSS
149
CS0_n
150
BA0
19
VSS
20
DQ2
151
A14/WE_n
152
A16/RAS_n
21
DQ3
22
VSS
153
VDD
154
VDD
23
VSS
24
DQ12
155
ODT0
156
A15/CAS_n
25
DQ13
26
VSS
157
CS1_n
158
A13
27
VSS
28
DQ8
159
VDD
160
VDD
29
DQ9
30
VSS
161
ODT1
162
C0, CS2_n, NC
31
VSS
32
DQS1_c
163
VDD
164
VREFCA
33
DM1_n, DBI1_n
34
DQS1_t
165
C1, CS3_n, NC
166
SA2
35
VSS
36
VSS
167
VSS
168
VSS
37
DQ15
38
DQ14
169
DQ37
170
DQ36
39
VSS
40
VSS
171
VSS
172
VSS
41
DQ10
42
DQ11
173
DQ33
174
DQ32
43
VSS
44
VSS
175
VSS
176
VSS
45
DQ21
46
DQ20
177
DQS4_c
178
DM4_n, DBI4_n
47
VSS
48
VSS
179
DQS4_t
180
VSS
49
DQ17
50
DQ16
181
VSS
182
DQ39
51
VSS
52
VSS
183
DQ38
184
VSS
53
DQS2_c
54
DM2_n, DBI2_n
185
VSS
186
DQ35
55
DQS2_t
56
VSS
187
DQ34
188
VSS
57
VSS
58
DQ22
189
VSS
190
DQ45
59
DQ23
60
VSS
191
DQ44
192
VSS
61
VSS
62
DQ18
193
VSS
194
DQ41
63
DQ19
64
VSS
195
DQ40
196
VSS
65
VSS
66
DQ28
197
VSS
198
DQS5_c
67
DQ29
68
VSS
199
DM5_n, DBI5_n
200
DQS5_t
69
VSS
70
DQ24
201
VSS
202
VSS
©Apacer Technology Inc.
5
Pin
Pin name-Back
No.
Pin
No.
Pin name-Front
Pin
No.
Pin name-Back
Pin
No.
Pin name-Front
71
DQ25
72
VSS
203
DQ46
204
DQ47
73
VSS
74
DQS3_c
205
VSS
206
VSS
75
DM3_n, DBI3_n
76
DQS3_t
207
DQ42
208
DQ43
77
VSS
78
VSS
209
VSS
210
VSS
79
DQ30
80
DQ31
211
DQ52
212
DQ53
81
VSS
82
VSS
213
VSS
214
VSS
83
DQ26
84
DQ27
215
DQ49
216
DQ48
85
VSS
86
VSS
217
VSS
218
VSS
87
CB5, NC
88
CB4, NC
219
DQS6_c
220
DM6_n, DBI6_n
89
VSS
90
VSS
221
DQS6_t
222
VSS
91
CB1, NC
92
CB0, NC
223
VSS
224
DQ54
93
VSS
94
VSS
225
DQ55
226
VSS
95
DQS8_c
96
DM8_n, DBI8_n
227
VSS
228
DQ50
97
DQS8_t
98
VSS
229
DQ51
230
VSS
99
VSS
100
CB6, NC
231
VSS
232
DQ60
101
CB2, NC
102
VSS
233
DQ61
234
VSS
103
VSS
104
CB7, NC
235
VSS
236
DQ57
105
CB3, NC
106
VSS
237
DQ56
238
VSS
107
VSS
108
RESET_n
239
VSS
240
DQS7_c
109
CKE0
110
CKE1
241
DM7_n, DBI7_n
242
DQS7_t
111
VDD
112
VDD
243
VSS
244
VSS
113
BG1
114
ACT_n
245
DQ62
246
DQ63
115
BG0
116
ALERT_n
247
VSS
248
VSS
117
VDD
118
VDD
249
DQ58
250
DQ59
119
A12
120
A11
251
VSS
252
VSS
121
A9
122
A7
253
SCL
254
SDA
123
VDD
124
VDD
255
VDDSPD
256
SA0
125
A8
126
A5
257
VPP
258
VTT
127
A6
128
A4
259
VPP
260
SA1
129
VDD
130
VDD
–
–
–
–
131
A3
132
A2
–
–
–
–
*IC Component Composition :
©Apacer Technology Inc.
256Mx8
512Mx8
1024Mx8
2048Mx8
A0~A13
A0~A14,
A0~A15,
A0~A16,
512Mx4
1024Mx4
2048Mx4
6
A0~A14
A0~A15
A0~A16
Pin
Pin name-Back
No.
Pin Descriptions
Pin Name
Ax
1*
SDRAM address bus
BAx
SDRAM bank select
BGx
SDRAM bank group select
RAS_n
CAS_n
WE_n
Description
2*
3*
4*
SDRAM row address strobe
SDRAM column address strobe
SDRAM write enable
CSx_n
DIMM Rank Select Lines
CKEx
SDRAM clock enable lines
ODTx
SDRAM on-die termination control lines
ACT_n
SDRAM input for activate input
DQx
DIMM memory data bus
CBx
DIMM ECC check bits
TDQSx_t ; TDQSx_c
Dummy loads for mixed populations of x4 based and x8 based RDIMMs.
Not used on UDIMMs
DQSx_t
Data Buffer data strobes (positive line of differential pair)
DQSx_c
Data Buffer data strobes (negative line of differential pair)
DMx_n,
DBIx_n
SDRAM data masks/data bus inversion(x8-based x72 DIMMs)
CKx_t
SDRAM clock input (positive line of differential pair)
CKx_c
SDRAM clocks input (negative line of differential pair)
2
SCL
I C serial bus clock for SPD-TSE and register
SDA
I C serial bus data line for SPD-TSE and register
SAx
I C slave address select for SPD-TSE and register
PARITY
2
2
SDRAM parity input
VDD
SDRAM core power supply
12 V
Optional Power Supply on socket but not used on DIMM
VREFCA
VSS
SDRAM command/address reference supply
Power supply return (ground)
VDDSPD
Serial SPD-TSE positive power supply
ALERT_n
SDRAM ALERT_n output
VPP
SDRAM Supply
RESET_n
Set Register and SDRAMs to a Known State
EVENT_n
SPD signals a thermal event has occurred
VTT
SDRAM I/O termination supply
RFU
Reserved for future use
*Notes:
1. Address A17 is only valid for 16 Gb x4 based SDRAMs. For UDIMMs this connection pin is NC.
2. RAS_n is a multiplexed function with A16.
3. CAS_n is a multiplexed function with A15.
4. WE_n is a multiplexed function with A14.
©Apacer Technology Inc.
7
Functional Block Diagram
©Apacer Technology Inc.
8
Absolute Maximum Ratings
Parameter
Symbol
Description
Units
Notes
Voltage on VDD pin relative to Vss
VDD
- 0.3 V ~ 1.5 V
V
1,2
Voltage on VDDQ pin relative to Vss
VDDQ
- 0.3 V ~ 1.5 V
V
1,2
Voltage on VPP pin relative to Vss
VPP
- 0.3 V ~ 3.0 V
V
3
Voltage on any pin relative to Vss
VIN, VOUT
- 0.3 V ~ 1.5 V
V
1,2
Notes:
1.
Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2.
VDD and VDDQ must be within 300 mV of each other at all times; and VREFCA must be not greater than 0.6 x
VDDQ, When VDD and VDDQ are less than 500 mV; VREF may be equal to or less than 300 mV
3.
VPP must be equal or greater than VDD/VDDQ at all times
©Apacer Technology Inc.
9
DRAM Component Operating Temperature
Range
Symbol
Parameter
Rating
Units
Notes
Normal Operating Temperature Range
0 to 85
℃
1,2
Extended Temperature Range
85 to 95
℃
1,3
TOPER
Notes:
1.
Operating Temperature TOPER is the case surface temperature on the center / top side of the DRAM.
2.
The Normal Temperature Range specifies the temperatures where all DRAM specifications will be supported.
During operation, the DRAM case temperature must be maintained between 0℃ - 85℃ under all operating
conditions.
3.
Some applications require operation of the DRAM in the Extended Temperature Range between 85℃ and 95℃
case temperature. Full specifications are guaranteed in this range, but the following additional conditions apply:
Refresh commands must be doubled in frequency, therefore reducing the Refresh interval tREFI to 3.9 µs.
©Apacer Technology Inc.
10
Operating Conditions
Recommended DC Operating Conditions – DDR4 (1.2V) operation
Rating
Symbol
VDD
Parameter
Supply Voltage
VDDQ Supply Voltage for Output
VPP
Activation Supply Voltage
Units
Notes
1.26
V
1,2,3
1.2
1.26
V
1,2,3
2.5
2.75
V
3
Min.
Typ.
Max.
1.14
1.2
1.14
2.375
Notes:
1.
Under all conditions VDDQ must be less than or equal to VDD..
2.
VDDQ tracks with VDD. AC parameters are measured with VDD and VDDQ tied together.
3.
DC bandwidth is limited to 20MHz.
©Apacer Technology Inc.
11
Environmental Requirements
Symbol
Parameter
Rating
Units
Notes
HOPR
Operating Humidity (relative)
10 to 90
%
TSTG
Storage Temperature
-50 to +100
°C
1
HSTG
Storage Humidity (without condensation)
5 to 95
%
1
PBAR
Barometric Pressure (operating & storage)
105 to 69
kPa
1,2
Notes:
1.
Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only. and
device functional operation at or above the conditions indicated is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2.
Up to 9850 ft.
©Apacer Technology Inc.
12
Mechanical Drawing
Unit: mm
30µ inch gold finger
(All dimensions are in millimeters with ±0.15mm tolerance unless specified otherwise.)
©Apacer Technology Inc.
13
Revision History
Revision Date
Description
Remark
0.1
5/5/2014
Initial release
0.2
11/2/2015 Updated VDDSPD
0.3
03/15/2017 Add Environmental Requirements
0.4
09/04/2017 Remove TOPR (Operating Temperature (ambient))
0.5
07/23/2020 Updated DRAM Component Operating Temperature Range
©Apacer Technology Inc.
14
Global Presence
Taiwan (Headquarters)
Apacer Technology Inc.
1F., No.32, Zhongcheng Rd., Tucheng Dist.,
New Taipei City 236, Taiwan R.O.C.
Tel: +886-2-2267-8000
Fax: +886-2-2267-2261
amtsales@apacer.com
U.S.A.
Apacer Memory America, Inc.
46732 Lakeview Blvd., Fremont, CA 94538
Tel: 1-408-518-8699
Fax: 1-510-249-9568
sa@apacerus.com
Japan
Apacer Technology Corp.
5F, Matsura Bldg., Shiba, Minato-Ku
Tokyo, 105-0014, Japan
Tel: 81-3-5419-2668
Fax: 81-3-5419-0018
jpservices@apacer.com
Europe
Apacer Technology B.V.
Science Park Eindhoven 5051 5692 EB Son,
The Netherlands
Tel: 31-40-267-0000
Fax: 31-40-290-0686
sales@apacer.nl
China
Apacer Electronic (Shanghai) Co., Ltd.
Room D, 22/FL, No.2, Lane 600, JieyunPlaza,
Tianshan RD , Shanghai , 200051, China
Tel: 86-21-6228-9939
Fax:86-21-6228-9936
sales@apacer.com.cn
India
Apacer Technologies Pvt Ltd.
1874, South End C Cross,9th Block Jayanagar,
Bangalore-560069,INDIA.
Tel: 91-80-4152-9061/62
Fax: 91-80-4170-0215
sales_india@apacer.com
©Apacer Technology Inc.
15