AP-MSD16GIA-5RDM

RoHS Recast Compliant Industrial microSD 3.0 microSDHC H1-M Product Specifications (WD 1Znm) May 31, 2022 Version 1.0 Apacer Technology Inc. 1F, No.32, Zhongcheng Rd., Tucheng Dist., New Taipei City, Taiwan, R.O.C Tel: +886-2-2267-8000 www.apacer.com Fax: +886-2-2267-2261 Specifications Overview:  Fully Compatible with SD Card Association Specifications – Part 1, Physical Layer Specification, Ver 3.01 Final – Part 2, File System Specifications, Ver 3.00 –  Capacity –  Part 3, Security Specifications, Ver 3.00 Final  – Wide: -40°C to 85°C – Operating Voltage: 2.7V ~ 3.6V  Power Consumption1 – Operating: 120 mA – Standby: 220 µA Performance1 Sequential read: Up to 80 MB/sec – Sequential write: Up to 65 MB/sec – Random read (4K): Up to 1,600 IOPS – Random write (4K): Up to 70 IOPS Storage: -40°C to 85°C  8, 16 GB – Operating: Standard: -25°C to 85°C   Temperature Range Flash Management Bus Speed Mode: Support Class 10 with UHS-I2 – DS: Default Speed up to 25MHz 3.3V signaling – HS: High Speed up to 50MHz 3.3V signaling – SDR12: SDR up to 25MHz 1.8V signaling – SDR25: SDR up to 50MHz 1.8V signaling – SDR50: SDR up to 100MHz 1.8V signaling – Built-in advanced ECC algorithm – SDR104: SDR up to 208MHz 1.8V signaling – Global Wear Leveling – DDR50: DDR up to 50MHz 1.8V signaling – Flash bad-block management – S.M.A.R.T. – Power Failure Management – SMART Read RefreshTM  NAND Flash Type: MLC  SD-Protocol Compatible  Supports SD SPI Mode  Backward Compatible with 2.0  Endurance (in Terabytes Written: TBW) 8 GB: 4.13 TBW – 16 GB: 8.27 TBW Physical Dimensions –  –  15mm (L) x 11mm (W) x 1mm (H) RoHS Recast Compliant Notes: 1. Performance values presented here are typical and measured based on USB 3.0 card reader. The results may vary depending on settings and platforms. 2. Timing in 1.8V signaling is different from that of 3.3V signaling. Operation mode selection command is complaint with SD 3.0, referring to SDA’s Part 1, Physical Layer Specification, Ver 3.01 (Section 3.9) 1 © 2022 Apacer Technology Inc. Table of Contents 1. General Description ..........................................................................3 1.1 Functional Block .......................................................................................................................... 3 1.2 Flash Management ...................................................................................................................... 4 1.2.1 Bad Block Management .......................................................................................................... 4 1.2.2 Powerful ECC Algorithms ....................................................................................................... 4 1.2.3 Global Wear Leveling ............................................................................................................. 4 1.2.4 S.M.A.R.T. .............................................................................................................................. 4 1.2.5 Power Failure Management.................................................................................................... 4 1.2.6 SMART Read RefreshTM ......................................................................................................... 4 2. Product Specifications ......................................................................5 2.1 Card Architecture ........................................................................................................................ 5 2.2 Pin Assignment ........................................................................................................................... 5 2.3 Capacity ........................................................................................................................................ 6 2.4 Performance ................................................................................................................................. 6 2.5 Electrical ....................................................................................................................................... 6 2.6 Endurance .................................................................................................................................... 7 3. Physical Characteristics ...................................................................8 3.1 Physical Dimensions ................................................................................................................... 8 3.2 Durability Specifications........................................................................................................... 10 4. AC Characteristics ..........................................................................11 4.1 microSD Interface Timing (Default) ......................................................................................... 11 4.2 microSD Interface Timing (High-Speed Mode) ....................................................................... 12 4.3 microSD Interface Timing (SDR12, SDR25, SDR50 and SDR104 Modes) ............................ 13 4.3.1 Input ...................................................................................................................................... 13 4.3.2 Output ................................................................................................................................... 14 4.4 microSD Interface Timing (DDR50 Mode) ............................................................................... 15 5. S.M.A.R.T. ........................................................................................17 5.1 Direct Host Access to SMART Data via SD General Command (CMD56) ............................ 17 5.2 Process for Retrieving SMART Data ....................................................................................... 17 6. Product Ordering Information .........................................................20 6.1 Product Code Designations ..................................................................................................... 20 6.2 Valid Combinations ................................................................................................................... 21 2 © 2022 Apacer Technology Inc. 1. General Description The micro Secure Digital (microSD) card version 3.0 is fully compliant to the specification released by SD Card Association. The Command List supports [Part 1 Physical Layer Specification Ver3.01 Final] definitions. Card Capacity of Non-secure Area, Secure Area Supports [Part 3 Security Specification Ver3.00 Final] Specifications. The microSD 3.0 card comes with 8-pin interface, designed to operate at optimal performance. It can alternate communication protocol between the SD mode and SPI mode. It performs data error detection and correction with very low power consumption. Apacer Industrial micro Secure Digital 3.0 card is ideal for its high performance, good reliability and wide compatibility. Not to mention that it’s well adapted for hand-held applications in semiindustrial/medical markets already. The new microSD 3.0 card is capable of delivering better performance and P/E cycles. 1.1 Functional Block The microSD contains a card controller and a memory core for the SD standard interface. Figure 1-1 Functional Block Diagram 3 © 2022 Apacer Technology Inc. 1.2 Flash Management 1.2.1 Bad Block Management Bad blocks are blocks that include one or more invalid bits, and their reliability is not guaranteed. Blocks that are identified and marked as bad by the manufacturer are referred to as “Initial Bad Blocks”. Bad blocks that are developed during the lifespan of the flash are named “Later Bad Blocks”. Apacer implements an efficient bad block management algorithm to detect the factory-produced bad blocks and manages any bad blocks that appear with use. This practice further prevents data being stored into bad blocks and improves the data reliability. 1.2.2 Powerful ECC Algorithms Flash memory cells will deteriorate with use, which might generate random bit errors in the stored data. Thus, the microSD card applies the BCH ECC Algorithm, which can detect and correct errors occur during read process, ensure data been read correctly, as well as protect data from corruption. 1.2.3 Global Wear Leveling NAND Flash devices can only undergo a limited number of program/erase cycles, and in most cases, the flash media are not used evenly. If some area get updated more frequently than others, the lifetime of the device would be reduced significantly. Thus, Global Wear Leveling technique is applied to extend the lifespan of NAND Flash by evenly distributing writes and erase cycles across the media. Apacer provides Global Wear Leveling algorithm, which can efficiently spread out the flash usage through the whole flash media area. Moreover, by implementing Global Wear Leveling algorithm, the life expectancy of the NAND Flash is greatly improved. 1.2.4 S.M.A.R.T. SMART, an acronym for Self-Monitoring, Analysis and Reporting Technology, is a special function that allows a memory device to automatically monitor its health. Apacer provides a program named SmartInfo Tool to observe Apacer’s SD and microSD cards. Note that this tool can only support Apacer’s industrial SD and microSD cards. This tool will display firmware version, endurance life ratio, good block ratio, and so forth. 1.2.5 Power Failure Management Apacer industrial SD and microSD cards provide complete data protection mechanism during every abnormal power shutdown situation, such as power failure at programming data, updating system tables, erasing blocks, etc. Apacer Power-Loss Protection mechanism includes:  Maintaining data correctness and increasing the reliability of the data stored in the NAND Flash memory.  Protecting F/W table and the data written to flash from data loss in the event of power off. 1.2.6 SMART Read RefreshTM Apacer’s SMART Read Refresh plays a proactive role in avoiding read disturb errors from occurring to ensure health status of all blocks of NAND flash. Developed for read-intensive applications in particular, SMART Read Refresh is employed to make sure that during read operations, when the read operation threshold is reached, the data is refreshed by re-writing it to a different block for subsequent use. 4 © 2022 Apacer Technology Inc. 2. Product Specifications 2.1 Card Architecture Figure 2-1 Card Architecture 2.2 Pin Assignment Table 2-1 Pin Descriptions SD Mode SPI Mode Pin Name Description Name Description 1 DAT2 Data line[bit 2] Reserved 2 CD/DAT3 Card Detect/Data line [bit 3] CS Chip select 3 CMD Command/Response DI Data in 4 VDD Supply voltage VDD Supply voltage 5 CLK Clock SCLK Clock 6 VSS Supply voltage ground VSS Supply voltage ground 7 DAT0 Data line[bit 0] DO Data out 8 DAT1 Data line[bit 1] Reserved 5 © 2022 Apacer Technology Inc. 2.3 Capacity The following table shows the specific capacity for the SD 3.0 card. Table 2-2 Capacity Specifications Capacity Total bytes 8 GB 7,960,788,992 16 GB 16,013,852,672 Note: Total bytes are viewed under Windows operating system and were measured by SD format too. 2.4 Performance Performances of the SD 3.0 card are shown in the table below. Table 2-3 Performance Specifications Capacity 8 GB 16 GB Sequential Read (MB/s) 80 80 Sequential Write (MB/s) 32 65 Random Read IOPS (4K) 1,500 1,600 Random Write IOPS (4K) 44 70 Performance Notes:  Results may differ from various flash configurations or host system setting.  Sequential read/write is based on CrystalDiskMark 8.0.4 with file size 1,000MB.  Random read/write is measured using IOMeter with Queue Depth 32. 2.5 Electrical Table 2-4 Operating Voltages Symbol Parameter Min. Max. Unit VDD Power Supply Voltage 2.7 3.6 V Table 2-5 Power Consumption Capacity 8 GB 16 GB Operating (mA) 85 120 Standby (µA) 190 220 Mode Notes:  All values are typical and may vary depending on flash configurations or host system settings.  Active power is an average power measurement performed using CrystalDiskMark with 128KB sequential read/write transfers.  Power is measured based on USB 3.0 card reader. 6 © 2022 Apacer Technology Inc. 2.6 Endurance The endurance of a storage device is predicted by TeraBytes Written based on several factors related to usage, such as the amount of data written into the drive, block management conditions, and daily workload for the drive. Thus, key factors, such as Write Amplifications and the number of P/E cycles, can influence the lifespan of the drive. Table 2-6 Endurance Specifications Capacity TeraBytes Written 8 GB 4.13 16 GB 8.27 Notes:  This estimation complies with Apacer internal workload.  Flash vendor guaranteed MLC P/E cycle: 3K  WAF may vary from capacity, flash configurations and writing behavior on each platform.  1 Terabyte = 1024 GB 7 © 2022 Apacer Technology Inc. 3. Physical Characteristics 3.1 Physical Dimensions 8 © 2022 Apacer Technology Inc. 9 © 2022 Apacer Technology Inc. 3.2 Durability Specifications Table 3-1 Durability Specifications Item Temperature Specifications -25°C to 85°C (Standard) -40°C to 85°C (Wide) -40°C to 85°C (Storage) Shock 1,500G, 0.5ms Vibration 20Hz~80Hz/1.52mm (frequency/displacement) 80Hz~2000Hz/20G (frequency/displacement) X, Y, Z axis/60mins each Drop 150cm free fall, 6 face of each Bending ≧10N, hold 1min/5times Torque 0.1N-m or 2.5deg, hold 5min/5times Salt Spray Concentration: 3% NaCl at 35°C (storage for 24 hours) Waterproof JIS IPX7 compliance Water temperature 25°C Water depth: the lowest point of unit is locating 1000mm below surface (storage for 30 mins) X-Ray Exposure 0.1 Gy of medium-energy radiation (70 KeV to 140 KeV, cumulative dose per year) to both sides of the card (storage for 30 mins) Durability 10,000 times mating cycle ESD Pass 10 © 2022 Apacer Technology Inc. 4. AC Characteristics 4.1 microSD Interface Timing (Default) Symbol Parameter Min Max Unit Remark Clock CLK (All values are referred to min(VIH) and max(VIL)) fPP Clock frequency Data Transfer Mode 0 25 MHz fOD Clock frequency Identification Mode 0*/100 400 kHz tWL Clock low time 10 ns tWH Clock high time 10 ns tTLH Clock rise time 10 ns tTHL Clock fall time 10 ns Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Inputs CMD, DAT (referenced to CLK) tISU Input setup time 5 ns tIH Input hold time 5 ns Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Outputs CMD, DAT (referenced to CLK) tODLY Output Delay time during Data Transfer Mode 0 14 ns tODLY Output Delay time during Identification Mode 0 50 ns CL ≤ 40 pF (1 card) CL ≤ 40 pF (1 card) *0Hz means to stop the clock. The given minimum frequency range is for cases that require the clock to be continued. 11 © 2022 Apacer Technology Inc. 4.2 microSD Interface Timing (High-Speed Mode) Symbol Parameter Min Max Unit Remark Clock CLK (All values are referred to min(VIH) and max(VIL)) fPP Clock frequency Data Transfer Mode 0 50 MHz tWL Clock low time 7 ns tWH Clock high time 7 ns tTLH Clock rise time 3 ns tTHL Clock fall time 3 ns Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Inputs CMD, DAT (referenced to CLK) tISU Input setup time 6 ns tIH Input hold time 2 ns Ccard ≤ 10 pF (1 card) Ccard≤ 10 pF (1 card) Outputs CMD, DAT (referenced to CLK) tODLY Output Delay time during Data Transfer Mode TOH Output Hold Time CL Total System capacitance of each line* 14 2.5 ns ns 40 pF CL ≤ 40 pF (1 card) CL ≤ 15 pF (1 card) CL ≤ 15 pF (1 card) *In order to satisfy severe timing, host shall run on only one card 12 © 2022 Apacer Technology Inc. 4.3 microSD Interface Timing (SDR12, SDR25, SDR50 and SDR104 Modes) 4.3.1 Input Clock Signal Timing Symbol Min Max Unit Remark tCLK 4.80 - ns 208MHz (Max.), Between rising edge, VCT = 0.975V tCR, tCF < 0.96ns (max.) at 208MHz, CCARD=10pF tCR, tCF - 0.2 tCLK ns Clock Duty 30 70 % tCR, tCF < 2.00ns (max.) at 100MHz, CCARD=10pF The absolute maximum value of tCR, tCF is 10ns regardless of clock frequency. SDR50 and SDR104 Input Timing Card Input Timing Symbol Min Max Unit SDR104 Mode tIS 1.40 - ns CCARD = 10pF, VCT = 0.975V tIH 0.8 - ns CCARD = 5pF, VCT = 0.975V Symbol Min Max Unit SDR50 Mode tIS 3.00 - ns CCARD = 10pF, VCT = 0.975V tIH 0.8 - ns CCARD = 5pF, VCT = 0.975V 13 © 2022 Apacer Technology Inc. 4.3.2 Output Output Timing of Fixed Data Window Symbol Min Max Unit Remark tODLY - 7.5 ns tCLK ≥10.0ns, CL=30pF, using driver Type B, for SDR50. tODLY - 14 ns tCLK ≥20.0ns, CL=40pF, using driver Type B, for SDR25 and SDR12 TOH 1.5 - ns Hold time at the tODLY (min.). CL=15pF Output (SDR104 mode) Symbol Min Max Unit tOP 0 2 UI Card Output Phase ps Delay variable due to temperature change after tuning UI tODW = 2.88ns at 208MHz △tOP -350 tODW 0.60 +1550 - Remark 14 © 2022 Apacer Technology Inc. 4.4 microSD Interface Timing (DDR50 Mode) Clock Signal Timing Symbol Min Max Unit Remark tCLK 20 - ns 50MHz (Max.), Between rising edge tCR, tCF - 0.2 tCLK ns tCR, tCF < 4.00ns (max.) at 50MHz, CCARD=10pF Clock Duty 45 55 % Timing Diagram DAT Inputs/Outputs Referenced to CLK in DDR50 Mode 15 © 2022 Apacer Technology Inc. Bus Timings – Parameters Values (DDR50 Mode) Symbol Parameter Min Max Unit Remark Input CMD (referenced to CLK rising edge) tISU Input setup time 6 - ns tIH Input hold time 0.8 - ns Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Output CMD (referenced to CLK rising edge) tODLY Output Delay time during Data Transfer Mode - 13.7 ns TOH Output Hold time 1.5 - ns CL ≤ 30 pF (1 card) CL ≥ 15 pF (1 card) Inputs DAT (referenced to CLK rising and falling edges) tISU2x Input setup time 3 - ns tIH2x Input hold time 0.8 - ns Ccard ≤ 10 pF (1 card) Ccard ≤ 10 pF (1 card) Outputs DAT (referenced to CLK rising and falling edges) tODLY2x Output Delay time during Data Transfer Mode - 7.0 ns TOH2x Output Hold time 1.5 - ns CL ≤ 25 pF (1 card) CL ≥ 15 pF (1 card) 16 © 2022 Apacer Technology Inc. 5. S.M.A.R.T. 5.1 Direct Host Access to SMART Data via SD General Command (CMD56) CMD 56 is structured as a 32-bit argument. The implementation of the general purpose functions will arrange the CMD56 argument into the following format:  Bit [0]: Indicates Read Mode when bit is set to [1] or Write Mode when bit is cleared [0]. Depending on the function, either Read Mode or Write Mode can be used.  Bit [7:1]: Indicates the index of the function to be executed:  Read Mode: Index = 0x10 Get SMART Command Information  Write Mode: Index = 0x08 Pre-Load SMART Command Information  Bit [15:8]: Function argument #1 (1-byte)  Bit [23:16]: Function argument #2 (1-byte)  Bit [31:24]: Function argument #3 (1-byte) 5.2 Process for Retrieving SMART Data Retrieving SMART data requires the following two commands executed in sequence and in accordance with the SD Association standard flowchart for CMD56 (see below). Step 1: Write Mode – [0x08] Pre-Load SMART Command Information Sequence Pre-Load SMART Command Information Command CMD56 Argument Expected Data “0” (Write Mode) “0001 000” (Index = 0x08) [8:511] All ‘0’ (Reserved) No expected data [0] [1:7] 17 © 2022 Apacer Technology Inc. Step 2: Read Mode – [0x10] Get SMART Command Information Sequence Get SMART Command Information Command CMD56 Argument Expected Data 1 sector (512 bytes) of response data byte[0-8] Flash ID byte[9-10] IC Version byte[11-12] FW Version byte[13] Reserved byte[14] CE Number byte[15] Reserved byte[16-17] Bad Block Replace Maximum byte[18] Reserved byte[32-63] Bad Block count per Die byte[64-65] Good Block Rate(%) byte[66-79] Reserved byte[80-83] Total Erase Count [0] “1” (Read Mode) byte[84-95] Reserved [1:7] “0010 000” byte[96-97] Endurance (Remain Life) (%) (Index = 0x10) byte[98-99] Average Erase Count – L* [8:31] All ‘0’ (Reserved) byte[100-101] Minimum Erase Count – L* byte[102-103] Maximum Erase Count – L* byte[104-105] Average Erase Count – H* byte[106-107] Minimum Erase Count – H* byte[108-109] Maximum Erase Count – H* byte[110-111] Reserved byte[112-115] Power Up Count byte[116-127] Reserved byte[128-129] Abnormal Power Off Count byte[130-159] Reserved byte[160-161] Total Refresh Count byte[176-183] Product “Marker” byte[184-215] Bad Block count per Die byte[216-511] Reserved *Please refer to technical note for High/Low byte definition. 18 © 2022 Apacer Technology Inc. 19 © 2022 Apacer Technology Inc. 6. Product Ordering Information 6.1 Product Code Designations AP – MSD xxG X A – 5R DM Flash Type Firmware Version Controller Solution Temperature C: Standard Temperature I: Wide Temperature Capacity 08G: 8GB 16G: 16GB Model Name Apacer Product Code 20 © 2022 Apacer Technology Inc. 6.2 Valid Combinations The following table lists the available models of the microSD 3.0 series which are in mass production or will be in mass production. Consult your Apacer sales representative to confirm availability of valid combinations and to determine availability of new combinations. Capacity Standard Temperature Wide Temperature 8GB AP-MSD08GCA-5RDM AP-MSD08GIA-5RDM 16GB AP-MSD16GCA-5RDM AP-MSD16GIA-5RDM 21 © 2022 Apacer Technology Inc. Revision History Revision Description Date 1.0 Initial release 5/31/2022 22 © 2022 Apacer Technology Inc. Global Presence Taiwan (Headquarters) U.S.A. Apacer Technology Inc. 1F., No.32, Zhongcheng Rd., Tucheng Dist., New Taipei City 236, Taiwan R.O.C. Tel: 886-2-2267-8000 Fax: 886-2-2267-2261 amtsales@apacer.com Apacer Memory America, Inc. 46732 Lakeview Blvd., Fremont, CA 94538 Tel: 1-408-518-8699 Fax: 1-510-249-9551 sa@apacerus.com Japan Europe Apacer Technology Corp. 6F, Daiyontamachi Bldg., 2-17-12, Shibaura, Minato-Ku, Tokyo, 108-0023, Japan Tel: 81-3-5419-2668 Fax: 81-3-5419-0018 jpservices@apacer.com Apacer Technology B.V. Science Park Eindhoven 5051 5692 EB Son, The Netherlands Tel: 31-40-267-0000 Fax: 31-40-290-0686 sales@apacer.nl China India Apacer Electronic (Shanghai) Co., Ltd Room D, 22/FL, No.2, Lane 600, JieyunPlaza, Tianshan RD, Shanghai, 200051, China Tel: 86-21-6228-9939 Fax: 86-21-6228-9936 sales@apacer.com.cn Apacer Technologies Pvt Ltd, 1874, South End C Cross, 9th Block Jayanagar, Bangalore-560069, India Tel: 91-80-4152-9061/62 Fax: 91-80-4170-0215 sales_india@apacer.com 23 © 2022 Apacer Technology Inc.