75.A83CV.G020C

RoHS Compliant 2GB ECC DDR3 SO-DIMM Industrial Product Specifications April 16, 2018 Version 1.4 Apacer Technology Inc. 1F., No.32, Zhongcheng Rd., Tucheng Dist., New Taipei City 236, Taiwan Tel: +886-2-2267-8000 www.apacer.com Fax: +886-2-2267-2261 Table of Contents General Description ....................................................................................................... 2  Ordering Information ..................................................................................................... 2  Key Parameters .............................................................................................................. 2  Specifications: ................................................................................................................ 3  Features: ......................................................................................................................... 4  Pin Assignments ............................................................................................................. 5  Pin Descriptions ............................................................................................................. 7  Functional Block Diagram ............................................................................................. 8  Absolute Maximum Ratings .......................................................................................... 9  DRAM Component Operating Temperature Range..................................................... 10  Operating Conditions ................................................................................................... 11  Environmental Requirements....................................................................................... 12  Mechanical Drawing .................................................................................................... 13  ©Apacer Technology Inc. 1 General Description Apacer 75.A83CV.G020C is a 256M x 72 DDR3 SDRAM (Synchronous DRAM) ECC SO-DIMM. This high-density memory module consists of 9 pieces 256M x 8 bits with 8 banks DDR3 synchronous DRAMs in BGA packages and a 2K EEPROM. The module is a 204-pins small-outlined, dual in-line memory module and is intended for mounting into a connector socket. Decoupling capacitors are mounted on the printed circuit board for each DDR3 SDRAM. The following provides general specifications of this module. Ordering Information Part Number Bandwidth Speed Grade Max Frequency CAS Latency 75.A83CV.G020C 10.6 GB/sec 1333 Mbps 666 MHz CL9 Density Organization Component Rank 2GB 256M x 72 256M x8*9 1 Key Parameters MT/s DDR3-1066 DDR3-1333 DDR3-1600 Unit Grade -CL7 -CL9 -CL11 tCK (min) 1.875 1.5 1.25 ns CAS latency 7 9 11 tCK tRCD (min) 13.125 13.5 13.75 ns tRP (min) 13.125 13.5 13.75 ns tRAS (min) 37.5 36 35 ns tRC (min) 50.625 49.5 48.75 ns CL-tRCD-tRP 7-7-7 9-9-9 11-11-11 tCK ©Apacer Technology Inc. 2 Specifications:  Support ECC error detection and correction  On-DIMM thermal sensor : Yes  Organization: 256 words x 72 bits, 1 rank  Integrating 9 pieces of 2G bits DDR3 SDRAM sealed FBGA  Package: 204-pin socket type small outline dual in-line memory module (ECC SO-DIMM)  PCB: height 30.0 mm, lead pitch 0.6 mm (pin), lead-free (RoHS compliant)  Power supply VDD: 1.5V ± 0.075V  Serial Presence Detect (SPD)  Eight Internal banks for concurrent operation (Components)  Interface: SSTL_15  Burst lengths (BL): 8 and 4 with Burst Chop (BC)  /CAS Latency (CL): 6, 7, 8, 9  /CAS Write Latency (CWL): 5, 6, 7  Supports auto pre-charge option for each burst access  Supports auto-refresh/self-refresh  Support Industrial Temp ( -40°C~95°C ) - tREFI 7.8us at -40 °C ≤ TCASE ≤ 85°C - tREFI 3.9us at 85 °C < TCASE ≤ 95°C  PCB: 30µ inch gold finger ©Apacer Technology Inc. 3 Features:  Double-date-rate architecture: 2 data transfers per clock cycle  The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture  Bi-directional differential data strobe (DQS and /DQS) is transmitted / received with data for capturing data at the receiver  DQS is edge-aligned with data for READs; center aligned with data for WRITEs  Differential clock inputs (CK and /CK)  DLL aligns DQ and DQS transitions with CK transitions  Data mask (DM) for writing data  Posted /CAS by programmable additive latency for enhanced command and data bus efficiency  On-Die-Termination (ODT) for improved signal quality: Synchronous ODT/Dynamic ODT/Asynchronous ODT  Multi-Purpose Register (MPR) for temperature read out  ZQ calibration for DQ drive and ODT  Programmable Partial Array Self-Refresh (PASR)  /Reset pin for power-up sequence and reset function  SRT range: normal/extended, auto/manual self-refresh  Programmable output driver impedance control  Commands entered at each positive clock input, while data and data mask are referenced to both edges of DQS ©Apacer Technology Inc. 4 Pin Assignments Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name 1 VREFDQ 53 VSS 105 A1 157 DM5 3 VSS 55 DQ24 107 A0 159 DQ42 5 DQ0 57 DQ25 109 VDD 161 DQ43 7 DQ1 59 DM3 111 CK0 163 VSS 9 VSS 61 VSS 113 /CK0 165 DQ48 11 DM0 63 DQ26 115 VDD 167 DQ49 13 DQ2 65 DQ27 117 A10(/AP) 169 VSS 15 DQ3 67 VSS 119 BA0 171 /DQS6 17 VSS 69 CB0 121 /WE 173 DQS6 19 DQ8 71 CB1 123 VDD 175 VSS 21 DQ9 73 VSS 125 /CAS 177 DQ50 23 VSS 75 /DQS8 127 /CS0 179 DQ51 25 /DQS1 77 DQS8 129 /CS1 181 VSS 27 DQS1 79 VSS 131 VDD 183 DQ56 29 VSS 81 CB2 133 DQ32 185 DQ57 31 DQ10 83 CB3 135 DQ33 187 VSS 33 DQ11 85 VDD 137 VSS 189 DM7 35 VSS 87 CKE0 139 /DQS4 191 DQ58 37 DQ16 89 CKE1 141 DQS4 193 DQ59 39 DQ17 91 BA2 143 VSS 195 VSS 41 VSS 93 VDD 145 DQ34 197 SA0 43 /DQS2 95 A12(/BC) 147 DQ35 199 VDDSPD 45 DQS2 97 A8 149 VSS 201 SA1 47 VSS 99 A5 151 DQ40 203 VTT 49 DQ18 101 VDD 153 DQ41 51 DQ19 103 A3 155 VSS ©Apacer Technology Inc. 5 Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name 2 VSS 54 DQ28 106 A2 158 VSS 4 DQ4 56 DQ29 108 BA1 160 DQ46 6 DQ5 58 VSS 110 VDD 162 DQ47 8 VSS 60 /DQS3 112 CK1 164 VSS 10 /DQS0 62 DQS3 114 /CK1 166 DQ52 12 DQS0 64 VSS 116 VDD 168 DQ53 14 VSS 66 DQ30 118 NC(/CS3) 170 VSS 16 DQ6 68 DQ31 120 NC(/CS2) 172 DM6 18 DQ7 70 VSS 122 /RAS 174 DQ54 20 VSS 72 CB4 124 VDD 176 DQ55 22 DQ12 74 CB5 126 ODT0 178 VSS 24 DQ13 76 DM8 128 ODT1 180 DQ60 26 VSS 78 VSS 130 A13 182 DQ61 28 DM1 80 CB6 132 VDD 184 VSS 30 /RESET 82 CB7 134 DQ36 186 /DQS7 32 VSS 84 VREFCA 136 DQ37 188 DQS7 34 DQ14 86 VDD 138 VSS 190 VSS 36 DQ15 88 A15(NC) 140 DM4 192 DQ62 38 VSS 90 A14(NC) 142 DQ38 194 DQ63 40 DQ20 92 A9 144 DQ39 196 VSS 42 DQ21 94 VDD 146 VSS 198 /EVENT* 44 DM2 96 A11 148 DQ44 200 SDA 46 VSS 98 A7 150 DQ45 202 SCL 48 DQ22 100 A6 152 VSS 204 VTT 50 DQ23 102 VDD 154 /DQS5 52 VSS 104 A4 156 DQS5 Notes: 1. /CS1, ODT1, CKE1: Used for dual-rank UDIMMs; NC on single-rank UDIMMs. 2. CK1, NC and /CK1, NC : Used for dual-rank UDIMMs; not used on single-rank UDIMMs, but terminated. ©Apacer Technology Inc. 6 Pin Descriptions Pin Name Description Ax* SDRAM address bus BAx SDRAM bank select DQx DIMM memory data bus CBx DIMM ECC check bits /RAS SDRAM row address strobe /CAS SDRAM column address strobe /WE SDRAM write enable /CSx SDRAM Chip select lines CKEx SDRAM clock enable lines CKx SDRAM clock input /CKx SDRAM Differential clock input DQSx SDRAM data strobes(positive line of differential pair) /DQSx SDRAM data strobes(negative line of differential pair) DMx SDRAM input mask SCL Clock input for serial PD SDA Data input/output for serial PD SAx Serial address input VDD Power for internal circuit VDDSPD Serial EEPROM positive power supply VREFDQ SDRAM I/O reference supply VREFCA SDRAM command/address reference supply VSS Power supply return(ground) VTT SDRAM I/O termination supply /RESET ODTx /EVENT NC *IC Component Composition: ©Apacer Technology Inc. Set DRAM to known state On-die termination control lines An output of the thermal sensor to indicate critical module temperature Spare pins(no connect) 128Mx8 256Mx8 512Mx8 1024Mx8 A0~A13 A0~A14 A0~A15 A0~A15 7 Functional Block Diagram S0# DQS0# DQS0 DM0 DQS4# DQS4 DM4 DM DQ DQ DQ DQ DQ DQ DQ DQ DM CS# DQ DQS# DQS1# DQS1 DM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ DQ DQ DQ DQ DQ DQ DQ U1 ZQ VSS DQS5# DQS5 DM5 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQS2# DQS2 DM2 DQ DQ DQ DQ DQ DQ DQ DQ U2 ZQ VSS DQS6# DQS6 DM6 DM DQ DQ DQ DQ DQ DQ DQ DQ DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQS3# DQS3 DM3 DQ DQ DQ DQ DQ DQ DQ DQ U3 ZQ VSS DQS7# DQS7 DM7 DM DQ DQ DQ DQ DQ DQ DQ DQ DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ DQ DQ DQ DQ DQ DQ DQ DM DQ DQ DQ DQ DQ DQ DQ DQ DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 U4 ZQ DQS8# DQS8 DM8 VSS DQ DQ DQ DQ DQ DQ DQ DQ U5 ZQ VSS Note: DDR3 SDRAMs CK1 CK1# CS# DQ DQS# Clock, control, command, and address line terminations: U7 DDR3 SDRAM CKE0, A[15/14/13:0], RAS#, CAS#, WE#, ODT0, BA[2:0], S0# ZQ CS# DQ DQS# VTT DDR3 SDRAM VDD CK CK# U10 Temperature sensor/ SPD EEPROM U8 SCL ZQ EVT A0 SDA A1 A2 SA0 SA1 SA2 EVENT# CS# DQ DQS# U9 ZQ VSS VDDSPD DM CS# DQ DQS# CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 BA[2:0]: DDR3 SDRAM A[15/14/13:0] : DDR3 SDRAM RAS#: DDR3 SDRAM CAS#: DDR3 SDRAM WE#: DDR3 SDRAM CKE0: DDR3 SDRAM ODT0: DDR3 SDRAM RESET#: DDR3 SDRAM CK0 CK0# ZQ VSS DM CS# DQ DQS# DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 U6 VSS DM CS# DQ DQS# DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 CS# DQ DQS# VSS DM CS# DQ DQS# DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 BA[2:0] A[15/14/13:0] RAS# CAS# WE# CKE0 ODT0 RESET# Temperature sensor/SPD EEPROM VDD DDR3 SDRAM VTT Control, command, and address termination VREFCA DDR3 SDRAM VREFDQ DDR3 SDRAM VSS DDR3 SDRAM 1. The ZQ ball on each DDR3 component is connected to an external 240Ω ±1% resistor that is tied to ground. It is used for the calibration of the component’s ODT and output driver. ©Apacer Technology Inc. 8 Absolute Maximum Ratings Parameter Symbol Description Units Voltage on VDD pin relative to Vss VDD - 0.4 V ~ 1.975 V V Voltage on VDDQ pin relative to Vss VDDQ - 0.4 V ~ 1.975 V V Voltage on any pin relative to Vss VIN, VOUT - 0.4 V ~ 1.975 V V Notes: 1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51-2 standard. 3. VDD and VDDQ must be within 300mV of each other at all times; and VREF must not be greater than 0.6 x VDDQ, when VDD and VDDQ are less than 500mV; VREF may be equal to or less than 300mV. . ©Apacer Technology Inc. 9 DRAM Component Operating Temperature Range Symbol TOPER Parameter Operating Temperature Range Rating Units Notes -40 to 95 ℃ 1,2 Notes: 1. Operating Temperature TOPER is the case surface temperature on the center/top side of the DRAM. For measurement conditions, please refer to the JEDEC document JESD51-2. 2. The Normal Temperature Range specifies the temperatures where all DRAM specifications will be supported. During operation, the DRAM case temperature must be maintained between -40°C~95°C under all operating conditions. Industrial Temperature: The industrial temperature device requires that the case temperature not exceed –40°C or +95°C. JEDEC specifications require the refresh rate to double when TC exceeds+85°C; this also requires use of the high-temperature self refresh option.  MAX operating case temperature. TC is measured in the center of the package.  A thermal solution must be designed to ensure the DRAM device does not exceed the maximum TC during operation.  Device functionality is not guaranteed if the DRAM device exceeds the maximum TC during operation.  If TC exceeds +85°C, the DRAM must be refreshed externally at 2X refresh, which is a 3.9µs interval refresh rate. ©Apacer Technology Inc. 10 Operating Conditions Recommended DC Operating Conditions - DDR3 (1.5V) operation Symbol VDD Rating Parameter Supply Voltage VDDQ Supply Voltage for Output Typ. Max. 1.425 1.5 1.575 V 1.425 1.5 1.575 V Notes: 1. Under all conditions VDDQ must be less than or equal to VDD. 2. VDDQ tracks with VDD. AC parameters are measured with VDD and VDDQ tied together. ©Apacer Technology Inc. 11 Units Min. Environmental Requirements Symbol Parameter Rating Units Notes HOPR Operating Humidity (relative) 10 to 90 % TSTG Storage Temperature -50 to +100 °C 1 HSTG Storage Humidity (without condensation) 5 to 95 % 1 PBAR Barometric Pressure (operating & storage) 105 to 69 kPa 1,2 Notes: 1. Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and device functional operation at or above the conditions indicated is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Up to 9850 ft. ©Apacer Technology Inc. 12 Mechanical Drawing Unit: mm (Max) 30µ inch gold finger (All dimensions are in millimeters with ±0.15mm tolerance unless specified otherwise.) ©Apacer Technology Inc. 13 Revision History Revision Date Description 0.9 08/28/2012 Official release 1.0 08/29/2012 release Remark 1. Changed headquarters address 1.1 07/23/2013 2. Added 30µ gold finger 1.2 05/08/2015 Updated Mechanical Drawing 1.3 03/15/2017 Add Environmental Requirements 1.4 09/04/2017 Remove TOPR (Operating Temperature (ambient)) ©Apacer Technology Inc. 14 Global Presence Taiwan (Headquarters) Apacer Technology Inc. 1F., No.32, Zhongcheng Rd., Tucheng Dist., New Taipei City 236, Taiwan R.O.C. Tel: +886-2-2267-8000 Fax: +886-2-2267-2261 amtsales@apacer.com U.S.A. Apacer Memory America, Inc. 46732 Lakeview Blvd., Fremont, CA 94538 Tel: 1-408-518-8699 Fax: 1-510-249-9568 sa@apacerus.com Japan Apacer Technology Corp. 5F, Matsura Bldg., Shiba, Minato-Ku Tokyo, 105-0014, Japan Tel: 81-3-5419-2668 Fax: 81-3-5419-0018 jpservices@apacer.com Europe Apacer Technology B.V. Science Park Eindhoven 5051 5692 EB Son, The Netherlands Tel: 31-40-267-0000 Fax: 31-40-290-0686 sales@apacer.nl China Apacer Electronic (Shanghai) Co., Ltd. Room D, 22/FL, No.2, Lane 600, JieyunPlaza, Tianshan RD , Shanghai , 200051, China Tel: 86-21-6228-9939 Fax:86-21-6228-9936 sales@apacer.com.cn India Apacer Technologies Pvt Ltd. Unit No.201, "Brigade Corner", 7th Block Jayanagar, Yediyur Circle, Bangalore – 560082, India Tel: 91-80-4152-9061 Fax: 91-80-4170-0215 sales_india@apacer.com ©Apacer Technology Inc. 15