RAMP-AC RF DVK Hardware
USER’S GUIDE
VERSION 1.0
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Ramp-AC RF DVK Hardware
Version 1.0
REVISION HISTORY
Version
1.0
Date
30 April 2014
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Changes
Initial Release
2
CONN-GUIDE-RAMP-AC-DVK-HW
Ramp-AC RF DVK Hardware
Version 1.0
CONTENTS
Contents ..................................................................................................................................................... 3
Introduction ............................................................................................................................................... 4
Hardware ................................................................................................................................................... 4
AC Series DVK Board ............................................................................................................................... 4
Interfacing the AC DVK to RS232 Hardware ......................................................................................... 9
Interfacing the AC DVK to RS485 Hardware ......................................................................................... 9
Power Requirements .......................................................................................................................... 10
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CONN-GUIDE-RAMP-AC-DVK-HW
Ramp-AC RF DVK Hardware
Version 1.0
INTRODUCTION
The Laird RF RAMP-AC Development Kit board is the standard interface for software development on all Laird
RAMP-AC products. This board is connected to a Windows PC via RS-232 connector and programmed via the
Laird Configuration Utility. This guide covers the hardware specifications of the development board,
HARDWARE
This section details the Development Kit boards for the AC series RAMP modules including the following:
AC4490-1000M
AC4490-200M
AC4490LR-1000M
AC4490LR-200M
AC4490-200A
AC4790-1000M
AC4790-200M
AC4790LR-1000M
AC4790LR-200M
AC4790-200A
AC4486-5A
AC4486-5M
AC5124 – EOL
AC3124 – EOL
AC4424 – EOL
AC4868 - EOL
AC Series DVK Board
The SDK board is provided so the developer can use a standard PC interface to operate the transceivers and
to aid in system integration. As shown in Figure 1, there are many features that enhance the functionality
and usability of this board. It uses +5V TTL, RS232, RS485, and USB data formats for interfacing with the
transceiver. The configuration and operation of the SDK board is continuously shown by the LEDs located on
the edge of the board. See Table 1 and Table 2 for definitions of the LEDs and switches.
Figure 1: SDK Board Assembly Drawing
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Ramp-AC RF DVK Hardware
Version 1.0
Table 1: Switch and Jumper Settings
Switch / Jumper
Description
When this switch is moved to the Program Mode position, the RTS pin from the
DB9/USB connector is connected to the Command/Data pin (AC4490, AC4486,
AC4424, AC4790, AC4868), the TE pin (AC3124, AC1524) and the Pktmode pin
(AC5124) of the transceiver.
RTS of the transceiver is also connected to GND which allows the SDK software to
control these pins with RTS always enabled.
Program Mode/
Normal Mode (S6)
When the switch is moved to the Normal position, RTS at the DB9/USB connector is
connected to RTS pin of the transceiver and Command/Data is left disconnected.
The AC4424, AC4490, AC4790, AC4486, and AC4868 families all support AT
commands for making changes to the EEPROM settings.
If the Read/Write with AT Commands checkbox is enabled on the PC Settings page of
the configuration software, then the Program/Normal switch can be set to Normal.
The AC5124 family also supports AT Commands when that function is enabled in the
transceiver EEPROM.
RESET (S1)
When this button is pressed, the transceiver hardware performs a soft reset.
When this button is pressed, it takes the Write Enable pin (AC4424, AC5124, AC3124,
and AC1524) or GI1 pin (AC4490, AC4486, AC4790, AC4868) low.
WR ENABLE (S2)
Note:
RS485 or TTL
Radio
This button must be pressed and held during the write process for AC5124,
AC3124, AC1524, and AC4424 product families.
If using a transceiver module fitted with a RS-485 interface chip, select the RS485
Radio. This converts the transceiver’s RS-485 interface to serial, which is then
converted to the interface selected by the COMM SELECT jumper.
If not using a transceiver module fitted with a RS-485 interface chip, select the TTL
Radio.
When this jumper is moved to the RS232 Enable position, RS-232 communication is
enabled through the DB9 connector (J2).
When this jumper is moved to the RS485 Enable position, RS-485 communication is
enabled through the RS-485 header pins.
COMM SELECT
(J12)
When this jumper is moved to the Loopback Mode position, the transceiver TxD pin is
tied to the transceiver RxD pin. This is only valid for AC5124, AC4424, AC4486,
AC4490, AC4790, and AC4868 products. RTS mode must be disabled on the
transceiver when Loopback Mode is enabled. This is incompatible with RS485 Radio
selection.
When this jumper is moved to the 40 Pin Header position, serial communication is
enabled through the 40 pin header (J3). Depending on the transceiver used, signal
levels must be either 3.3V or 5V.
When this jumper is moved to the USB Enable position, USB communication is enabled
through the USB Type B connector (J8).
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Ramp-AC RF DVK Hardware
Version 1.0
Switch / Jumper
Description
RADIO VOLTAGE
(J9)
If this jumper is moved to the +5V Radio position, the transceiver is powered with 5V.
If this jumper is moved to the +3.3V Radio position, the transceiver is powered with
3.3V. The AC4x90-1000, AC4868 and AC4x90-1x1 must have this jumper set to 3.3V.
Note:
FORCED
CONFIGURATION
(J11)
Special care should be taken when setting this jumper. An improper setting
can cause catastrophic damage to the transceiver.
When this jumper is moved to the Normal Operation position, the transceiver
communicates at the Baud Rate configured in the EEPROM.
When the jumper is moved to the Forced 9600 Recovery position, the transceiver
interface baud rate is forced to 9600 Baud upon reset. This is for EEPROM recovery
only and should not be used in normal operation.
POWER SOURCE
(J7)
When this jumper is moved to the Power Conn position, power is supplied to the SDK
board through the power connector (J4).
When this jumper is moved to the Batteries position, power is supplied to the SDK
board through the two AA battery sockets on the bottom of the SDK board.
Note:
Special care should be taken when selecting batteries to power the SDK. High
quality Alkaline batteries should be used. Do not mix battery types or batteries
that have been used unequally as performance could suffer. Four Alkaline
batteries produce a voltage of 6V. A minimum of 5.5V is required to power
the SDK board. Power should be constantly monitored when using battery
power.
If USB Power is selected, the transceiver and development board receive power from
the USB port. USB power should only be used for AC4486, AC4490, AC4790, and
AC4868 product families. Most USB ports can only supply 500 mA of power max
therefore it is recommended that USB power only be used with transceivers that draw
less than 300 mA peak.
Note:
Though PCs should have over-current protection for their USB ports, drawing
too much current through the USB port can cause damage to the PC and
should be avoided.
Table 2: Status LEDs
LED
Description
+VCC
Lights when power is applied to the serial adapter board.
LOW POWER
Monitors the 5V supply and lights when the supply dips below 4.8V.
RESET
Lights when the reset line to the processor is high, resetting the transceiver.
TxD
Lights when TXD line is low; a rapid flash occurs when data is sent from transceiver to
host.
RxD
Lights when RXD line is low; a rapid flash occurs when data is received by transceiver
from host.
Forced 9600
Recovery
Lights when 9600 Baud line is low; shows the FORCED CONFIGURATION jumper is set to
force transceiver to 9600 Baud. The transceiver must be reset before it is forced to 9600.
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Ramp-AC RF DVK Hardware
Version 1.0
LED
Description
IN RANGE
With a client transceiver, it lights if the client transceiver is in range of a server transceiver
with the same system ID and channel number. With a server transceiver, it always lights
when the server is powered in normal mode and is ready to accept data.
Status 1
Reflects the state of the Command/Data pin (AC4490, AC4486, AC4424, AC4790,
AC4868), the TE pin (AC3124, AC1524) and the Pktmode pin (AC5124). This is
controlled by the PC RTS pin when the Program Mode/Normal Mode switch is set to
Program Mode. Lights when this pin goes low.
Status 2
Lights when the Write Enable pin (AC4424 / 5124/ 3124 / 1524) or GI1 pin (AC4490 /
4486 / 4790 / 4868) goes low. Controlled by WR ENABLE and Gen IN 1 buttons.
Table 3: AC4490 Only Section (AC4486, AC4790, and AC4868 Included)
Description
This varies the voltage (0 – 3.3V) presented to the AD In pin (pin 18).
Will light when the GO0 pin (pin 1) is Low.
Will light when the GO1 pin (pin 9) is Low.
When depressed, will force the GI0 pin (pin 4) Low.
When depressed, will force the GI1 pin (pin 14) Low.
This probe point provides a location for measuring the DA_Out pin (pin 19).
This probe point provides a GND reference location.
Item
Potentiometer/AD In
Gen Out 0 LED
Gen Out 1 LED
Gen In 0 Pushbutton
Gen In 1 Pushbutton
DA_Out
GND
Table 4: DB9 (J2) Signal Definitions
J2 Pin#
J1 Pin#
Signal Name
Description
1
36
DCD
Data Carrier Detect
Direction
I
2
14
RXD
Receive Data
I
3
16
TXD
Transmit Data
O
4
34
DTR
Data Terminal Ready
O
5
1,20,21,40
GND
Ground
6
32
DSR
Data Set Ready
I
7
27
RTS
Request To Send
O
8
23
CTS
Clear To Send
I
9
19
RI
Ring Indicator
I
Note: I/O direction is relative to the PC.
Table 5: SDK Board to Transceiver Pin Definitions
J1 Pin Type AC5124
Pin #
#
1
2
GND
I
1
2
AC5124
Signal
Name
GND
PKTMODE
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AC1524
AC3124
AC4424
AC4490
AC4486
AC4868
Pin #
5
AC1524
AC4424
AC3124
Signal Name Signal Name
GND
17
TE
7
GND
AC4490
AC4486
Signal
Name
GND
Command/ Command/
Data
Data
AC4790
Signal
Name
AC4868
Signal
Name
GND
GND
Command/
Data
Command/
Data
CONN-GUIDE-RAMP-AC-DVK-HW
Ramp-AC RF DVK Hardware
Version 1.0
J1 Pin Type AC5124
Pin #
#
AC5124
Signal
Name
AC1524
AC3124
AC4424
AC4490
AC4486
AC4868
Pin #
10
AC1524
AC4424
AC3124
Signal Name Signal Name
AC4490
AC4486
Signal
Name
AC4790
Signal
Name
AC4868
Signal
Name
3
VCC
3
VCC
VCC
VCC
VCC
VCC
VCC
4
NC
4
NC
NC
NC
NC
NC
NC
5
VCC
5
VCC
NC
NC
NC
NC
NC
6
NC
6
NC
NC
NC
NC
NC
NC
7
NC
7
NC
NC
NC
NC
NC
NC
8
NC
8
NC
NC
NC
DA Out
NC
DA Out
9
NC
9
NC
NC
NC
NC
NC
NC
10
NC
10
NC
NC
NC
NC
NC
NC
11
O
11
RSSI
RSSI
RSSI
RSSI
RSSI
NC
12
NC
12
NC
NC
NC
NC
NC
NC
13
NC
13
NC
NC
NC
NC
NC
NC
14
O
14
TXD
2
TXD
TXD
TXD
TXD
TXD
15
O
15
In Range
20
In Range
In Range
In Range
Session
Status
In Range
16
I
16
RXD
3
RXD
RXD
RXD
RXD
RXD
17
I
17
RI_In
NC
NC
NC
NC
NC
18
NC
18
NC
NC
NC
NC
NC
NC
19
O
19
RI_Out
9
NC
NC
GO1
GO1
GO1
20
GND
20
GND
18
RE
NC
AD In
AD In
AD In
21
GND
21
GND
NC
NC
NC
NC
NC
22
I
22
DCD_In
NC
NC
NC
NC
NC
23
O
23
CTS
CTS
CTS
CTS
CTS
CTS
24
NC
24
NC
NC
NC
NC
NC
NC
25
NC
25
NC
NC
NC
NC
NC
NC
9600 Baud
9600 Baud
19
13
7
I
26
BDSEL
12
Test Mode/
Packet
Frame
27
I
27
RTS
8
NC
RTS
RTS
RTS
RTS
28
NC
28
NC
NC
NC
NC
NC
NC
29
NC
29
NC
NC
NC
NC
NC
NC
30
NC
30
NC
NC
NC
NC
NC
NC
31
NC
31
NC
32
O
32
DSR
33
NC
33
NC
34
I
34
DTR
35
NC
35
NC
36
O
36
DCD_Out
1
37
I
37
Write
Enable
14
38
I
38
μP _Reset
15
μP Reset
39
VCC
39
VCC
11
VCC
26
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9600 Baud/
Packet
9600 Baud
Frame
NC
NC
NC
NC
NC
Hop Frame
Hop Frame
Hop Frame
NC
Hop Frame
NC
NC
NC
NC
NC
NC
NC
GI0
GI0
GI0
NC
NC
NC
NC
NC
NC
NC
GO0
GO0
GO0
GI1
GI1
GI1
μP Reset
μP Reset
μP Reset
μP Reset
VCC
VCC
VCC
VCC
4
Write Enable Write Enable
8
CONN-GUIDE-RAMP-AC-DVK-HW
Ramp-AC RF DVK Hardware
Version 1.0
J1 Pin Type AC5124
Pin #
#
AC5124
Signal
Name
AC1524
AC3124
AC4424
AC4490
AC4486
AC4868
Pin #
16
AC1524
AC4424
AC3124
Signal Name Signal Name
AC4490
AC4486
Signal
Name
AC4790
Signal
Name
AC4868
Signal
Name
40 GND
40
GND
GND
GND
GND
GND
GND
I – Input to the transceiver
O – Output from the transceiver
NC – No Connection (though there is an internal connection in some instances, therefore, this pin should be left
disconnected)
Note: The 40 pin header (J1) on the SDK board maps directly (pin-for-pin) to the 40 pin connector (J3).
Interfacing the AC DVK to RS232 Hardware
The DVK serial board is defined as a DCE (Data Communications Equipment). DCE is wired to interface
directly with DTE (Data Terminal Equipment). Typically, DTE is defined as a PC and DCE is defined as a
peripheral. To interface DCE to other DCE or DTE to other DTE, a null modem is required. The null modem
swaps pins to convert a DCE to a DTE and vice-versa. Normally, a null modem consists of a female and a male
DB9 connector. A typical null modem configuration is shown below.
Table 6: DTE, DCE and Null Modem Signal Definitions
DCE
Pin #
DCE Signal
Name
DCE
Direction
DTE
Pin #
DTE Signal
Name
DTE
Direction
Null Modem
Female DB9
Null Modem
Male DB9
1
2
3
4
5
6
7
DCD
TXD
RXD
DTR
GND
DSR
RTS
O
O
I
I
DCD
RXD
TXD
DTR
GND
DSR
RTS
I
I
O
O
O
I
1
2
3
4
5
6
7
I
O
1
2
3
4
5
6
7
4 or NC
3
2
6 and 1 or NC
5
4 or NC
8
8
9
CTS
RI
O
O
8
9
CTS
RI
I
I
8
9
7
NC
Interfacing the AC DVK to RS485 Hardware
The SDK serial board has been designed to interface to RS-485 equipment. If such operation is desired, the
COMM Select jumper should be set to RS485 Enable. The RS-485 circuitry used by the SDK board has been
specially designed to negate the requirement for a DE/RE signal. Thus, the receiver is always enabled unless
the transceiver has something to send to the OEM host. The OEM must ensure that the OEM host does not
send data at the same time as the transceiver; otherwise a RS-485 contention occurs because the RS-485
hardware is half duplex.
Table 7: RS-485 Header Pins
RS-485 Pin Name
Description
A TRUE
The non-inverted form of the serial data. This pin is at rest high.
B INVERT
The inverted form of the serial data (exact inversion of A TRUE). This pin is at rest low.
GND
GND
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Ramp-AC RF DVK Hardware
Version 1.0
RS-485 Pin Name
Description
+5V
This is regulated 5V output from the serial board for general purpose use. A maximum
of 100 mA should be drawn through this node.
Power Requirements
The serial board employs a National LM2940 linear regulator to regulate the incoming voltage to 5VDC. Due
to heat dissipation limitations and current requirements, a maximum of 10VDC should be present at
connector J4. A minimum of 5.5V should also be present at the connector.
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