CPPLC4T-A7BR-10.6656TS

Rev C Field Programmable Crystal Oscillator Series:CPPL Features Applications • Driving A/Ds, D/As, FPGAs Digital Video Ethernet, GbE Medical Storage Area Networking COTS Broad Band Access SONET/ SDH/ DWDM Test & Measurement • • • • Programmed in the field with the PG-3200 oscillator programming instrument within seconds. Factory Programmable Can be programmed twice Standard Package Options Ultra low jitter @ 1 million samples MSL: 1 Part Numbering Example: CPPL C 1 L Z A5 B6 xxx.xxxx TS SERIES OUTPUT PACKAGE STYLE VOLTAGE ADDED FEATURES OPERATING TEMP. STABILITY FREQUENCY TRI-STATE CPPL C=CMOS 1 = Full Size Blank=5.0V Blank=Cut Tape Blank=0°C ~ +70°C B6=±100ppm 0.500~133.000MHz TS=Tri-State T=TTL 4 = Half Size L=3.3V B=Bulk A3=-55°C ~ +125°C BP=±50ppm 5 = 5X3.2 Ceramic R=2.7V T=Tube A5=-20°C ~ +70°C BR=±25ppm Z=Tape and Reel A7=-40°C ~ +85°C 7 = 5X7 Ceramic PD=PowerDwn Specifications: Description Min Typ Max Unit Frequency Range: Programmable to any discrete frequency 0.500 133 MHz Available Stability Options: -100 +100 PPM -50 +50 -25 +25 Programmable Supply Voltage: (1-133 MHz) 4.5 5.0 5.5 V (1-100 MHz) 3.0 3.3 3.6 V (1-66.0 MHz) 2.5 2.7 3.0 V -55 +125 °C -20 +70 °C -40 +85 °C -55 +125 °C ±5 PPM/Year Operating Temperature Range Options: Storage Temperature: Aging: Ta=°25C,Vdd=5V/3.3V Programmable Output Level: Operating Conditions: CMOS/TTL Description Min Max Unit 2.7 5.5 V VDD Supply Voltage CTTL Max capacitive load on outputs for TTL levels 4.5V-5.5V VDD, ≤ 40 MHz 4.5V-5.5V VDD, 40 - 133 MHz 50 25 pF pF Max capacitive load on outputs for CMOS levels 4.5V-5.5V VDD, ≤ 66 MHz 4.5V-5.5V VDD, 66 - 133 MHz 3.0V-3.6V VDD, ≤ 40 MHz 3.0V-3.6V VDD, 40 - 100 MHz 2.5-3.0V VDD, ≤ 66 MHz 50 25 30 15 25 pF pF pF pF pF CCMOS Cardinal Components 1801 Broadway Street Charlottesville, VA 22902 TEL: (973)785-1333 E-MAIL: sales@cardinalxtal.com WEB: http://www.cardinalxtal.com Pg 1 Rev C Field Programmable Crystal Oscillator Series:CPPL Output Clock Switching Characteristics: Description Test Conditions Min Typ Max Unit Duty Cycle: ≤ 50 MHz, CL = 50 pF 45 - 55 % TTL @ 1.4V 50 - 66 MHz, CL = 15 pF 45 - 55 % 4.5-5.5 VDD 66 - 125 MHz, CL = 25 pF 40 - 60 % 125 - 133 MHz, CL = 15 pF 40 - 60 % ≤ 66 MHz, CL ≤ 25 pF 45 - 55 % CMOS @ VDD/2 66 - 125 MHz, CL ≤ 25 pF 40 - 60 % 4.5-5.5 VDD 125 - 133 MHz, CL ≤ 15 pF 60 - 60 % 3.0-3.6 VDD ≤ 40 MHz, CL ≤ 30 pF 45 - 55 40 - 100 MHz, CL ≤ 15 pF 40 - 60 Duty Cycle: Rise/Fall: % % 0.8V - 2.0V, 4.5 - 5.5 VDD, CL = 50 pF 1.8 ns 0.8V - 2.0V, 4.5 - 5.5 VDD, CL = 25 pF 1.2 ns 0.8V - 2.0V, 4.5 - 5.5 VDD, CL = 15 pF 0.9 ns 0.2V - 0.8 * VDD, 4.5 - 5.5 VDD, CL = 50 pF 3.4 ns 0.2V - 0.8 * VDD, 3.0 - 3.6 VDD, CL = 30 pF 4.0 ns 0.2V - 0.8 * VDD, 3.0 - 3.6 VDD, CL = 15 pF 2.4 ns - 2 ms T/2 T+10 ns 10 15 ns T/2 T+10 ns 10 15 ns T = Frequency Oscillator Period T 1.5*T+25 ns RMS Period Jitter 1-133.00 MHz 8 11 ps Peak to Peak* ≤ 33.000 MHz 65 99 ps > 33.000 MHz 65 80 ps Start Up Time Power Down Delay Time Synchronous From Power On - PWR_DOWN pin LOW to output Hi-Z, T = Frequency Oscillator Period Asynchronous Output Disable Time Synchronous OE pin LOW to output Hi-Z, T = Frequency Oscillator Period Asynchronous Output Enable Time * Jitter Tested at > 1,000,000 samples, exceeding JEDEC std JESD65 Cardinal Components 1801 Broadway Street Charlottesville, VA 22902 TEL: (973)785-1333 E-MAIL: sales@cardinalxtal.com WEB: http://www.cardinalxtal.com Pg 2 Rev C Field Programmable Crystal Oscillator Series:CPPL Electrical Characteristics: Description Test Conditions Min Typ Max Unit VDD = 5.0 V - - 0.8 V VDD = 3.3 V - - 0.2 * VDD V VDD = 2.7 V - - 0.2 * VDD V VDD = 5.0 V 2.0 - - V VDD = 3.3 V 0.7 * VDD - - V IIL, Input Low Current VIN = 0 V - - 10 µA IIH, Input High Current VIN = VDD - - 5 µA VDD = 5.0 V, IOL = 16mA - - 0.4 V VDD = 3.3 V, IOL = 8mA - - 0.4 V VIHTTL, High-Level Output Voltage VDD = 5.0 V, IOL = -16mA 2.4 - - V VIHCMOS, High-Level Output Voltage VDD = 5.0 V, IOL = -16mA VDD-0.4 - - V VDD = 3.3 V, IOL = -8mA VDD-0.4 - - V Power Supply Current: VDD = 5.0 V , FO ≤ 133 MHz - - 45 mA (Unloaded) VDD = 3.3 V , FO ≤ 100 MHz - - 25 mA VDD = 2.7 V , FO ≤ 66.0 MHz - - 20 mA - 10 50 µA - 20 - µA Input Characteristics (Pin 1): VIL, Low-Level Input Voltage (To Tri-State or Power Down) VIH, High-Level Input Voltage (To Enable Output or Open) Output Characteristics: VOL, Low-Level Output Voltage Standby Current: Tri-State Leakage Current VDD = 5.0 V Output Enable Mode: Output is Tri-Stated Power Down Mode: Output is Tri-Stated Cardinal Components 1801 Broadway Street Charlottesville, VA 22902 TEL: (973)785-1333 E-MAIL: sales@cardinalxtal.com WEB: http://www.cardinalxtal.com Pg 3 Rev C Field Programmable Crystal Oscillator *Note: Series:CPPL REQUIRED Bypass VDD to GND with a 0.01μF capacitor Style 1 Style 5 Recommended Solder Pad Layout Cardinal Components 1801 Broadway Street Charlottesville, VA 22902 Full Size 14 pin DIP Style 4 Half Size 8 pin DIP Pin # Function Pin # Function 1 Control 1 Control 7 GND 4 GND 8 Output 5 Output 14 VDD 8 VDD 3.2x5 Ceramic SMD Style 7 5x7 Ceramic SMD Pin # Function Pin # Function 1 Control 1 Control 2 GND 2 GND 3 Output 3 Output 4 VDD 4 VDD Recommended Solder Pad Layout TEL: (973)785-1333 E-MAIL: sales@cardinalxtal.com WEB: http://www.cardinalxtal.com Pg 4