Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
The
Series of non-isolated dc-dc converters
provide high efficiency, cost effective, and complete
Point-of-Load power solutions in very small and low
profile SMD packages. Occupying a footprint of less
than 2 cm2 (0.3 in2), these are the converters of
choice for a wide range of telecommunications, data
communications, computing, industrial and consumer
applications where board space, cost, height,
efficiency, and reliable operation in elevated
temperature environments are critical.
非絶縁型DC/DCｺﾝﾊﾞｰﾀの
ｼﾘｰｽﾞは、高効率、低価格、小型・低
背のSMDﾊﾟｯｹｰｼﾞで完全なPOL電源ｿﾘｭｰｼｮﾝを提供します。実装面積
が2cm2 (0.3 in2) 以下のこのｺﾝﾊﾞｰﾀは、基板ｽﾍﾟｰｽ、費用、高さ、効
率、及び高温環境での信頼性のある動作が重要な広範囲の電気通
信、ﾃﾞｰﾀ通信、ｺﾝﾋﾟｭｰﾀ、産業及びｺﾝｼｭｰﾏ向けのｱﾌﾟﾘｹｰｼｮﾝに最適で
す。
The FPDK05SR8004PSV converter of the
Series operates from a 3.0Vdc to 5.5Vdc input, and
delivers 4A of output current at a tightly regulated
programmable output voltage of 0.8Vdc to 3.465Vdc.
The thermal performance of the FPDK05SR8004PSV
is best-in-class: No derating is needed up to 85°C,
under natural convection.
ｼﾘｰｽﾞの FPDK05SR8004PSV は3.0V～5.5V入力で動作し、高い
電圧精度でﾌﾟﾛｸﾞﾗﾑ可能な出力電圧0.8V～3.465Vdcで、4Aの出力電流
を供給します。FPDK05SR8004PSV の温度特性はｸﾗｽ最高ﾚﾍﾞﾙです。
自然対流で85℃まで出力電流ﾃﾞｨﾚｰﾃｨﾝｸﾞを必要としません。
The leading edge performance of the
Series
products, and their extremely high quality and
reliability are achieved through advanced circuit and
thermal design techniques and FDK’s state of the art
in-house manufacturing processes and systems.
ｼﾘｰｽﾞ製品の最先端の特性と非常に高い品質及び信頼性は、高
度な回路設計及び温度設計技術とFDKの最先端の自社製造ﾌﾟﾛｾｽ及
びｼｽﾃﾑによりもたらされます。
FPDK05SR8004PSV
Features
RoHS compliant
RoHS準拠
Delivers up to 4A (13.9W)
4A (13.9W)まで供給可能
High efficiency, no heatsink required
高効率-放熱器が不要
No derating up to 85℃
85℃までﾃﾞｨﾚｰﾃｨﾝｸﾞ不要
Small size and low profile:0.657” x 0.402” x 0.134”
小型、低背 (16.7 x 10.2 x 3.4mm)
Programmable output voltage via external resistor
外部接続の抵抗によりﾌﾟﾛｸﾞﾗﾑ可能な出力電圧
No minimum load required
最小負荷は不要
Start up into pre-biased output
出力にﾌﾟﾘﾊﾞｲｱｽがあっても起動可能
Remote ON/OFF
ﾘﾓｰﾄON/OFF機能
Applications
Auto-reset output over-current protection
Telecommunications
- Routers, Base Stations, Wireless
Auto-reset output over-temperature protection
ﾃﾚｺﾑｼｽﾃﾑ (ﾙｰﾀ、基地局、無線)
Data Communications
- Internet Routers, Processors
ﾃﾞｰﾀ通信 (ｲﾝﾀｰﾈｯﾄﾙｰﾀ、ﾌﾟﾛｾｯｻ)
Computing
- Servers, Workstations
ｺﾝﾋﾟｭｰﾀ関係 (ｻｰﾊﾞｰ、ﾜｰｸｽﾃｰｼｮﾝ)
Industrial and Consumer
- Navigation, POS systems, Office Equipment
- Entertainment
過電流保護機能: 自動復帰
内部過熱保護機能
Power Good Signal
ﾊﾟﾜｰｸﾞｯﾄﾞ信号出力
High reliability, MTBF = 1 Million Hours
高信頼性: MTBF = 1 Million Hours
UL60950 recognition in U.S. & Canada, and CB
Scheme certification per IEC/EN60950 (pending)
UL60950、CB Scheme （準拠）
All materials meet UL94, V-0 flammability rating
全ての部品は UL94 V-0に適合
産業及びｺﾝｼｭｰﾏ向け
(ﾅﾋﾞｹﾞｰｼｮﾝ、ﾎﾟｽｼｽﾃﾑ、ｵﾌｨｽ機器、ｴﾝﾀｰﾃｲﾝﾒﾝﾄ)
http://www.fdk.com
Page 1 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Electrical Specifications
電気的仕様
All specifications apply over specified input voltage, output load, and temperature range, unless otherwise
noted.
注記が無い場合、全ての仕様は指定された入力電圧、負荷、温度範囲で適用されます。
Conditions: Ta=25degC, Airflow=50LFM (0.25m/s), Vin=5.0Vdc, unless otherwise specified.
PARAMETER
NOTES
MIN
TYP
MAX
UNITS
-0.3
6.0
Vdc
1
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Operating Temperature
See page 8
-40
85
°C
Operating Humidity
Non Condensing
20
85
%RH
-55
125
°C
5
95
%RH
Output Voltage
0.8
3.465
Vdc
Power Good Voltage
-0.3
5.0
Vdc
5.0
mA
Storage Temperature
Storage Humidity
Non Condensing
Power Good Sink Current
Moisture Sensitivity Level
JEDEC Level 2
FEATURE CHARACTERISTICS
Switching Frequency
600
Output Voltage Programming Range
See page6. Output Voltage Adjust
Turn-On Delay Time
Full resistive load
0.8
kHz
3.465
Vdc
with Vin (module enabled, then Vin applied) From Vin=Vin(min) to 0.1*Vout(nom)
3.0
ms
with Enable (Vin applied, then enabled)
From enable to 0.1*Vout(nom)
3.0
ms
From 0.1*Vout(nom) to 0.9*Vout(nom)
3.0
ms
Rise Time (Full resistive load)
Remote Control (Positive Logic)
Module Off
-0.2
0.4
Vdc
Module On
1.3
Vin
Vdc
Power Good
Set point for power good output high
Power Good Output Low
IPGOOD=5mA
Power Good Leakage Current
1
Absolute Maximum Ratings
82
88
93
%Vout
0.5
V
10
uA
絶対最大定格
Stresses in excess of the absolute maximum ratings may lead to degradation in performance and reliability of
the converter and may result in permanent damage.
絶対最大定格を超えたｽﾄﾚｽは、性能の低下、信頼性の低下、及びﾓｼﾞｭｰﾙの破損を引き起こすことがあります。
http://www.fdk.com
Page 2 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Conditions: Ta=25degC, Airflow=50LFM (0.25m/s), Vin=5.0Vdc, unless otherwise specified.
PARAMETER
NOTES
MIN
TYP
MAX
UNITS
Vout≦2.0Vdc
3.0
5.0
5.5
Vdc
2.0Vdc＜Vout≦2.75Vdc
4.3
5.0
5.5
Vdc
2.75Vdc＜Vout
4.75
5.0
5.5
Vdc
INPUT CHARACTERISTICS
Operating Input Voltage Range
Input Under Voltage Lockout
Turn-On Threshold
2.2
2.4
2.8
Vdc
Turn-Off Threshold
1.7
2.0
2.4
Vdc
Vout=3.465V
3.4
Adc
Maximum Input Current
4Aout at Vin-min
Vout=3.3V
3.2
Adc
Vout=2.5V
2.8
Adc
Vout=1.8V
3.0
Adc
Vout=1.5V
2.5
Adc
Vout=1.2V
2.1
Adc
Vout=1.0V
1.8
Adc
Vout=0.8V
1.6
Adc
Input Stand-by Current (module disabled)
Input No Load Current
Input Reflected-Ripple Current
http://www.fdk.com
1.5
mA
50
mA
Vout=3.3V
50
mA
Vout=2.5V
50
mA
Vout=1.8V
45
mA
Vout=3.465V
Vout=1.5V
40
mA
Vout=1.2V
40
mA
Vout=1.0V
35
mA
Vout=0.8V
35
mA
Vout=3.465V
15
mAp-p
See Fig.J for setup (BW=20MHz)
Vout=3.3V
15
mAp-p
Vout=2.5V
15
mAp-p
Vout=1.8V
15
mAp-p
Vout=1.5V
10
mAp-p
Vout=1.2V
10
mAp-p
Vout=1.0V
10
mAp-p
Vout=0.8V
10
mAp-p
Page 3 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Conditions: Ta=25degC, Airflow=50LFM (0.25m/s), Vin=5.0Vdc, unless otherwise specified.
PARAMETER
NOTES
MIN
TYP
MAX
UNITS
+2.5
%Vout
OUTPUT CHARACTERISTICS
Output Voltage Set Point (no load)
-2.5
Output Regulation
Over Line
Full resistive load
+/- 0.1
%Vout
Over Load
From no load to full load
+/- 0.3
%Vout
Output Voltage Range
(Over all operating input voltage, resistive load Output Ripple is not included.
and temperature conditions until end of life)
Output Ripple and Noise BW=20MHz
-3.0
%Vout
45
mVp-p
See Fig.H for setup (BW=20MHz)
Vout=3.465V
External Load Capacitance
+3.0
30
Vout=3.3V
30
45
mVp-p
Vout=2.5V
30
45
mVp-p
Vout=1.8V
30
45
mVp-p
Vout=1.5V
25
40
mVp-p
Vout=1.2V
20
30
mVp-p
Vout=1.0V
20
30
mVp-p
Vout=0.8V
20
30
mVp-p
Ceramic Capacitor
10
Min ESR＞10mΩ
Output Current Range
0
Output Current Limit Inception (Iout)
1000
uF
2000
uF
4.0
A
200
%
0.7
Arms
Output Short-Circuit Current
Short=10mΩ, Vout=3.3Vdc set
DYNAMIC RESPONSE
See Fig.H for setup (BW=20MHz)
Iout step from 2A to 4A with di/dt=5A/us
Vout=3.465Vdc
200
mV
Vout=0.8Vdc
140
mV
Vout=3.465Vdc
80
us
Settling time (to within 10% of Vout)
Iout step from 4A to 2A with di/dt=-5A/us
Settling time (to within 10% of Vout)
EFFICIENCY
http://www.fdk.com
Vout=0.8Vdc
20
us
Vout=3.465Vdc
180
mV
Vout=0.8Vdc
140
mV
Vout=3.465Vdc
80
us
Vout=0.8Vdc
20
us
Full load (4A)
Vout=3.465V
92.0
%
Vout=3.3V
91.5
%
Vout=2.5V
89.5
%
Vout=1.8V
86.5
%
Vout=1.5V
84.5
%
Vout=1.2V
81.5
%
Vout=1.0V
79.0
%
Vout=0.8V
75.5
%
Page 4 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Operation
Input and Output Impedance
The FPDK05SR8004PSV converter should be
connected to a DC power source using a low
impedance input line. In order to counteract the
possible effect of input line inductance on the stability
of the converter, the use of decoupling capacitors
placed in close proximity to the converter input pins is
recommended. This will ensure stability of the
converter and reduce input ripple voltage. Although
low ESR Tantalum or other capacitors should
typically be adequate, very low ESR capacitors
(ceramic, over 47μF) are recommended to minimize
input ripple voltage. The converter itself has on-board
internal input capacitance of 6uF with very low ESR
(ceramic).
FPDK05SR8004PSVと入力電源間は低ｲﾝﾋﾟｰﾀﾞﾝｽで接続してください。
ｺﾝﾊﾞｰﾀの安定性に影響のある入力ｲﾝﾀﾞｸﾀﾝｽを抑えるため、ｺﾝﾊﾞｰﾀの
入力ﾋﾟﾝの近傍にﾃﾞｶｯﾌﾟﾘﾝｸﾞｺﾝﾃﾞﾝｻを付加することをお勧めします。こ
れによりｺﾝﾊﾞｰﾀの安定動作を確実にし、入力ﾘｯﾌﾟﾙ電圧を抑制します。
低ESRﾀﾝﾀﾙ、又はその他のｺﾝﾃﾞﾝｻも一般的には問題ありませんが、
入力ﾘｯﾌﾟﾙを最小にするためには、非常に低ESRｺﾝﾃﾞﾝｻ(ｾﾗﾐｯｸで47μ
F以上)を推奨します。ｺﾝﾊﾞｰﾀ自身は入力回路に極低ESRの6uFｾﾗﾐｯｸ
入力ｺﾝﾃﾞﾝｻを搭載しています。
The FPDK05SR8004PSV turns on when the
REMOTE pin is at logic high (open) and turns off
when it is at logic low. When the REMOTE pin is left
open, the converter is on. Voltage ranges for logic
high/low are provided in the Electrical Specifications
section.
FPDK05SR8004PSVはﾘﾓｰﾄ端子が論理的にHigh (open)で動作し、論
理的にLowで停止します。 ﾘﾓｰﾄ端子が未接続 (ｵｰﾌﾟﾝ)の場合、ｺﾝﾊﾞｰ
ﾀはONします。 論理的High/Lowの電圧範囲は電気的特性を参照して
ください。
The REMOTE pin (pin3) is internally pulled-up to Vin.
An open collector (open -drain) transistor can be
used to drive the REMOTE pin (pin3).
The device driving the REMOTE pin (pin3) must be
capable of sinking up to 0.3mA at low logic level.
ﾘﾓｰﾄ端子（3番ﾋﾟﾝ）はﾓｼﾞｭｰﾙ内部でVinにﾌﾟﾙｱｯﾌﾟされています。ﾘﾓｰﾄ
端子（3番ﾋﾟﾝ）の操作にはｵｰﾌﾟﾝｺﾚｸﾀ（ｵｰﾌﾟﾝﾄﾞﾚｲﾝ）のﾄﾗﾝｼﾞｽﾀが使用
可能です。
ﾘﾓｰﾄ端子（3番ﾋﾟﾝ）を操作するﾃﾞﾊﾞｲｽにはLowﾚﾍﾞﾙで0.3mAのｼﾝｸ能力
が必要です。
REMOTE
Control signal
The FPDK05SR8004PSV is capable of stable
operation with no external capacitance on the output.
To minimize output ripple voltage, the use of very low
ESR ceramic capacitors is recommended. These
capacitors should be placed in close proximity to the
load to improve transient performance and to
decrease output voltage ripple.
FPDK05SR8004PSVは出力に外付けｺﾝﾃﾞﾝｻが無い状態でも安定して
動作します。出力ﾘｯﾌﾟﾙを最小にするため、極低ESRのｾﾗﾐｯｸｺﾝﾃﾞﾝｻの
接続を推奨します。過渡時の特性向上と出力ﾘｯﾌﾟﾙ低減のために負荷
の近傍に極低ESRｾﾗﾐｯｸｺﾝﾃﾞﾝｻを実装することをお勧めします。
Note that the converter does not have a SENSE pin
to counteract voltage drops between the output pins
and the load. The impedance of the line from the
converter output to the load should thus be kept as
low as possible to maintain good load regulation.
GND
GND
Fig. A: A typical configuration for remote ON/OFF
Power Good (Pin 6)
The Power Good Signal is an open-drain output that
asserts low when Vout is out of regulation.
ﾊﾟﾜｰｸﾞｯﾄﾞ信号はｵｰﾌﾟﾝﾄﾞﾚｲﾝ出力で、出力電圧が確定していない状態
ではLowとなります。
このｺﾝﾊﾞｰﾀは出力端子と負荷間の電圧ﾄﾞﾛｯﾌﾟを補正するｾﾝｽ端子を設
けていません。精度の高い負荷特性を保持するために、ｺﾝﾊﾞｰﾀの出力
から負荷までのﾗｲﾝｲﾝﾋﾟｰﾀﾞﾝｽは可能な限り低くしてください。
REMOTE (Pin 3)
The REMOTE pin (Pin 3) can be used to turn the
converter on or off remotely using a signal that is
referenced to GND (Pin 2 or 7). A typical
configuration for remote ON/OFF is shown in Fig. A.
ﾘﾓｰﾄ端子(3番ﾋﾟﾝ)はGND(2又は7番ﾋﾟﾝ)を基準としたﾘﾓｰﾄ信号によりｺ
ﾝﾊﾞｰﾀをON/OFFするのに使用できます。一般的なﾘﾓｰﾄON/OFF回路
を図-Aに示します。
http://www.fdk.com
Page 5 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Output Voltage Adjust/TRIM (Pin 5)
Table 1: Trim Resistor Value
The output voltage of the FPDK05SR8004PSV
converter can be programmed from 0.8V to 3.465V
by using an external resistor
VO-REQ [V]
RTRIM [kΩ]
The Closest
Standard Value [kΩ]
RTRIM1 + RTRIM2
0.8
Open
Open
1.0
34.000
34.000 +0.000
1.2
16.500
16.500 + 0.000
FPDK05SR8004PSVの出力電圧は外部抵抗を接続することで、0.8V～
3.465Vまで可変可能です。
External Resistor
1.5
9.000
7.500 + 1.500
An external trim resistor, RTRIM, should be connected
between TRIM (pin 5) and GND (pin 2 or 7); see Fig.
B. The value of RTRIM, in kΩ, for a desired output
voltage, VO-REQ, in V, is given by:
1.8
6.000
3.000 + 3.000
2.5
3.118
3.000 + 0.120
3.3
1.800
1.800 + 0.000
外部抵抗 RTRIM はTRIM端子(5番ﾋﾟﾝ)とGND端子(2又は7番ﾋﾟﾝ)の間に
接続してください。図Bを参照。 RTRIM の定数、及び必要な出力電圧は
次の式により求めます。
RTRIM =
7
( VO-REQ - 0.8 )
-1
Protection Features
Input Under-Voltage Lockout
[kΩ]
Note that the tolerance of a trim resistor will affect the
tolerance of the output voltage. Standard 1% or 0.5%
resistors may suffice for most applications; however,
a tighter tolerance can be obtained by using two
resistors in series instead of one standard value
resistor.
Table 1 lists calculated values of RTRIM for common
output voltages. For each value of RTRIM, Table 1 also
shows the closest available standard resistor value.
RTRIM の公差は出力電圧の公差に影響します。ほとんどの使用状況に
おいては、標準的な1%又は0.5%品の抵抗で十分です。しかしながら、よ
り厳しい出力精度のためには、抵抗1本よりも2本を直列に使用します。
Table 1に一般的な出力電圧を設定する際の抵抗値を表示します。また
Table 1に標準的な抵抗を使用した場合の近似値も表示しています。
From a turned-on state, the converter will turn off
automatically when the input voltage drops below
typically 2.0V. It will then turn on automatically when
the input voltage reaches typically 2.4V.
動作している状態で入力電圧がTYPで2.0V未満になると、このｺﾝﾊﾞｰﾀ
は自動的に停止します。また、入力電圧がTYPで2.4V以上になると、こ
のｺﾝﾊﾞｰﾀは自動的に動作を開始します。
Output Over-Current Protection (OCP)
The converter is self-protected against over-current
and short circuit conditions. On the occurrence of an
over-current condition, the converter will enter a
pulse-by-pulse hiccup mode. On the removal of the
over-current or short circuit condition, Vout will return
to the original value (auto-reset).
このｺﾝﾊﾞｰﾀは過電流と短絡に対し自己保護します。過電流状態になる
と、このｺﾝﾊﾞｰﾀはﾊﾟﾙｽ-ﾊﾞｲ-ﾊﾟﾙｽ HICCUPﾓｰﾄﾞになり、過電流状態が
解除されるとVoutは通常の値に戻ります。(自動ﾘｾｯﾄ)
Vout
Over-Temperature Protection (OTP)
TRIM
RTRIM1
RTRIM
RTRIM2
GND
The converter is protected against over-temperature
conditions, using a built-in thermal protection feature
in the PWM controller IC. In case of overheating due
to abnormal operation conditions, the converter will
turn off automatically. It will turn back on
automatically once it has cooled down to a safe
temperature (auto-reset).
このｺﾝﾊﾞｰﾀはPWMｺﾝﾄﾛｰﾙICの持っている温度保護機能を使って過熱
状態から保護されています。異常な動作条件などにより過熱保護が動
作すると、ｺﾝﾊﾞｰﾀは自動的に停止します。安全な温度まで下がると、自
動的に再起動します。(自動ﾘｾｯﾄ)
Fig.B: Configuration for programming output voltage
http://www.fdk.com
Page 6 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Characterization
FDK特製の風洞実験装置は水平方向の層流を50LFM(自然対流と同
等、NC)から600LFMまで精密に制御でき、環境温度は30℃から85℃を
制御できます。温度測定には赤外線(IR)ｻｰﾓｸﾞﾗﾌｨと熱電対を使用して
います。(図C及びD参照)
Overview
The converter has been characterized for several
operational features, including thermal derating
(maximum available load current as a function of
ambient temperature and airflow), efficiency, power
dissipation, start-up and shutdown characteristics,
ripple and noise, and transient response to load
step-changes.
このｺﾝﾊﾞｰﾀは温度ﾃﾞｨﾚｰﾃｨﾝｸﾞ、効率、電力損失、ｽﾀｰﾄｱｯﾌﾟ時、及び
ｼｬｯﾄﾀﾞｳﾝ時の動作、ﾘｯﾌﾟﾙ･ﾉｲｽﾞ、動的負荷変動などを含む、さまざま
な動作状態で特徴付けられます。
Figures showing data plots and waveforms for
different output voltages are presented in the
following pages.
Fig. F: FDK Original Wind Tunnel
各出力電圧時のﾃﾞｰﾀ、及び波形は以後のﾍﾟｰｼﾞに掲載されています。
Test Conditions
To
ensure
measurement
accuracy
and
reproducibility, all thermal and efficiency data were
taken with the converter soldered to a standardized
thermal test board. The thermal test board was
mounted inside FDK’s custom wind tunnel to enable
precise control of ambient temperature and airflow
conditions.
測定精度、及び再現性を確実にするために、全ての温度、及び効率
ﾃﾞｰﾀは標準化された温度評価ﾎﾞｰﾄﾞにｺﾝﾊﾞｰﾀを半田付けして取得して
います。温度評価ﾎﾞｰﾄﾞをFDK特製の風洞実験設備内に設置すること
で、環境温度、及び風量を精密に管理しています。
The thermal test board comprised a four layer printed
circuit board (PCB) with a total thickness of 0.060”.
Copper metallization on the two outer layers was
limited to pads and traces needed for soldering the
converter and peripheral components to the board.
The two inner layers comprised power and ground
planes of 2 oz. copper. This thermal test board, with
the paucity of copper on the outer surfaces, limits
heat transfer from the converter to the PCB, thereby
providing a worst-case but consistent set of
conditions for thermal measurements.
温度評価ﾎﾞｰﾄﾞは厚さ0.060”(1.6mm)厚の4層PCBで作成しています。表
面2層の銅箔はｺﾝﾊﾞｰﾀを実装するためのﾊﾟｯﾄﾞと周辺部品へのﾊﾟﾀｰﾝの
みに限定しています。内側2層は70μmの銅箔で電力、及びｸﾞﾗﾝﾄﾞﾗｲﾝ
を形成しています。このように表層の銅箔を限りなく少なくした温度評価
ﾎﾞｰﾄﾞは、ｺﾝﾊﾞｰﾀからPCBへの熱の逃げを制限し、ﾜｰｽﾄｹｰｽでありな
がら矛盾の無い温度評価条件を実現しています。
FDK’s custom wind tunnel was used to provide
precise horizontal laminar airflow in the range of 50
LFM to 600LFM, at ambient temperatures between
30°C and 85°C. Infrared (IR) thermography and
thermocouples
were
used
for
temperature
measurements. (See Fig. C & Fig. D)
http://www.fdk.com
Fig. G: Test Chamber
Thermal Derating
Fig.1 show the maximum available load current vs.
ambient temperature and airflow rates. Ambient
temperature was varied between 30°C and 85°C,
with airflow rates from NC(50LFM) to 400LFM
(0.25m/s to 2.0m/s). The converter was mounted
horizontally, and the airflow was parallel to the long
axis of the converter, going from pin 1 to pin 8.
図1はある環境温度と風量の条件下における最大出力電流を表しま
す。環境温度は風量NC(50LFM)～400LFMの条件で30℃～85℃の間を
変動させています。ｺﾝﾊﾞｰﾀは水平に設置し、風向きはｺﾝﾊﾞｰﾀの長手方
向に平行で1番ﾋﾟﾝから8番ﾋﾟﾝに向けて吹いています。
The maximum available load current, for any given
set of conditions, is defined as the lower of:
(i) The output current at which the temperature of any
component reaches 120°C, or
(ii) The current rating of the converter (4A)
各々の測定条件で最大出力電流の値は下記のとおり定義します。
(i) いずれかの部品の温度が120℃に到達した時点の出力電流値、又
は
(ii) ｺﾝﾊﾞｰﾀの公称定格電流 (4A)
Page 7 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Fig. H: Test setup for measuring output voltage ripple and
output voltage response to step load change
5
4
Output Current [A]
Iin
CURRENT PROBE
3
Vin
1uH
2
+
400LFM
DC
200LFM
1
Vin source
NC(50)
+
1000μF
Electrolytic
Capacitor
Cin
47μF
Ceramic
Capacitor
DC/DC
Converter
GND
0
30
40
50
60
Ambient Temp [DegC]
70
80
Fig.1: Output current vs. ambient temperature and
velocity at 5.0Vin, 0.8V to 3.465V out
air
Fig. J: Test setup for measuring input
reflected ripple current
Note that continuous operation beyond the derated
current as specified by the derating curves (Fig.1)
may lead to degradation in performance and
reliability of the converter and may result in
permanent damage.
出力電流ﾃﾞｨﾚｰﾃｨﾝｸﾞｶｰﾌﾞ(図1)で指定された定格電流を超えた連続し
た操作は、性能の低下、信頼性の低下、及びﾓｼﾞｭｰﾙの破損を引き起こ
すことがあります。
The main heat dissipation method of this converter is
to transfer its heat to the system board. Thus, if the
temperature of the system board goes high, even
with the low ambient temperature, it may exceed the
guaranteed temperature of components.
このｺﾝﾊﾞｰﾀの主な放熱方法は、ｼｽﾃﾑ基板へ自身の熱を逃がすという
ものです。このため、周囲温度が低くてもｼｽﾃﾑ基板の温度が高温にな
ると、使用部品の保証温度を超えることがあります。
Test Circuit
The test circuit setup shown in Fig. F was used to
obtain the output voltage ripple and output voltage
response to step load change. Fig. G was used to
obtain the input reflected ripple current waveforms.
図Fに示す試験回路は出力ﾘｯﾌﾟﾙ及び負荷急変の測定に使用してお
り、入力ﾘｯﾌﾟﾙの測定には図Gの試験回路を使用しています。
Vin
+
DC
Vin source
Cin
47μF
Ceramic
Capacitor
Vout
DC/DC
Converter
GND
http://www.fdk.com
Co
10μF
1μF
Ceramic
Capacitor
Ceramic
Capacitor
GND
Page 8 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
100
100
95
95
90
90
85
85
Efficiency [%]
Efficiency [%]
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
80
75
80
75
4.75Vin
5.0Vin
70
4.75Vin
5.0Vin
70
5.5Vin
5.5Vin
65
65
60
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.5
1.0
1.5
Current [A]
Fig.2: Efficiency vs. load current and input voltage for
3.465Vout
2.5
100
100
95
95
90
90
85
85
80
3.5
4.0
75
80
75
4.3Vin
3.0Vin
5.0Vin
70
5.0Vin
70
5.5Vin
65
5.5Vin
65
60
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.5
1.0
1.5
Current [A]
2.0
2.5
3.0
3.5
4.0
Current [A]
Fig.4: Efficiency vs. load current and input voltage for
2.5Vout
Fig.5: Efficiency vs. load current and input voltage for
1.8Vout
100
100
95
95
90
90
85
85
Efficiency [%]
Efficiency [%]
3.0
Fig.3: Efficiency vs. load current and input voltage for
3.3Vout
Efficiency [%]
Efficiency [%]
2.0
Current [A]
80
75
3.0Vin
5.0Vin
70
80
75
3.0Vin
5.0Vin
70
5.5Vin
5.5Vin
65
65
60
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
Current [A]
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Current [A]
Fig.6: Efficiency vs. load current and input voltage for
1.5Vout
http://www.fdk.com
0.5
Fig.7: Efficiency vs. load current and input voltage for
1.2Vout
Page 9 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
100
100
95
95
90
90
85
85
Efficiency [%]
Efficiency [%]
3.0Vin
80
75
3.0Vin
5.0Vin
70
5.0Vin
5.5Vin
80
75
70
5.5Vin
65
65
60
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
Current [A]
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Current [A]
Fig.8: Efficiency vs. load current and input voltage for
1.0Vout
Fig.9: Efficiency vs. load current and input voltage for
0.8Vout
Vin
Vout
Fig.10: Turn on delay time at 5.0Vin, 3.465V/4A out
Fig.11: Output ripple and noise at 5.0Vin, 3.465V/4Aout
Vout
Vout
Iout
Iout
Fig.12: Output voltage response to step load change at 5A/us
Fig.13: Output voltage response to step load change at 5A/us
from 50% to 100% (5.0Vin, 3.465Vout)
from 100% to 50% (5.0Vin, 3.465Vout)
http://www.fdk.com
Page 10 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Vin
Vout
Fig.14: Turn on delay time at 5.0Vin, 0.8V/4A out
Fig.15: Output ripple and noise at 5.0Vin, 0.8V/4Aout
Vout
Vout
Iout
Iout
Fig.16: Output voltage response to step load change at 5A/us
Fig.17: Output voltage response to step load change at 5A/us
from 50% to 100% (5.0Vin, 0.8Vout)
from 100% to 50% (5.0Vin, 0.8Vout)
http://www.fdk.com
Page 11 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Mechanical Drawing
Notes
- All dimensions are in millimeters (inches)
- Unless otherwise specified, tolerances are +/- 0.25mm
- Connector Finish: Gold over Nickel
- Converter Weight: 0.039oz (1.1g)
Terminal Connections
Function
Pin#
Vin
5
GND
6
REMOTE
7
NC
8
Pin#
1
2
3
4
Function
TRIM
POWER GOOD
GND
Vout
DK Series Part Numbering Scheme
Product
Series
Sub
Series
Nominal Input
Voltage
Mounting
Scheme
Output
Voltage
Rated
Current
ON/OFF
Logic
Option
1
Option
2
FP
DK
05
S
R80
04
P
S
V
Typ=5.0V
Surface Mount
0.8V
(Programmable:
See page 6)
4A
Positive
Standard
V: Standard
Series Name
http://www.fdk.com
Page 12 of 13
Ver 2.4 Nov.15, 2014
Delivering Next Generation Technology
Series
Data Sheet
FPDK05SR8004PSV
3.0-5.5Vdc Input, 4A, 0.8-3.465Vdc Output
Notes
Pattern design
- Please prohibit patterns other than 0V shield pattern the pattern drawing under the product considering the
interference etc. of the insulation failure and another circuit.
ﾊﾟﾀｰﾝ設計
・ 製品下面へのﾊﾟﾀｰﾝ引き回しは絶縁不良および他回路との干渉等を考慮して0Vｼｰﾙﾄﾞﾊﾟﾀｰﾝ以外のﾊﾟﾀｰﾝは禁
止してください。
NUCLEAR AND MEDICAL APPLICATIONS: FDK Corporation products are not authorized for use as critical
components in life support systems, equipment used in hazardous environments, or nuclear control systems
without the written consent of FDK Corporation.
核および医療のｱﾌﾟﾘｹｰｼｮﾝ： ＦＤＫ製品は生命維持装置、危険な環境に使用される設備、または核制御ｼｽﾃﾑにおい
てＦＤＫの承諾書なしでは重要な要素としての使用は認可されません。
CLEANSING : Cleansing of this converter is not recommended. When cleansing, determine a cleansing
condition on your own responsibility after confirming there is no impact on the characteristics/performance of the
converter.
洗浄： 本ｺﾝﾊﾞｰﾀの洗浄は推奨いたしません。 洗浄する場合の洗浄条件は、貴社様責任において本ｺﾝﾊﾞｰﾀの特性/
性能に影響が無い事を確認して決定してください。
SPECIFICATION CHANGES AND REVISIONS: Specifications are revision-controlled, but are subject to
change without notice.
仕様の変更と版数： 仕様は版数によって管理されていますが、予告なしで変更する場合がございます。
Storage Condition:
Sealed bag
Less than 40 degC
Less than 90%RH
Non Condensing
Storage Life
12 months
* MSL rating of this product is 2 (IPC/JEDEC J-STD-033)
Storage Temperature
Storage Humidity
Opened *
Less than 30 degC
Less than 60%RH
Non Condensing
12 months
保管条件:
保存温度
保存湿度
保存期限
* 本製品のMSLﾚｰﾃｨﾝｸﾞはﾚﾍﾞﾙ2です
http://www.fdk.com
未開封時
40℃以下
90%RH以下 (結露なきこと)
12ヶ月以内 (密封後)
(IPC/JEDEC J-STD-033)
Page 13 of 13
開封後 *
30℃以下
60%RH以下 (結露なきこと)
12ヶ月以内
Ver 2.4 Nov.15, 2014
工商网监
湘ICP备2023018690号
