IS31FL3736
12×8 DOTS MATRIX LED DRIVER WITH INDIVIDUAL AUTO BREATH FUNCTION
July 2017
GENERAL DESCRIPTION
FEATURES
The IS31FL3736 is a general purpose 12×8 LEDs
matrix driver with 1/12 cycle rate. The device can be
programmed via an I2C compatible interface. Each
LED can be dimmed individually with 8-bit PWM data
which allowing 256 steps of linear dimming.
IS31FL3736 features 3 Auto Breathing Modes which
are noted as ABM-1, ABM-2 and ABM-3. For each
Auto Breathing Mode, there are 4 timing characters
which include current rising / holding / falling / off time
and 3 loop characters which include Loop-Beginning /
Loop-Ending / Loop-Times. Every LED can be
configured to be any Auto Breathing Mode or NoBreathing Mode individually.
Supply voltage range: 2.7V to 5.5V
8 current source outputs for row control
12 switch current inputs for column scan control
Up to 96 LEDs (12×8) in dot matrix
Programmable12×8 (32 RGBs) matrix size with
de-ghost function
1MHz I2C-compatible interface
Selectable 3 Auto Breath Modes for each dot
Auto breath loop features interrupt pin inform
MCU auto breath loop completed
Auto breath offers 128 steps gamma current,
interrupt and statelookup registers
256 steps global current setting
Individual on/off control
Individual 256 PWM control steps
Individual Auto Breath Mode select
Individual open and short error detect function
Cascade for synchronization of chips
QFN-40 (5mm×5mm) package
Additionally each LED open and short state can be
detected, IS31FL3736 store the open or short
information in LED Open/Short Registers. The LED
Open/Short Registers allowing MCU to read out via
I2C compatible interface. Inform MCU whether there
are LEDs open or short and the locations of open or
short LEDs.
The IS31FL3736 operates from 2.7V to 5.5V and
features a very low shutdown and operational current.
APPLICATIONS
IS31FL3736 is available in QFN-40 (5mm×5mm)
package. It operates from 2.7V to 5.5V over the
temperature range of -40°C to +125°C.
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Mobile phones and other hand-held devices for
LED display
Gaming device (Keyboard, Mouse etc.)
LED in white goods application
1
IS31FL3736
TYPICAL APPLICATION CIRCUIT
Figure 1 Typical Application Circuit (12×8)
VCC
5V
*Note 2
22 F
10V
17
PVCC
VIO
VIO/MCU
31
0.47 F
0.47 F 0.1 F
23
CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8
PVCC
0.47 F 0.1 F
27
DVCC
28
AVCC
CS8
CS7
0.47 F 0.1 F
25
24
L
SW12
K
SW11
VIO/MCU
100k
1k
33
34
Micro
Controller
J
SW10
1k
37
38
39
100k 100k
CS2
SDA
SCL
CS1
16
15
I
SW9
H
SW8
IS31FL3736
INTB
SDB
SW12
IICRST
SW11
14
13
G
SW7
F
SW6
E
SW5
32
30
35
REXT
20k
36
40
SW2
SYNC
SW1
RSET
2
1
D
SW4
C
SW3
B
SW2
ADDR1
ADDR2
PGND
GND
AGND
4,11
26
A
SW1
1
2
3
4
5
6
7
8
Figure 2 Typical Application Circuit (RGB)
Note 1: For the mobile applications the IC should be placed far away from the mobile antenna in order to prevent the EMI.
Note 2: Electrolytic/Tantalum Capacitor may considerable for high current application to avoid audible noise interference.
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2
IS31FL3736
TYPICAL APPLICATION CIRCUIT (CONTINUED)
VBattery
VIO
100k
1k
ADDR1
ADDR2
ADDR2
SCL
INTB
ADDR1
SCL
ADDR2
ADDR1
ADDR2
SDA
SDA
SDA
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
SCL
SCL
SCL
INTB
INTB
SDB
IICRST
100k 100k
SDB
SDB
IICRST
SYNC
VBattery
IICRST
SDA
1k
SDA
Micro
Controller
ADDR1
SDB
IICRST
SYNC
VBattery
ADDR2
ADDR1
ADDR1
IICRST
INTB
SDB
IICRST
SDB
IICRST
SYNC
Slave 1
SYNC
ADDR2
IICRST
SDB
IICRST
Master
SYNC
INTB
VBattery
SDB
IICRST
IICRST
SYNC
Slave 2
SYNC
VBattery
ADDR2
SDA
IICRST
IICRST
SYNC
ADDR2
ADDR1
SCL
IICRST
IICRST
ADDR1
IICRST
SDA
SDA
SDA
SDA
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
INTB
SDB
SDB
INTB
Slave 4
SDB
SDB
INTB
Slave 5
SDB
SDB
Slave 3
INTB
Slave 6
SDB
SDB
Slave 7
Figure 3 Typical Application Circuit (Eight Parts Synchronization-Work)
Note 3: One part is configured as master mode, all the other 7 parts configured as slave mode. Work as master mode or slave mode specified
by Configuration Register (Function register, address 00h).Master part output master clock, and all the other partswhich work as slave input
this master clock.
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3
IS31FL3736
PIN CONFIGURATION
31 VIO
32 SYNC
33 SDA
34 SCL
35 ADDR1
36 ADDR2
37 INTB
38 SDB
26 AGND
SW5 6
25 CS8
SW6 7
24 CS7
SW7 8
23 PVCC
SW8 9
22 CS6
SW9 10
21 CS5
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NC 20
SW4 5
CS4 19
27 DVCC
CS3 18
PGND 4
PVCC 17
28 AVCC
CS2 16
SW3 3
CS1 15
29 NC
SW12 14
SW2 2
SW11 13
30 RSET
SW10 12
SW1 1
PGND 11
QFN-40
39 IICRST
Pin Configuration (Top View)
40 GND
Package
4
IS31FL3736
PIN DESCRIPTION
No.
Pin
Description
1~3,5~10,
12~14
SW1~SW12
Switch pin for LED matrix scanning.
4,11
PGND
Power GND.
15,16,18,19,
21,22,24,25
CS1~CS8
Current source.
17,23
PVCC
Power for current source.
20,29
NC
Not connected.
26
AGND
Analog GND.
27
DVCC
Power for digital circuits.
28
AVCC
Power for analog circuits.
30
RSET
Input terminal used to connect an external resistor.
This regulates current source DC current value.
31
VIO
Input logic reference voltage.
32
SYNC
Synchronize pin. It is used for more than one part
work synchronize. If it is not used please float this pin.
33
SDA
I2C compatible serial data.
34
SCL
I2C compatible serial clock.
35
ADDR1
I2C address setting.
36
ADDR2
I2C address setting.
37
INTB
Interrupt output pin. Register F0h sets the function of
the INTB pin and active low when the interrupt event
happens. Can be NC (float) if interrupt function no
used.
38
SDB
Shutdown the chip when pull to low.
39
IICRST
Reset I2C when pull high, need to pull down when
normal operation.
40
GND
Connect to GND.
Thermal Pad
Need to connect to GND pins.
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5
IS31FL3736
ORDERING INFORMATION
Industrial Range: -40°C to +125°C
Order Part No.
Package
QTY/Reel
IS31FL3736-QFLS4-TR
QFN-40, Lead-free
2500
Copyright © 2017 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use
in such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances
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6
IS31FL3736
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at any input pin
Maximum junction temperature,TJMAX
Storage temperature range, TSTG
Operating temperature range, TA=TJ
Thermal resistance, junction to ambient, θJA
ESD (HBM)
ESD (CDM)
-0.3V ~+6.0V
-0.3V ~ VCC+0.3V
+150°C
-65°C ~+150°C
-40°C ~ +125°C
24.96°C/W
±8kV
±1kV
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
The following specifications apply for VCC = 3.6V, TA = 25°C, unless otherwise noted.
Symbol
Max.
Unit
5.5
V
1.3
2.0
mA
VSDB=0V
2
5
VSDB=VCC, Configuration Register
written “0000 0000”
2
5
39
42
45
mA
3.06
3.3
3.53
mA
170
250
Current source headroom voltage
ISOURCE=42mA (Note 1)
CS1~C8
150
250
tSCAN
Period of scanning
128
µs
tNOL
Non-overlap blanking time during
scan, the SWy and CSx are all off
furring this time
8
µs
VCC
ICC/IQ
Parameter
Conditions
Supply voltage
Quiescent power supply current
Typ.
2.7
VSDB=VCC, all LEDs off
ISD
Shutdown current
IOUT
Maximum constant current of
CS1~CS8
RSET=20kΩ
ILED
Average current on each LED
ILED = IOUT/12.75
RSET=20kΩ, GCC=255,
PWM=255
Current sink headroom voltage
SW1~SW12
ISINK=336mA (Note 1, 2)
VHR
Min.
μA
mV
Logic Electrical Characteristics (SDA, SCL, ADDR1, ADDR2, SYNC, SDB)
VIL
Logic “0” input voltage
VIO=3.6V
GND
0.2VIO
V
VIH
Logic “1” input voltage
VIO=3.6V
0.75VIO
VIO
V
VHYS
Input Schmitt trigger hysteresis
VIO=3.6V
VOL
Logic “0” output voltage for SYNC IOL = 8mA
VOH
Logic “1” output voltage for SYNC IOH = 8mA
0.2
V
0.4
0.75VIO
V
V
IIL
Logic “0” input current
VINPUT = 0V (Note 3)
5
nA
IIH
Logic “1” input current
VINPUT = VIO (Note 3)
5
nA
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7
IS31FL3736
DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 3)
Symbol
Parameter
fSCL
Serial-clock frequency
tBUF
Bus free time between a STOP and a START
condition
Fast Mode
Min.
Typ.
Fast Mode Plus
Max. Min.
Typ.
Max.
Units
-
400
-
1000 kHz
1.3
-
0.5
-
μs
tHD, STA Hold time (repeated) START condition
0.6
-
0.26
-
μs
tSU, STA Repeated START condition setup time
0.6
-
0.26
-
μs
tSU, STO STOP condition setup time
0.6
-
0.26
-
μs
tHD, DAT Data hold time
-
-
-
-
μs
tSU, DAT Data setup time
100
-
50
-
ns
tLOW
SCL clock low period
1.3
-
0.5
-
μs
tHIGH
SCL clock high period
0.7
-
0.26
-
μs
tR
Rise time of both SDA and SCL signals,
receiving
-
300
-
120
ns
tF
Fall time of both SDA and SCL signals,
receiving
-
300
-
120
ns
Note 1: In case of REXT = 20kΩ, Global Current Control Register (PG3, 01h) written “1111 1111”, GCC = “1111 1111”.
Note 2: All LEDs are on and PWM=“1111 1111”, GCC = “1111 1111”.
Note 3: Guaranteed by design.
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8
IS31FL3736
FUNCTIONAL BLOCK DIAGRAM
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9
IS31FL3736
DETAILED DESCRIPTION
I2C INTERFACE
The IS31FL3736 uses a serial bus, which conforms to
the I2C protocol, to control the chip’s functions with
two wires: SCL and SDA. The IS31FL3736 has a 7-bit
slave address (A7:A1), followed by the R/W bit, A0.
Set A0 to “0” for a write command and set A0 to “1” for
a read command. The value of bits A1 and A2 are
decided by the connection of the ADDR1 pin. The
value of bits A3 and A4 are decided by the connection
of the ADDR2 pin.
The complete slave address is:
Table 1 Slave Address:
ADDR2 ADDR1
GND
GND
GND
GND
SCL
SCL
SCL
SCL
SDA
SDA
SDA
SDA
VCC
VCC
VCC
VCC
GND
SCL
SDA
VCC
GND
SCL
SDA
VCC
GND
SCL
SDA
VCC
GND
SCL
SDA
VCC
A7:A5
A4:A3
A2:A1
101
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
A0
The 8-bit chip address is sent next, most significant bit
first. Each address bit must be stable while the SCL
level is high.
After the last bit of the chip address is sent, the
master checks for the IS31FL3736’s acknowledge.
The master releases the SDA line high (through a
pull-up resistor). Then the master sends an SCL pulse.
If the IS31FL3736 has received the address correctly,
then it holds the SDA line low during the SCL pulse. If
the SDA line is not low, then the master should send a
“STOP” signal (discussed later) and abort the transfer.
Following acknowledge of IS31FL3736, the register
address byte is sent, most significant bit first.
IS31FL3736must generate another acknowledge
indicating that the register address has been received.
Then 8-bit of data byte are sent next, most significant
bit first. Each data bit should be valid while the SCL
level is stable high. After the data byte is sent, the
IS31FL3736 must generate another acknowledge to
indicate that the data was received.
0/1
ADDR1/2 connected to GND, (A2:A1)/(A4:A3)=00;
ADDR1/2 connected to VCC, (A2:A1)/(A4:A3)=11;
ADDR1/2 connected to SCL, (A2:A1)/(A4:A3)=01;
ADDR1/2 connected to SDA, (A2:A1)/(A4:A3)=10;
The SCL line is uni-directional. The SDA line is bidirectional (open-collector) with a pull-up resistor
(typically 1kΩ). The maximum clock frequency
specified by the I2C standard is 1MHz. In this
discussion, the master is the microcontroller and the
slave is the IS31FL3736.
The “STOP” signal ends the transfer. To signal
“STOP”, the SDA signal goes high while the SCL
signal is high.
ADDRESS AUTO INCREMENT
To write multiple bytes of data into IS31FL3736, load
the address of the data register that the first data byte
is intended for. During the IS31FL3736 acknowledge
of receiving the data byte, the internal address pointer
will increment by one. The next data byte sent to
IS31FL3736 will be placed in the new address, and so
on. The auto increment of the address will continue as
long as data continues to be written to IS31FL3736
(Figure 7).
READING OPERATION
Register FEh, F1h, 18h~47h of Page 0 and 11h of
Page 3 can be read.
To read the FEh and F1h, after IIC start condition, the
bus master must send the IS31FL3736 device
____
address with the R/W bit set to “0”, followed by the
register address (FEh or F1h) which determines which
register is accessed. Then restart I2C, the bus master
should send the IS31FL3736 device address with the
____
The timing diagram for the I2C is shown in Figure 4.
The SDA is latched in on the stable high level of the
SCL. When there is no interface activity, the SDA line
should be held high.
The “START” signal is generated by lowering the
SDAsignal while the SCL signal is high. The start
signal will alert all devices attached to the I2C bus to
check the incoming address against their own chip
address.
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R/W bit set to “1”. Data from the register defined by
the command byte is then sent from the IS31FL3736
to the master (Figure 8).
To read the 18h~47h of Page 0 and 11h of Page 3,
the FDh should write with 00h before follow the Figure
8 sequence to read the data, that means, when you
want to read 18h~47h of Page 0 and 11h of Page 3,
the FDh should point to Page 0 or Page 3 first and
then you can read the data.
10
IS31FL3736
Figure 4 Interface timing
Figure 5 Bit transfer
Figure 6 Writing to IS31FL3736 (Typical)
Figure 7 Writing to IS31FL3736 (Automatic address increment)
Figure 8 Reading from IS31FL3736
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11
IS31FL3736
REGISTER DEFINITION-1
Address
Name
Function
Table
R/W
Default
2
W
0000 0000
FDh
Command Register
Available Page 0 to Page 3 Registers
FEh
Command Register Write lock To lock/unlock Command Register
3
R/W
F0h
Interrupt Mask Register
Configure the interrupt function
4
W
F1h
Interrupt Status Register
Show the interrupt status
5
R
0000 0000
REGISTER CONTROL
Table 2 FDh Command Register (Write Only)
Data
Function
0000 0000
Point to Page 0 (PG0, LED Control Register is available)
0000 0001
Point to Page 1 (PG1, PWM Register is available)
0000 0010
Point to Page 2 (PG2, Auto Breath Mode Register is available)
0000 0011
Point to Page 3 (PG3, Function Register is available)
Others
Reserved
Note: FDh is locked when power up, need to unlock this register before write command to it. See Table 3 for detail.
TheCommand Register should be configured first after writing in the slave address to choose the available register. Then write data in the
choosing register. Power up default state is “0000 0000”.
For example, when write “0000 0001” in the Command Register (FDh), the data which writing after will be stored in the Auto breath mode
Register. Write new data can configure other registers.
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12
IS31FL3736
Table 3 FEh Command Register Write Lock
(Read/Write)
Table 5 F1h Interrupt Status Register
Bit
D7:D0
Name
CRWL
Default
0000 0000 (FDh write disable)
Bit
D7:D5
Name
-
Default
000
D4
D3
D2
ABM3 ABM2 ABM1
0
0
0
D1
D0
SB
OB
0
0
Show the interrupt status for IC.
To select the PG0~PG3, need to unlock this register
first, with the purpose to avoid misoperation of this
register.When FEh is written with 0xC5, FDh is
allowed to modify once, after the FDh is modified the
FEh will reset to be 0x00 at once.
ABM3 Auto Breath Mode 3 Finish Bit
0
ABM3 not finish
1
ABM3 finish
ABM2 Auto Breath Mode 2 Finish Bit
0
ABM2 not finish
1
ABM2 finish
CRWL Command Register Write Lock
0x00 FDh write disable
0xC5 FDh write enable once
Table 4 F0h Interrupt Mask Register
Bit
D7:D4
D3
D2
D1
D0
Name
-
IAC
IAB
IS
IO
Default
0000
0
0
0
0
Configure the interrupt function for IC.
IAC
Auto Clear Interrupt Bit
0
Interrupt could not auto clear
1
Interrupt auto clear when INTB stay low
exceeds 8ms
IAB
0
1
Auto Breath Interrupt Bit
Disable auto breath loop finish interrupt
Enable auto breath loop finish interrupt
IS
0
1
Dot Short Interrupt Bit
Disable dot short interrupt
Enable dot short interrupt
IO
0
1
Dot Open Interrupt Bit
Disable dot open interrupt
Enable dot open interrupt
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ABM1 Auto Breath Mode 1 Finish Bit
0
ABM1 not finish
1
ABM1 finish
SB
0
1
Short Bit
No short
Short happens
OB
0
1
Open Bit
No open
Open happens
13
IS31FL3736
REGISTER DEFINITION-2
Address
Name
Function
Table
R/W
Default
PG0 (0x00): LED Control Register
00h ~ 17h LED On/Off Register
Set on or off state for each LED
7
W
18h ~ 2Fh LED Open Register
Store open state for each LED
8
R
30h ~ 47h LED Short Register
Store short state for each LED
9
R
Set PWM duty for LED
10
W
0000 0000
11
W
xxxx xx00
0000 0000
PG1 (0x01): PWM Register
00h~BEh PWM Register
PG2 (0x02): Auto Breath Mode Register
00h~BEh Auto Breath ModeRegister Set operating mode of each dot
PG3 (0x03): Function Register
00h
Configuration Register
Configure the operation mode
13
W
01h
Global Current Control
Register
Set the global current
14
W
02h
Auto Breath Control
Register 1 of ABM-1
Set fade in and hold time for breath
function of ABM-1
15
W
03h
Auto Breath Control
Register 2 of ABM-1
Set the fade out and off time for breath
function of ABM-1
16
W
04h
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
17
W
05h
Auto Breath Control
Register 4 of ABM-1
Set loop characters of ABM-1
18
W
06h
Auto Breath Control
Register 1 of ABM-2
Set fade in and hold time for breath
function of ABM-2
15
W
07h
Auto Breath Control
Register 2 of ABM-2
Set the fade out and off time for breath
function of ABM-2
16
W
08h
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
17
W
09h
Auto Breath Control
Register 4 of ABM-2
Set loop characters of ABM-2
18
W
0Ah
Auto Breath Control
Register 1 of ABM-3
Set fade in and hold time for breath
function of ABM-3
15
W
0Bh
Auto Breath Control
Register 2 of ABM-3
Set the fade out and off time for breath
function of ABM-3
16
W
0Ch
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
17
W
0Dh
Auto Breath Control
Register 4 of ABM-3
Set loop characters of ABM-3
18
W
0Eh
Time Update Register
Update the setting of 02h ~ 0Dh registers
-
W
0Fh
SWy Pull-Up Resistor
Selection Register
Set the pull-up resistor for SWy
19
W
10h
CSx Pull-Down Resistor
Selection Register
Set the pull-down resistor for CSx
20
W
11h
Reset Register
Reset all register to POR state
-
R
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0000 0000
14
IS31FL3736
Table 6 Page 0 (PG0, 0x00): LED Control Register
LED Location
LED On/Off Register
LED Open Register
LED Short Register
SW1(CS1~ CS4)
SW1(CS5~ CS8)
00h
01h
18h
19h
30h
31h
SW2(CS1~ CS4)
SW2(CS5~ CS8)
02h
03h
1Ah
1Bh
32h
33h
SW3(CS1~ CS4)
SW3(CS5~ CS8)
04h
05h
1Ch
1Dh
34h
35h
SW4(CS1~ CS4)
SW4(CS5~ CS8)
06h
07h
1Eh
1Fh
36h
37h
SW5(CS1~ CS4)
SW5(CS5~ CS8)
08h
09h
20h
21h
38h
39h
SW6(CS1~ CS4)
SW6(CS5~ CS8)
0Ah
0Bh
22h
23h
3Ah
3Bh
SW7(CS1~ CS4)
SW7(CS5~ CS8)
0Ch
0Dh
24h
25h
3Ch
3Dh
SW8(CS1~ CS4)
SW8(CS5~ CS8)
0Eh
0Fh
26h
27h
3Eh
3Fh
SW9(CS1~ CS4)
SW9(CS5~ CS8)
10h
11h
28h
29h
40h
41h
SW10(CS1~ CS4)
SW10(CS5~ CS8)
12h
13h
2Ah
2Bh
42h
43h
SW11(CS1~ CS4)
SW11(CS5~ CS8)
14h
15h
2Ch
2Dh
44h
45h
SW12(CS1~ CS4)
SW12(CS5~ CS8)
16h
17h
2Eh
2Fh
46h
47h
Table 7-1 00h, 02h, ... 16h LED On/Off Register
(CS1~CS4)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
CCS4
-
CCS3
-
CCS2
-
CCS1
Default
0
0
0
0
0
0
0
0
Table 7-2 01h, 03h, ... 17h LED On/Off Register
(CS5~CS8)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
CCS8
-
CCS7
-
CCS6
-
CCS5
Default
0
0
0
0
0
0
0
0
The LED On/Off Registers store the on or off state of
each LED in the Matrix. For example, if 00h=0x01,
SW1-CS1 will open, if 01h=0x01, SW1-CS5 will
open.
CX-Y
0
1
LED State Bit
LED off
LED on
Table 8-1 18h, 1Ah, ... 2Eh LED Open Register
(CS1~CS4)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
OP4
-
OP3
-
OP2
-
OP1
Default
0
0
0
0
0
0
0
0
Table 8-2 19h, 1Bh, ... 2Fh LED Open Register
(CS5~CS8)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
OP8
-
OP7
-
OP6
-
OP5
Default
0
0
0
0
0
0
0
0
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The LED Open Registers store the open or normal
state of each LED in the Matrix. For example, 18h
store SW1-CS1's open or normal state, 19h store
SW1-CS5's open or normal state.
OPx
0
1
LED Open Bit
LED normal
LED open
Table 9-1 30h, 32h, ... 46h LED Short Register
(CS1~CS4)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
ST4
-
ST3
-
ST2
-
ST1
Default
0
0
0
0
0
0
0
0
Table 9-2 31h, 33h, ... 47h LED Short Register
(CS5~CS8)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
-
ST8
-
ST7
-
ST6
-
ST5
Default
0
0
0
0
0
0
0
0
The LED Short Registers store the short or normal
state of each LED in the Matrix. For example, 30h
store SW1-CS1's short or normal state, 31h store
SW1-CS5's short or normal state.
STx
0
1
LED Short Bit
LED normal
LED short
15
IS31FL3736
Page 1 (PG1, 0x01): PWM Register
Figure 9 PWM Register
Where Duty is the duty cycle of SWy,
Table 10 00h ~ BEh PWM Register
Bit
D7:D0
Name
PWM
Default
0000 0000
Duty
PWM
I OUT Duty
256
PWM
7
D [n ] 2
n
n 0
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(2)
IOUT is the output current of CSx (x=1~8),
Each dot has a byte to modulate the PWM duty in
256 steps.
The value of the PWM Registers decides the
average current of each LED noted ILED.
ILED computed by Formula (1):
I LED
128s
1
1
128s 8s 12 12.75
(1)
IOUT
840 GCC
REXT 256
(3)
GCC is the Global Current Control register (PG3,
01h) value and REXT is the external resistor of RSET
pin. D[n] stands for the individual bit value, 1 or 0, in
location n.
For example: if D7:D0=10110101 (0xB5, 181),
GCC=255. REXT=20kΩ (IOUT=42mA),
I LED
20 22 24 25 27
1
I OUT
2 .34 mA
256
12 .75
16
IS31FL3736
Page 2 (PG2, 0x02): Auto Breath Mode Register
Figure 10 Auto Breath Mode Selection Register
Table 11 00h ~ BEh Auto Breath Mode Register
Bit
D7:D2
D1:D0
Name
-
ABMS
Default
-
00
The Auto Breath Mode Register sets operating mode
of each dot.
ABMS
00
01
10
11
Auto Breath Mode Selection Bit
PWM control mode
Select Auto Breath Mode 1 (ABM-1)
Select Auto Breath Mode 2 (ABM-2)
Select Auto Breath Mode 3 (ABM-3)
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17
IS31FL3736
Table 12 Page 3 (PG3, 0x03): Function Register
Register
Name
Function
R/W
00h
Configuration Register
Configure the operation mode
W
01h
Global Current Control
Register
Set the global current
W
02h
Auto Breath Control
Register 1 of ABM-1
Set fade in and hold time for breath function of
ABM-1
W
03h
Auto Breath Control
Register 2 of ABM-1
Set the fade out and off time for breath function
of ABM-1
W
04h
Auto Breath Control
Register 3 of ABM-1
Set loop characters of ABM-1
W
05h
Auto Breath Control
Register 4 of ABM-1
Set loop characters of ABM-1
W
06h
Auto Breath Control
Register 1 of ABM-2
Set fade in and hold time for breath function of
ABM-2
W
07h
Auto Breath Control
Register 2 of ABM-2
Set the fade out and off time for breath function
of ABM-2
W
08h
Auto Breath Control
Register 3 of ABM-2
Set loop characters of ABM-2
W
09h
Auto Breath Control
Register 4 of ABM-2
Set loop characters of ABM-2
W
0Ah
Auto Breath Control
Register 1 of ABM-3
Set fade in and hold time for breath function of
ABM-3
W
0Bh
Auto Breath Control
Register 2 of ABM-3
Set the fade out and off time for breath function
of ABM-3
W
0Ch
Auto Breath Control
Register 3 of ABM-3
Set loop characters of ABM-3
W
0Dh
Auto Breath Control
Register 4 of ABM-3
Set loop characters of ABM-3
W
0Eh
Time Update Register
Update the setting of 02h ~ 0Dh registers
W
0Fh
SWy Pull-Up Resistor
Selection Register
Set the pull-up resistor for SWy
W
10h
CSx Pull-Down Resistor
Selection Register
Set the pull-down resistor for CSx
W
11h
Reset Register
Reset all register to POR state
R
Default
0000
0000
Table 13 00h Configuration Register
Bit
D7:D6
D5:D3
D2
D1
D0
Name
SYNC
-
OSD
B_EN
SSD
Default
00
000
0
0
0
The Configuration Register sets operating mode of
IS31FL3736.
When SYNC bits are set to “01”, the IS31FL3736 is
configured as the master clock source and the
SYNC pin will generate a clock signal distributed to
the clock slave devices.To be configured as a clock
slave deviceand accept an external clock input the
slave device’s SYNC bits must be set to “10”.
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When OSD set high, open/short detection will be
trigger once, the user could trigger OS detection
again by set OSD from 0 to 1.
When B_EN enable, those dots select working in
ABM-x mode will start to run the pre-established
timing. If it is disabled, all dots work in PWM mode
following Figure 16 to enable the Auto Breath Mode.
When SSD is “0”, IS31FL3736 works in software
shutdown mode and to normal operate the SSD bit
should set to “1”.
18
IS31FL3736
SYNC
00/11
01
10
Synchronize Configuration
High Impedance
Master
Slave
OSD
0
1
Open/Short Detection Enable Bit
Disable open/short detection
Enable open/short detection
B_EN Auto Breath Enable
0
PWM Mode Enable
1
Auto Breath Mode Enable
Software Shutdown Control
Software shutdown
Normal operation
SSD
0
1
Table 14 01h Global Current Control Register
Bit
D7:D0
Name
GCCx
Default
0000 0000
The Global Current Control Register modulates all
CSx (x=1~8) DC current which is noted as IOUT in
256 steps.
IOUT is computed by the Formula (3):
840 GCC
I OUT
REXT 256
GCC
(3)
T2
0000
0001
0010
0011
0100
0101
0110
0111
1000
Others
T2 Setting
0s
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
Unavailable
Table 16 03h, 07h, 0Bh Auto Breath Control
Register 2 of ABM-x
Bit
D7:D5
D4:D1
D0
Name
T3
T4
-
Default
000
0000
0
n
n0
Where D[n] stands for the individual bit value, 1 or 0,
in location n, REXT is the external resistor of RSET pin.
For example: if D7:D0=10110101,
IOUT
T1 Setting
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
Auto Breath Control Register 2 set the T3&T4 time in
Auto Breath Mode.
7
D[ n ] 2
T1
000
001
010
011
100
101
110
111
20 22 24 25 27 840
REXT
256
Table 15 02h, 06h, 0Ah Auto Breath Control
Register 1 of ABM-x
Bit
D7:D5
D4:D1
D0
Name
T1
T2
-
Default
000
0000
0
Auto Breath Control Register 1 set the T1&T2 time in
Auto Breath Mode.
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T3
000
001
010
011
100
101
110
111
T3 Setting
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
T4
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
Others
T4 Setting
0s
0.21s
0.42s
0.84s
1.68s
3.36s
6.72s
13.44s
26.88s
53.76s
107.52s
Unavailable
19
IS31FL3736
Table 17 04h, 08h, 0Ch Auto Breath Control
Register 3 of ABM-x
Table 18 05h, 09h, 0Dh Auto Breath Control
Register 4 of ABM-x
Bit
D7:D6
D5:D4
D3:D0
Bit
D7:D0
Name
LE
LB
LTA
Name
LTB
Default
00
00
0000
Default
0000 0000
Total loop times= LTA×256 + LTB.
For example, if LTA=2, LTB=100, the total loop times
is 256×2+100=612 times.
For the counting of breathing times, do follow Figure
16 to enable the Auto Breath Mode.
If the loop start from T4,
T4->T1->T2->T3(1)->T4->T1->T2->T3(2)->T4->T1>...and so on.
If the loop not start from T4,
Tx->T3(1) ->T4->T1->T2->T3(2)->T4-> T1->...and
so on.
If the loop ends at off state(End of T3), the LED will
be off state at last. If the loop ends at on state(End
of T1), the LED will run an extra T4&T1, which are
not included in loop.
LB
00
01
10
11
Loop Beginning Time
Loop begin from T1
Loop begin from T2
Loop begin from T3
Loop begin from T4
LE
00
01
Loop End Time
Loop end at off state (End of T3)
Loop end at on state (End of T1)
LTA
0000
0001
0010
…
1111
8-11 Bits Of Loop Times
Endless loop
1
2
…
15
Total loop times= LTA×256+LTB.
For example, if LTA=2, LTB=100, the total loop times
is 256×2+100=612 times.
LTB
0000 0000
0000 0001
0000 0010
…
1111 1111
0-7 Bits Of Loop Times
Endless loop
1
2
…
255
0Eh Time Update Register (02h~0Dh)
The data sent to the time registers (02h~0Dh) will be
stored in temporary registers. A write operation of
“0000 0000” data to the Time Update Register is
required to update the registers (02h~0Dh). Please
follow Figure 16 to enable the Auto Breath mode and
update the time parameters.
Table 19 0Fh SWy Pull-Up Resistor Selection
Register
Bit
D7:D3
D2:D0
Name
-
PUR
Default
00000
000
Set pull-up resistor for SWy.
PUR
000
001
010
011
100
101
110
111
SWy Pull-up Resistor Selection Bit
No pull-up resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
Figure 11 Auto Breathing Function
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20
IS31FL3736
Table 20 10h CSx Pull-Down Resistor Selection
Register
Bit
D7:D3
D2:D0
Name
-
PDR
Default
00000
000
11h Reset Register
Once user read the Reset Register, IS31FL3736 will
reset all the IS31FL3736 registers to their default
value. On initial power-up, the IS31FL3736 registers
are reset to their default values for a blank display.
Set the pull-down resistor for CSx.
PDR
000
001
010
011
100
101
110
111
CSx Pull-down Resistor Selection Bit
No pull-down resistor
0.5kΩ
1.0kΩ
2.0kΩ
4.0kΩ
8.0kΩ
16kΩ
32kΩ
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21
IS31FL3736
APPLICATION INFORMATION
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
SW9
SW10
SW11
SW12
CS1
00h
10h
20h
30h
40h
50h
60h
70h
80h
90h
A0h
B0h
00h
0Eh
1Eh
2Eh
3Eh
4Eh
5Eh
6Eh
7Eh
8Eh
9Eh
AEh
BEh
0Eh
CS8
tSCAN=128µs
tNOL=8µs
Scanning cycle T=1.632ms((128+8)×12)
De-Ghost time
PWM Duty is variable from 0/256~255/256
IOUT=840/REXT×GCC/256
(GCC=0~255)
Figure 12 Scanning Timing
SCANING TIMING
PWM CONTROL
As shown in Figure 12, the SW1~SW12 is turned on
by serial, LED is driven 8 by 8 within the SWy (y=1~12)
on time (SWy, y=1~12) is sink and pull low when LED
on) , including the non-overlap blanking time during
scan, the duty cycle of SWy (active low, y=1~12) is:
After setting the IOUT and GCC, the brightness of each
LEDs (LED average current (ILED)) can be modulated
with 256 steps by PWM Register, as described in
Formula (1).
128s
1
1
Duty
128s 8s 12 12.75
(2)
Where 128μs is tSCAN, the period of scanning and 8μs
is tNOL, the non-overlap time.
EXTERNAL RESISTOR (REXT)
The output current for each CSx can be can be set by
a single external resistor, REXT, as described in
Formula (3).
840 GCC
I OUT
REXT 256
(3)
I LED
PWM
I OUT Duty
256
(1)
Where PWM is PWM Registers (PG1, 00h~BFh) data
showing in Table 10.
For example, in Figure 1, REXT = 20kΩ,if PWM=255,
and GCC=255, then
I LED
255
840
255
1
3 .29 mA
256 20 k 256 12 .75
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
GCC is Global Current Control Register (PG3, 01h)
data showing in Table 14.
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22
IS31FL3736
LED AVERAGE CURRENT (ILED)
As described in Formula (1), the LED average current
(ILED) is effected by 3 factors:
1. REXT, resistor which is connected RSET pin and
GND. REXT sets the current of all CSx (x=1~8) based
on Formula (3).
2. Global Current Control Register (PG3, 01h). This
register adjusts all CSx (x=1~8) output currents by 256
steps as shown in Formula (3).
Choosing more gamma steps provides for a more
continuous looking breathing effect. This is useful for
very long breathing cycles. The recommended
configuration is defined by the breath cycle T. When
T=1s, choose 32 gamma steps, when T=2s, choose
64 gamma steps. The user must decide the final
number of gamma steps not only by the LED itself,
but also based on the visual performance of the
finished product.
Table 22 64 Gamma Steps with 256 PWM Steps
3. PWM Registers (PG1, 00h~BFh), every LED has an
own PWM register. PWM Registers adjust individual
LED average current by 256 steps as shown in
Formula (1).
C(0)
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
0
1
2
3
4
5
6
7
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
8
10
12
14
16
18
20
22
GAMMA CORRECTION
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
24
26
29
32
35
38
41
44
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
47
50
53
57
61
65
69
73
C(32)
C(33)
C(34)
C(35)
C(36)
C(37)
C(38)
C(39)
In order to perform a better visual LED breathing effect
we recommend using a gamma corrected PWM value
to set the LED intensity. This results in a reduced
number of steps for the LED intensity setting, but
causes the change in intensity to appear more linear to
the human eye.
Gamma correction, also known as gamma
compression or encoding, is used to encode linear
luminance to match the non-linear characteristics of
display. Since the IS31FL3736 can modulate the
brightness of the LEDs with 256 steps, a gamma
correction function can be applied when computing
each subsequent LED intensity setting such that the
changes in brightness matches the human eye's
brightness curve.
77
81
85
89
94
99
104
109
C(40)
C(41)
C(42)
C(43)
C(44)
C(45)
C(46)
C(47)
114
119
124
129
134
140
146
152
C(48)
C(49)
C(50)
C(51)
C(52)
C(53)
C(54)
C(55)
158
164
170
176
182
188
195
202
C(56)
C(57)
C(58)
C(59)
C(60)
C(61)
C(62)
C(63)
209
216
223
230
237
244
251
255
256
224
Table 21 32 Gamma Steps with 256 PWM Steps
192
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
0
1
2
4
6
10
13
18
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
22
28
33
39
46
53
61
69
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
64
78
86
96
106
116
126
138
149
32
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
161
173
186
199
212
226
240
255
PWM Data
C(0)
160
128
96
0
0
8
16
32
40
48
56
64
Intensity Steps
256
Figure 14 Gamma Correction (64 Steps)
224
Note: The data of 32 gamma steps is the standard value and the
data of 64 gamma steps is the recommended value.
192
PWM Data
24
160
OPERATING MODE
128
96
Each dot of IS31FL3736 has twoselectable operating
modes, PWM Mode and Auto Breath Mode.
64
PWM Mode
32
0
0
4
8
12
16
20
24
28
Intensity Steps
Figure 13 Gamma Correction (32 Steps)
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32
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “00”, or disable the B_EN
bit of Configure Register (PG3, 00h), the IS31FL3736
operates in PWM Mode.The brightness of each LED
can be modulated with 256 steps by PWM registers.
23
IS31FL3736
For example, if the data in PWM Register is “0000
0100”, then the PWM is the fourth step.
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
Auto Breath Mode
By setting the B_EN bit of the Configuration Register
(PG3, 00h) to “1”, breath function enables. When set
the B_EN bit to “0”, breath function disables.
By setting the Auto Breath Mode Register bits of the
Page 2 (PG2, 00h~BFh) to “01” (ABM-1), “10” (ABM-2)
or“11” (ABM-3), the IS31FL3736 operates in Auto
Breath Mode.
IS31FL3736 has three auto breath modes, Auto Breath
Mode 1, Auto Breath Mode 2 and Auto Breath Mode 3.
Each ABM has T1, T2, T3 and T4, as shown below:
OPEN/SHORT DETECT FUNCTION
IS31FL3736 has open and short detect bit for each
LED.
By setting the OSD bit of the Configuration Register
(PG3,00h) from "0" to “1”, the LED Open Register and
LED Short Register will start to store the open/short
information and after at least 2 scanning cycle
(3.264ms) the MCU can get the open/short
information by reading the 18h~2fh/30h~47h, for
those dots are turned off via LED On/Off Registers
(PG0, 00h~17h), the open/short data will not get
refreshed when setting the OSD bit of the
Configuration Register (PG3, 00h) from "0" to “1”.
The Global Current Control Register (PG3, 01h) need
to set to 0x01 in order to get the right open/short data.
The detect action is one-off event and each time
before reading out the open/short information, the
OSD bit of the Configuration Register (PG3, 00h)
need to be set from "0" to “1” (clear before set
operation).
INTERRUPT CONTROL
Figure 15 Auto Breathing Function
T1/T3 is variable from 0.21s to 26.88s, T2/T4 is
variable from 0s to 26.88s, for each loop, the start
point can be T1~T4 and the stop point can be on state
(T2) and off state (T4), also the loop time can be set to
1~212 times or endless. Each LED can select ABM1~ABM-3 to work.
The setting of ABM-1~ABM-3 (PG2, 02h~0Dh) need to
write the 0Eh in PG3 to update before effective.
IS31FL3736has an INTB pin, by setting the Interrupt
Mask Register (F0h), it can be the flag of LED open,
LED short or the finish flag of ABM-1, ABM-2, and
ABM-3.
For example, if the IO bit of the Interrupt Mask
Register (F0h) set to “1”, when LED open happens,
the INTB will pull be pulled low and the OB bit of
Interrupt Status Register (F1h) will store open status
at the same time.
The INTB pin will be pulled high after reading the
Interrupt Status Register (F1h) operation or it will be
pulled high automatically after it stays low for 8ms
(Typ.) if the IAC bit of Interrupt Mask Register (F0h) is
set to “1”. The bits ofInterrupt Status Register (F1h)
will be reset to “0” after INTB pin pulled high.
SYNCHRONIZE FUNCTION
SYNC bits of the Configuration Register (PG3, 00h)
sets SYNC pin input or output synchronize clock
signal. It is used for more than one part working
synchronize. When SYNC bitsare set to “01”, SYNC
pin output synchronize clock to synchronize other
parts as master. When SYNC bitsare set to “10”,
SYNC pin input synchronize clock and work
synchronization with this input signal as slave. When
SYNC bits are set to “00/11”, SYNC pin is high
impedance, and synchronize function is disabled.
SYNC bit default state is “00” and SYNC pin is high
impedance when power up.
Figure 16 Enable Auto Breath mode
If not follow this flow, first loop’s start point may be
wrong.
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Rev. C, 07/04/2017
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IS31FL3736
DE-GHOST FUNCTION
The “ghost” term is used to describe the behavior of an
LED that should be OFF but instead glows dimly when
another LED is turned ON. A ghosting effect typically
can occur when multiplexing LEDs. In matrix
architecture any parasitic capacitance found in the
constant-current outputs or the PCB traces to the
LEDs may provide sufficient current to dimly light an
LED to create a ghosting effect.
To prevent this LED ghost effect, the IS31FL3736 has
integrated pull-up resistors for each SWy (y=1~12) and
pull-down resistors for each CSx (x=1~8). Select the
right SWy pull-up resistor (PG3, 0Fh) and CSx pulldown resistor (PG3, 10h) which eliminates the ghost
LED for a particular matrix layout configuration.
Typically, selecting the 32kΩ will be sufficient to
eliminate the LED ghost phenomenon.
The SWy pull-up resistors and CSx pull-down resistors
are active only when the CSx/SWy outputs are in the
OFF state and therefore no power is lost through these
resistors.
P3736=IPVCC×PVCC+ IQ×DVCC(AVCC)-IPVCC×VF(AVR) (4)
≈IPVCC×PVCC - IPVCC×VF(AVR)
≈IPVCC×(PVCC - VF(AVR))
Where IPVCC is the current of PVCC and VF(AVR) is the
average forward of all the LED.
For example, if REXT=20kΩ, GCC=255, PWM=255,
PVCC=5V,
VF(AVR)=3.5V@42mA,
then
the
IPVCC=42mA×8×12/12.75=316.25mA.
P3736=316.25mA×(5V-3.5V)=0.474W
When operating the chip at high ambient
temperatures, or when driving maximum load current,
care must be taken to avoid exceeding the package
power dissipation limits. The maximum power
dissipation can be calculated using the following
Equation (5):
PD ( MAX )
PD ( MAX )
So,
IIC RESET
The IIC will be reset if the IICRST pin is pull-high,
when normal operating the IIC bus, the IICRST pin
need to keep low.
By setting SSD bit of the Configuration Register (PG3,
00h) to “0”, the IS31FL3736 will operate in software
shutdown mode. When the IS31FL3736 is in software
shutdown, all current sources are switched off, so that
the matrix is blanked. All registers can be operated.
Typical current consume is 3μA.
Hardware Shutdown
125 C 25 C
4W
24.96 C / W
5
QFN-40
Power Dissipation (W)
Software Shutdown
(5)
Figure 17, shows the power derating of the
IS31FL3736 on a JEDEC boards (in accordance with
JESD 51-5 and JESD 51-7) standing in still air.
SHUTDOWN MODE
Shutdown mode can be used as a means of reducing
power consumption. During shutdown mode all
registers retain their data.
125C 25C
RJA
4
3
2
1
0
-40
-25
-10
5
20
35
50
65
80
95
110 125
The chip enters hardware shutdownwhen the SDB pin
is pulled low. All analog circuits are disabled during
hardware shutdown, typical the current consume is
3μA.
LAYOUT
The chip releases hardware shutdown when the SDB
pin is pulled high. During hardware shutdown state
Function Register can be operated.
As described in external resistor (REXT), the chip
consumes lots of power. Please consider below
factors when layout the PCB.
If VCC has risk drop below 1.75V but above 0.1V during
SDB pulled low, please re-initialize all Function
Registers before SDB pulled high.
1. The VCC (PVCC, DVCC, AVCC, VIO) capacitors
need to close to the chip and the ground side should
well connected to the GND of the chip.
POWER DISSIPATION
2. REXT should be close to the chip and the ground
side should well connect to the GND of the chip.
The power dissipation of the IS31FL3736 can
calculate as below:
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Rev. C, 07/04/2017
Temperature (°C)
Figure 17 Dissipation Curve
3. The thermal pad should connect to ground pins and
the PCB should have the thermal pad too, usually this
25
IS31FL3736
pad should have 16 or 25 via thru the PCB to other
side’s ground area to help radiate the heat. About the
thermal pad size, please refer to the land pattern of
each package.
4. The CSx pins maximum current is 42mA
(REXT=20kΩ), and the SWy pins maximum current is
336mA (REXT=20kΩ), the width of the trace, SWy
should have wider trace then CSx.
5. In the middle of SDA and SCL trace, a ground line is
recommended to avoid the effect between these two
lines.
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Rev. C, 07/04/2017
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IS31FL3736
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 18 Classification Profile
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IS31FL3736
PACKAGE INFORMATION
QFN-40
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Rev. C, 07/04/2017
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IS31FL3736
RECOMMENDED LAND PATTERN
QFN-40
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
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Rev. C, 07/04/2017
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IS31FL3736
REVISION HISTORY
Revision
Detail Information
Date
0A
Initial release
2016.05.09
0B
1 Correct a spell mistake in page 1
2 Update figure 1 and figure 2
3 Update I2C READING OPERATION section and figure 8
2016.07.20
A
Update EC table, add IOUT and VHR and limit, release to product
2016.08.01
B
1. Update READING OPERATION
2. Correct error of REGISTER DEFINITION-2 and Table 12
2017.01.12
C
1. Update POD
2. Update land pattern
2017.07.04
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