NJW4350E2-TE2

NJW4350 UNIPOLAR STEPPER MOTOR DRIVER GENERAL DESCRIPTION The NJW4350 is a high efficiency DMOS unipolar stepper motor driver IC. Low Ron DMOS driver realizes high power efficiency and low heat generation of a stepper motor application. The motor can be controlled by step and direction pulse input which makes the programming task of a micro controller simple and easy. Enhanced control feature, Motor Origin output, INH and RESET, make the NJW4350 applicable for a wide range of stepper motor applications. PACKAGE OUTLINE NJW4350D ( DIP16) NJW4350E2 ( SOP16-E2 ) FEATURES Wide Voltage Range 5 to 50V Low RON=0.9 typ.@Io= 500mA(U&L) STEP & DIR input Operation Half / Full Step Operation RESET Function Output Power Save Function (INH) Motor Origin Monitor Output (MO) Thermal Shutdown Circuit BCD Process Technology Package Outline DIP16 SOP16-E2 JEDEC 300mil PIN CONNECTION 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 1. 2. 3. 4. 5. 6. 7. 8. PB1 PB2 PGND PA1 PA2 DIR STEP NC 16. 15. 14. 13. 12. 11. 10. 9. VDD MO SGND NC RESET INH HSM NC ( DIP16 / SOP16 ) Fig.1 Pin Configuration -1- NJW4350 IDD BLOCK DIAGLAM VDD NJW4350 POWER ON RESET VMM IPLEAK IO PB1 IIH IIL PB2 STEP PA1 DIR HSM PA2 PHASE LOGIC CIRCUIT VP VDD RESET INH VIN VIH VIL VDD IMOLEAK IMO MO Thermal Shut Down VMO SGND PGND Fig.2 Brock Diagram PIN DESCRIPTION -2- Pin 1 2 3 4 5 6 7 Pin name PB1 PB2 PGND PA1 PA2 DIR STEP 8 9 10 NC NC HSM 11 12 13 14 15 16 INH RESET NC SGND MO VDD Description B1 phase output with a maximum 1500 mA sinking open collector output B2 phase output with a maximum 1500 mA sinking open collector output Power ground terminal of motor supply VMM A1 phase output with a maximum of 1500 mA sinking open collector A2 phase output with a maximum of 1500 mA sinking open collector Direction command input for determining motor turning direction Motor stepping pulse input, phase logic operation triggered by negative edge of STEP signal Not connected Not connected Half/full step mode switching input H level in full step mode and L level in half step mode Phase output off input, all phase output is off at H level External reset signal input terminal Not connected Logic ground terminal of logic supply VDD Phase output initial status detection output Logic unit power supply voltage terminal NJW4350 ABSOLUTE MAXIMUM RATINGS PARAMETER RATINGS Maximum supply voltage Logic supply voltage Output current Peak output current Logic Input Voltage MO output current Operating temperature Storage temperature Total power dissipation 55 7.0 0.7 1.5 -0.3 ~ VDD+0.3 -20 -40 ~ +85 -50 ~ +150 1.6(DIP) 1.3(SOP) RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL (Ta=25 C) NOTE SYMBOL (unit) Vmm (V) VDD (V) Io(A) Io(A) VID(V) IMO(mA) Topr ( C) Tstg ( C) PD (W) TEST CONDITION MIN. (Ta=25 C) TYP. MAX. UNIT Logic voltage range VDD 4.5 5.0 5.5 V Motor voltage VMM 5 - 50 V Junction temperature range Tj -40 - 125 C Output current IO - - 0.5 A Setup time ts - 0.5 - s Step pulse hold time tp - 1.0 - s -3- NJW4350 ERECTRICAL CHARACTERISTICS PARAMETER SYMBOL TEST CONDITION MIN. (Ta=25 C, VS=15V) TYP. MAX. UNIT GENERAL Quiescent current IDD Thermal shutdown TSD Thermal shutdown hysteresis THYS Input H voltage STEP, DIR, HSM, RESET, INH Terminal High- - 2.0 3.0 mA - 180 - C - - 50 - C VIH - 3.5 - - V Input L voltage VIL - - - 1.5 V Input current (High) IIH VIN=High - 0.1 0.5 A Input current (Low) IIL VIN=Low 50 100 200 A IMO=10mA - 0.3 0.5 V VMO=7V - 0.1 0.5 A LOGIC MO output saturation voltgea VMO MO output leak current IMO LEAK OUTPUT Output resistance RONL Io=500mA - 0.9 - Output leak current IP LEAK VP=50V - 1.0 5.0 A Output turn ON time TON Io= 500mA,L=1mH - 100 - ns Output turn OFF time TOFF Io= 500mA,L=1mH 100 HSM,DIR VDD GND time STEP,RESET VDD GND PA1,PA2,PB1,PB2 tS time tP IO GND tON /tOFF Fig.3 Timing Chart -4- time ns NJW4350 VM C - 10uF 5V OPTIONAL SENSOR CMOS IO Device STEP STEP DIR HALF/FULL HSM R2 VDD MO CW/CCW RESET R1 MOTOR NJW4350 RESET PB2 PB1 NORMAL/INHBIT INH PA1 PA2 GND SGND PGND GND(VDD) D1-D4 11DF2or31DF2 Nihon Inter Ele. GND(VMM) Fig.4 Application Circuit Function description The NJW4350 is a high-performance low-voltage driver system for driving stepping motors with unipolar winding. Employing a general-purpose STEP&DIR motion controller, it can easily control a stepping motor when combined with a pulse generator. The phase output is as high as 55 V max. This prevents the phase output voltage margin of the motor from being exceeded, which is a common problem with unipolar winding systems and also simplifies the design of power control circuits during phase turn off. Logic input All inputs are LS-TT compatible. When the logic input is open, the circuit recognizes any open logic inputs as H level. The NJW4350 has built-in phase logic for optimum control of the stepping motor. STEP – Stepping pulse The built-in phase logic sequencer goes UP on every negative edge of the STEP signal (pulse). In full step mode, the pulse turns the stepping motor at the basic step angle. In half step mode, two pulses are required to turn the motor at the basic step angle. The DIR (direction) signal and HSM (half/full mode) are latched to the STEP negative edge and must therefore be established before the start of the negative edge. Note the setup time ts in Figure 3. DIR – direction The DIR signal determines the step direction. The direction of the stepping motor depends on how the NJW4350 is connected to the motor. Although DIR can be modified this should be avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. See the timing chart in Figure 3. HSM – half/full step mode switching This signal determines whether the stepping motor turns at half step or full step mode. The built-in phase logic is set to the half step mode when HSM is low level. Although HSM can be modified this should be avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. See the timing chart in Figure 3. -5- NJW4350 INH – phase output off All phase output is turned off when INH goes high reducing power consumption (consumption current). RESET A two-phase stepping motor repeats the same winding energizing sequence every angle that is a multiple of four of the basic step. The phase logic sequence is repeated every four pulses in the full step mode and every eight pulses in the half step mode. RESET forces to initialize the phase logic to sequence start mode. When RESET is at L level, the phase logic is initialized and the phase output is turned off. When RESET recovers to H level, the phase output resumes the energizing pattern output at sequence start of phase logic. Refer to Figure 5 for a reset timing chart. POR – power on and reset function The internal power-on and reset circuit, which is connected to Vcc, resets the phase logic and turns off phase output when the power is supplied to prevent missteps. Each time the power is turned on, the energizing pattern of phase logic at sequence start is output. Phase output unit The phase output unit is composed of four open collector transistors that are directly connected to the stepping motor as shown in Figure 4. MO – origin monitor At sequence start of the phase logic or after POR or external RESET, an L level output is made to indicate to external devices that the energizing sequence is in initial status. Vcc approx 3.0V 4.0V STEP RESET PB1/PA1 PB2/PA Normal sequence POR function Phase output OFF Normal sequence After internal phase logic initialize output Fig.5 POR and external reset timing -6- NJW4350 POR DIR 1 2 3 4 1 2 3 4 1 H INH L HSM H STEP H STEP PB1 PB2 PA1 PA2 PB1 OFF PB2 ON PA1 OFF PA2 ON MO ON POR DIR L HSM H STEP H 1 2 3 4 1 2 3 4 3 4 OFF ON ON OFF ON OFF ON OFF ON OFF OFF ON OFF ON OFF ON 1 STEP PB1 PB2 PA1 PA2 ON PA1 OFF PA2 ON MO ON POR DIR L INH L HSM L STEP H 1 2 3 4 5 6 7 8 PB1 PB2 PA1 PA2 ON PA1 OFF ON MO ON DIR L INH L POR HSM L STEP H 1 2 3 4 5 6 7 8 PB1 PB2 PA1 PA2 ON PA1 OFF MO ON DIR H INH H POR HSM L STEP H 3 4 ON OFF OFF ON ON OFF ON OFF OFF ON ON OFF OFF ON OFF ON After RESAET OFF ON OFF ON 1 2 3 4 5 6 7 8 OFF ON OFF OFF OFF ON ON OFF OFF OFF ON OFF ON OFF ON OFF ON OFF OFF OFF ON OFF OFF ON OFF OFF OFF ON OFF ON OFF ON 1 PB1 OFF ON 2 Fig.8 Half step mode / Forward Direction sequence STEP PA2 1 1 STEP PA2 After RESAET OFF ON OFF ON Fig.7 Full step mode / Reverse Direction sequence PB1 OFF PB2 2 Fig.6 Full step mode / Forward Direction sequence PB1 OFF PB2 1 L INH PB2 After RESAET OFF ON OFF ON After RESAET OFF ON OFF ON 1 2 3 4 5 6 7 8 OFF OFF OFF ON ON OFF OFF ON ON OFF OFF OFF ON OFF ON OFF OFF OFF ON OFF OFF ON ON OFF OFF ON OFF OFF OFF ON OFF ON Fig.9 Half step mode / Reverse Direction sequence 1 2 3 4 5 6 7 8 1 PB1 OFF PB2 OFF PA1 OFF PA2 OFF MO ON Fig.10 Half step mode / INH sequence -7- NJW4350 Application examples Logic input unit The circuit handles an open state in the logic input unit as an H level input. Unused input units should be fixed at Vdd level to maximize noise resistance characteristics. Phase output unit The phase output unit is provided with a power sink to enable unipolar drive of stepping motor windings. The resistor connected to the common line of the winding determines the maximum motor power. To protect output transistors from kickback power, a high-speed free wheeling diode is required. I/O signal sequence in each drive mode Timing charts for I/O signals in each drive mode are shown in Figures 6 to 10. The left side shows input and output signals after POR. Precautions 1. Do not remove ICs or PCBs when power is supplied. 2. Note that some stepping motors may generate excessive voltages even when free wheeling diode is used. 3. Select a stepping motor with the required power rating to obtain the required torque. Generally, the higher the input voltage of the stepping motor, the higher rpm it will produce. When the supply voltage is higher than stepping motor rated voltage, a current limit resistor must be used to connect the common winding to the power supply. Use the L/R time constant of the resistor to obtain optimum high-speed rpm characteristics from the stepping motor. 4. Do not use motor power supplies (without an output capacitor) with a serial diode. Nor use ground lines with common impedance with Vcc, instead make a one point ground connection using the PGND terminal (pin3) and SGND terminal (pin14) of the IC. 5. To reverse motor rotation, reverse PA and PA2 (or PB1 and PB2) stepping motor connections. 6. Drive circuit High-performance stepping motor operation requires that the windings are energized speedily at phase turn on, and that energizing is quickly turned off at turn off. 7. Phase turnoff problems The drive circuit may be damaged if the kickback voltage induced when the energizing of the windings is turned off (when winding current is turned off) is not adequately suppressed. Refer to the description of turn-off circuit as follow. -8- NJW4350 < About the turn-off circuit > There are various turn-off circuit methods for the purpose of extracting the speed performance of the motor. The turn-off time of motor current depends on the clamp voltage of the turn-off circuit. Therefore, it is necessary to select an appropriate turn-off method according to the motor speed. However, the larger the clamp voltage of the turn-off circuit, the negative voltage is generated by electromagnetic induction to the other winding. Method External parts scale Motor Speed Negative voltage value Diode Turn-off Small Low Low Resistor + Diode Turn-off Medium High Middle to High Diode Turn-off Circuit VCLAMP=VF Resistor + Diode Turn-off Circuit VCLAMP=VF+VR VMM VMM i Zener Diode + Diode Turn-off Large Zener Diode + Diode Turn-off Circuit VCLAMP=VF+VZ VR VMM VZ i i < Prevention of Malfunction for Negative Voltage > In unipolar motor drive, when switching the winding current electromagnetically coupled, the output pin may become below the GND potential due to long wiring of the motor, routing of the GND wiring of the mounting board, turn-off circuit type, and so on. Due to the nature of the monolithically structured IC, when a large negative voltage is applied to the output pin, the inside of the IC may cause unexpected operation, which may cause circuit malfunction (miss step). Therefore, in order to reliably prevent circuit malfunction due to negative voltage, it is recommended to insert a diode in series at the output pin and take countermeasures. VMM + Turn-off Circuit *Series insertion diode for negative voltage prevention -9- NJW4350 ELECTRICAL CHARACTERISTICS EXAMPLES VDD VS. IDD2 INPUT=L Ta=25[dg.C] 3.0 3.0 2.5 2.5 2.0 2.0 ICC[mA] ICC[mA] VDD VS. IDD1 INPUT=H ta=25[dg.C] 1.5 1.0 1.0 0.5 0.5 0.0 0.0 0 1 2 3 4 5 6 0 7 Fig. 15 Ambient tSOPerature vs. allowable power dissipation characteristics example 1.0 Vsat_H[V] 0.8 0.6 0.4 0.2 0.0 20 2 3 4 5 6 40 60 80 100 IMO[mA] Fig. 16 Phase output saturation voltage vs. 2.0 1.8 PB1 current characteristics example output 1.6 PB2 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 200 400 600 800 1000 1200 1400 1600 Iout[mA] Vsat_H[V] Iout VS. Vout VDD=7V Ta=25[dg.C] 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 Fig. 17 Logic output saturation voltage vs. output current characteristics example 0 200 400 600 800 1000 1200 1400 1600 Iout[mA] - 10 - 7 Iout VS. Vout VDD=5V Ta=25[dg.C] IMO VS. VMO VDD=5V Ta=25[dg.C] 0 1 VCC[V] VCC[V] VMO[V] 1.5 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.