IP4310CX8/P,135

IP4310CX8/P Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 13 October 2009 Product data sheet 1. Product profile 1.1 General description The IP4310CX8/P is an ESD protection and biasing device for the non-high-speed channels of the HDMI interface. The device provides protection to downstream components from Electrostatic Discharge (ESD) voltages as high as ±15 kV contact discharge, far exceeding IEC61000-4-2, level 4. The device is fabricated using monolithic silicon technology and integrates three resistors and several low capacitance, high-level ESD-protection diodes in a single Wafer-Level chip-scale package. These features make the IP4310CX8/P ideal for use in applications requiring component miniaturization, such as mobile phone handsets. 1.2 Features      Pb-free, RoHS compliant and free of Halogen and Antimony (dark green compliant) 2 x 1.75 k, 1x 100 k biasing resistors with integrated ESD-protection 2 separated back-to-back ESD protection diodes Downstream ESD protection up to ±15 kV (contact) according IEC61000-4-2 Wafer-Level chip-scale package with 0.4 mm pitch 1.3 Applications  HDMI non-high-speed interfaces channels in e.g. Cellular and PCS mobile handsets  DDC, hot plug and CEC line biasing and ESD protection in space constrained appliances 2. Pinning information Table 1. Pin Pinning IP4310CX8/P Description Simplified outline Symbol A1 IP4310CX8/P A1 ESD-protection A2 ESD-protection A1 B2, C2 Ground C3 Hot plug, ESD-protection B3 DDC communication, ESD-protection A3 DDC communication, ESD-protection C1 Power supply for DDC pull-up resistors C1 A2 A3 B2 B3 C2 C3 Transparent top view WLCSP8 C3 A2 B3 A3 1k75 R2 1k75 R1 D1 D1 D1 D1 100k R3 D2 B2 D2 C2 D1 C1 D3 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 3. Limiting values Table 2. Limiting values Symbol Parameter Conditions VI/O DC input voltage range for input or output pins ESD Electrostatic Discharge Min Max Unit -5.5 +5.5 V Contact -8 (-15)1 +8 (+15) 1 kV Air Discharge -15 +15 kV 20 mW +150 °C +260 °C +85 °C IEC 61000-4-2, Level 4, All pins to ground (B2&C2) PD-ch Maximum continuous power dissipation per channel Tstg storage temperature range Tpk Peak solder reflow temperature Tamb Ambient operating temperature @ 70 °C -55 10 seconds max. -30 4. Electrical Characteristics Table 3. Electricl characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter R1, R2 Conditions Min Typ Max Unit Resistor value 1.575 1.75 1.925 k R3 Resistor value 80 100 120 k Cline Line capacitance value 8.0 10.0 12.0 pF 4.8 6 7.2 pF Itest = 1mA 6 - 11 V Itest = -1mA -11 - -6 V V = +3 V - - +50 nA V = -3 V -50 - - nA Vdc = 0 V; f = 100 kHz, Vac = 0.15 Vrms all other pins connected to GND All pins to ground (B2, D2) Line capacitance value under HDMI compliance test conditions Vdc = 2.5 V; f = 100 kHz, Vac = 3.5 Vp-p = ( 1.25 Vrms) all other pins connected to GND All pins to ground (B2, D2) V (BR) I lkg Diode breakdown voltage Diode leakage current 2 1 Device is qualified using 1000 pulses of ±15kV contact discharges each, according the IEC61000-4-2 model and far exceeds the specified level 4 (8kV contact discharge). 2 The leakage for pin C3 cannot be measured due to the 100kresistor. Pins B3, A3 and C1 have to be measured together © NXP B.V. 2006. All rights reserved. Product data sheet 13 October 2009 2 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 5. Application information 5.1 Cross-talk S21(dB) The setup for cross-talk measurement in a 50  system from one channel to another is shown in Fig 1. Four typical cross-talk measurement results are depicted in Fig 2. Channels not shown there behave similar. Unused channels are terminated with 50  to ground 0 -10 A1A3 A2C3 A2A3 A1C3 -20 IN DUT OUT -30 50 Ω 50 Ω -40 TEST BOARD -50 Vgen -60 001aag218 -70 -80 -90 0,1 1 10 100 1000 f (MHz) Fig 1. Cross-talk simulation configuration Fig 2. IP4310CX8/P cross-talk behavior © NXP B.V. 2006. All rights reserved. Product data sheet 13 October 2009 3 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 6. Design/Assembly Recommendations 6.1 PCB Design Guidelines For the optimum performance, a Non-Solder Mask PCB design (NSMD), also known as a copperdefined design, incorporating laser-drilled micro-vias connecting the ground pads to a buried ground-plane layer is recommended. This results in the lowest possible ground inductance and provides the best high frequency and ESD performance. For this case, the following are the recommended PCB design parameters:       PCB pad size: 0.20 mm diameter Micro-Via diameter: 0.1 mm (0.004”) Solder Mask opening: 0.37 mm diameter Copper thickness: 20-40 µm Copper finish: AuNi PCB material: FR4 6.2 PCB Assembly Guidelines for Pb-free soldering The following are recommendations for the assembly of this device:      Solder Screen Aperture size: 0.33 mm diameter Solder Screen thickness: 100 µm (0.004”) Solder Paste: Pb-free: Sn Ag(3-4) Cu(0.5-0.9) Solder/Flux ratio: 50 / 50 Solder Reflow Profile: see below SYMBOL temperature Tpeak The device is capable of withstanding at least three reflows of this profile. CR  6 C/sec 230 C 217 C t3 t2 REQUIREMENTS Minimum Maximum T/t 250 C tsoak PARAMETER time Average temperature gradient in pre-heating 2.5 °C/s 4.0 °C/s tsoak Soak time 60 s 180 s t1 Time at temperature >217°C 30 s 150 s t2 Time at temperature 230°C 10 s 50 s t3 Time at temperature 250°C ---- 30 s Tpeak Peak temperature in reflow 230 °C 260 °C CR Cooling rate ----- -6 °C/s ttotal Total length of profile ----- 540 s t1 Fig 3. Pb-free solder reflow profile © NXP B.V. 2006. All rights reserved. Product data sheet 13 October 2009 4 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 7. Package outline 0.61 ±0.04 1.16 ±0.05 0.26 ±0.05 A2 B3 B2 C3 C2 A1 1.16 ±0.05 C1 0.4 ±0.05 0.2 ±0.02 0.41 ±0.02 A3 Bottom view, balls facing up Side view Pin A1 index area A1 A2 B1 B2 C1 10 Lot code marking area C2 A3 C3 Transparent top view, balls facing down Fig 4. IP4310CX8/P outline dimensions © NXP B.V. 2006. All rights reserved. Product data sheet 13 October 2009 5 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 8. Tape & Reel information B-B A 1 1 0 B B A-A 1 A Feed Direction Position of PIN A1 ITEM SYMBOL SPECIFICATIONS DIMENSION OVERALL DIMENSIONS SPROCKET HOLES DISTANCE BETWEEN CENTRE LINES COMPARTMENTS DEVICE CARRIER TAPE ANTISTATIC COVER TAPE BENDING RAD TOLERANCE TAPE WIDTH W 8.00 ±0.1 THICKNESS K 1.20 MAX DISTANCE G 0.75 MIN DIAMETER D0 1.50 +0.1/-0.0 DISTANCE E 1.75 ±0.1 PITCH P0 4.00 ±0.1 LENGTH DIRECTION P2 2.00 ±0.05 WIDTH DIRECTION F 3.50 ±0.05 LENGTH A0 1.32 ±0.05 WIDTH B0 1.28 ±0.05 DEPTH K0 0.80 ±0.05 HOLE DIAMETER D1 0.50 ±0.1 PITCH P 4.00 ±0.1 DEPTH K1 0...0.25 -0.1 OUTLINE NOTE CUM. PITCH ERROR ±0.2 / 10 PITCHES IP4310CX8/P ROTATION Θ 20° MAX FILM THICKNESS T 0.25 ±0.07 WIDTH W1 5.75 MAX FILM THICKNESS T1 0.1 MAX IN WINDING DIRECTION R 30 MIN CARBON LOADED POLYSTYRENE 100% RECYCLABLE Fig 5. IP4310CX8/P Tape & Reel information © NXP B.V. 2006. All rights reserved. Product data sheet 13 October 2009 6 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 9. Legal information 9.1 Data sheet status Document status[1], [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full datasheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. . 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 10. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: sales.addresses@www.nxp.com Product data sheet © NXP B.V. 2006. All rights reserved. 13 October 2009 7 of 8 IP4310CX8/P NXP Semiconductors Integrated HDMI interface biasing and ESD protection to IEC61000-4-2, level 4 11. Contents 1. 1.1 1.2 1.3 2. 3. 4. 5. 5.1 6. 6.1 6.2 7. 8. 9. 9.1 9.2 9.3 9.4 10. 11. Product profile ..................................................... 1 General description ............................................ 1 Features ............................................................. 1 Applications ........................................................ 1 Pinning information ............................................ 1 Limiting values .................................................... 2 Electrical Characteristics ................................... 2 Application information ...................................... 3 Cross-talk ........................................................... 3 Design/Assembly Recommendations ............... 4 PCB Design Guidelines ...................................... 4 PCB Assembly Guidelines for Pb-free soldering 4 Package outline ................................................... 5 Tape & Reel information ..................................... 6 Legal information ................................................ 7 Data sheet status ............................................... 7 Definitions .......................................................... 7 Disclaimers......................................................... 7 Trademarks ........................................................ 7 Contact information ............................................ 7 Contents ............................................................... 8 Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, email to: sales.addresses@www.nxp.com Date of release: 13 October 2009 Document identifier: