HL7800_1104888

AirPrime HL7800 and HL7800-M Product Technical Specification 41111094 7 October 04, 2019 Product Technical Specification Important Notice Due to the nature of wireless communications, transmission and reception of data can never be guaranteed. Data may be delayed, corrupted (i.e., have errors) or be totally lost. Although significant delays or losses of data are rare when wireless devices such as the Sierra Wireless modem are used in a normal manner with a well-constructed network, the Sierra Wireless modem should not be used in situations where failure to transmit or receive data could result in damage of any kind to the user or any other party, including but not limited to personal injury, death, or loss of property. Sierra Wireless accepts no responsibility for damages of any kind resulting from delays or errors in data transmitted or received using the Sierra Wireless modem, or for failure of the Sierra Wireless modem to transmit or receive such data. Safety and Hazards Do not operate the Sierra Wireless modem in areas where cellular modems are not advised without proper device certifications. These areas include environments where cellular radio can interfere such as explosive atmospheres, medical equipment, or any other equipment which may be susceptible to any form of radio interference. The Sierra Wireless modem can transmit signals that could interfere with this equipment. Do not operate the Sierra Wireless modem in any aircraft, whether the aircraft is on the ground or in flight. In aircraft, the Sierra Wireless modem MUST BE POWERED OFF. When operating, the Sierra Wireless modem can transmit signals that could interfere with various onboard systems. Note: Some airlines may permit the use of cellular phones while the aircraft is on the ground and the door is open. Sierra Wireless modems may be used at this time. The driver or operator of any vehicle should not operate the Sierra Wireless modem while in control of a vehicle. Doing so will detract from the driver or operator’s control and operation of that vehicle. In some states and provinces, operating such communications devices while in control of a vehicle is an offence. Limitations of Liability This manual is provided “as is”. Sierra Wireless makes no warranties of any kind, either expressed or implied, including any implied warranties of merchantability, fitness for a particular purpose, or noninfringement. The recipient of the manual shall endorse all risks arising from its use. The information in this manual is subject to change without notice and does not represent a commitment on the part of Sierra Wireless. SIERRA WIRELESS AND ITS AFFILIATES SPECIFICALLY DISCLAIM LIABILITY FOR ANY AND ALL DIRECT, INDIRECT, SPECIAL, GENERAL, INCIDENTAL, CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES INCLUDING, BUT NOT LIMITED TO, LOSS OF PROFITS OR REVENUE OR ANTICIPATED PROFITS OR REVENUE ARISING OUT OF THE USE OR INABILITY TO USE ANY SIERRA WIRELESS PRODUCT, EVEN IF SIERRA WIRELESS AND/OR ITS AFFILIATES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR THEY ARE FORESEEABLE OR FOR CLAIMS BY ANY THIRD PARTY. Notwithstanding the foregoing, in no event shall Sierra Wireless and/or its affiliates aggregate liability arising under or in connection with the Sierra Wireless product, regardless of the number of events, occurrences, or claims giving rise to liability, be in excess of the price paid by the purchaser for the Sierra Wireless product. 41111094 Rev 7 October 04, 2019 2 Product Technical Specification Patents This product may contain technology developed by or for Sierra Wireless Inc. This product is manufactured or sold by Sierra Wireless Inc. or its affiliates under one or more patents licensed from MMP Portfolio Licensing. Copyright © 2019 Sierra Wireless. All rights reserved. Trademarks Sierra Wireless®, AirPrime®, AirLink®, AirVantage®, WISMO®, ALEOS® and the Sierra Wireless and Open AT logos are registered trademarks of Sierra Wireless, Inc. or one of its subsidiaries. Watcher® is a registered trademark of NETGEAR, Inc., used under license. Windows® and Windows Vista® are registered trademarks of Microsoft Corporation. Macintosh® and Mac OS X® are registered trademarks of Apple Inc., registered in the U.S. and other countries. QUALCOMM® is a registered trademark of QUALCOMM Incorporated. Used under license. Other trademarks are the property of their respective owners. Contact Information Sales information and technical support, including warranty and returns Web: sierrawireless.com/company/contact-us/ Global toll-free number: 1-877-687-7795 6:00 am to 5:00 pm PST Corporate and product information Web: sierrawireless.com 41111094 Rev 7 October 04, 2019 3 Product Technical Specification Document History Version Date Updates 1.0 November 24, 2017 Creation Added 3.3 Power Consumption States 1.1 February 01, 2018 Updated: • Table 2 General Features • Table 5 Pin Definition • 3.2 Current Consumption • 3.16 Debug Interface • 3.19.3 Rx Sensitivity Added: • 7.1 Japan Radio and Telecom Approval • Table 9 Maximum Current Consumption 1.2 May 04, 2018 Updated: • GNSS to GPS • 1.7 ESD Specifications • 1.8.5 RoHS Directive Compliance • 3.2 Current Consumption • Table 23 Digital I/O Electrical Characteristics • 3.11 Power On Signal (PWR_ON_N) • 3.19 RF Interface • 6 Reliability Specification Added 1.8.3 ATEX Compliance 1.3 July 05, 2018 1.4 July 10, 2018 1.5 July 25, 2018 1.6 August 10, 2018 41111094 Updated: • Table 1 Supported Bands/Connectivity • Table 2 General Features • 1.5 Interfaces • Table 5 Pin Definition • Table 9 Maximum Current Consumption • 3.2 Current Consumption • 3.3 Power Consumption States • 3.11 Power On Signal (PWR_ON_N) • 3.12 Reset Signal (RESET_IN_N) • Table 43 Typical Conducted Cat-M1 RX Sensitivity Updated Table 10 Low Current Consumption Mode Added: • 1.8.2 Frequency Drift Correction • 7 Legal Information • HL7800-M Updated: • Table 9 Maximum Current Consumption • Moved Japan Approval to 7.1; updated Figure 25 Sample Japan Certification Indication Updated • 7.3 FCC Statement • 7.4 IC Statement Rev 7 October 04, 2019 4 Product Technical Specification Version Date Updates Added 7.3.4 Antenna Installation 2.0 September 10, 2018 Updated: • Table 1 Supported Bands/Connectivity • 1.7 ESD Specifications • Table 5 Pin Definition • Table 9 Maximum Current Consumption • Table 17 VGPIO Electrical Characteristics • Table 22 USB Electrical Characteristics • Table 23 Digital I/O Electrical Characteristics • Table 24 GPIO Pin Description • Table 25 UART1 Pin Description • Table 31 RESET_IN_N Electrical Characteristics Added 3.3.3 Digital I/O during Hibernate Power Mode 3.0 November 12, 2018 3.1 November 13, 2018 Updated: • Table 5 Pin Definition • 3.2 Current Consumption • 3.3.1.2 Extended DRX (eDRX) • 3.3.2 Power Modes • Table 17 VGPIO Electrical Characteristics • Table 20 USIM1 Electrical Characteristics • Table 23 Digital I/O Electrical Characteristics • 3.10 Main Serial Link (UART1) • 3.11 Power On Signal (PWR_ON_N) • 3.12 Reset Signal (RESET_IN_N) • 3.16 Debug Interfaces • Table 38 WAKE_UP Electrical Characteristics • Table 43 Typical Conducted Cat-M1 RX Sensitivity Updated 3.2 Current Consumption Added 5 Design Guidelines 4.0 March 08, 2019 4.1 March 13, 2019 Updated: • Number of GPIOs from 11 to 12 • Table 1 Supported Bands/Connectivity • Table 2 General Features • 1.7 ESD Specifications • 1.8.4 Regulatory • Table 5 Pin Definition • 3 Detailed Interface Specifications Updated 3.8 Electrical Information for Digital I/O Added Table 44 Typical Conducted NB1 RX Sensitivity Updated: • 3.2 Current Consumption • 3.3.1.1 Power Saving Mode (PSM) 4.2 March 22, 2019 4.3 April 04, 2019 Updated 3.2 Current Consumption May 08, 2019 Added: • VBATT_PA_EN (pin 41) • 3.21 External RF Voltage Control Indicator • 7.2 Korean Approval 5.0 41111094 Rev 7 October 04, 2019 5 Product Technical Specification Version Date Updates May 08, 2019 Updated: • 3.2 Current Consumption • 3.3.2 Power Modes • 3.7 USB Interface • 3.10 Main Serial Link (UART1) • Table 29 PWR_ON_N Managed Timing • Table 33 ADC Electrical Characteristics 6.0 August 06, 2019 Updated IO state in: • 3.10 Main Serial Link (UART1) • 3.21 External RF Voltage Control Indicator 7 October 03, 2019 5.0 41111094 Updated 3.3.1 3GPP Power Saving Features ADCs, Clock Interface, PWR_ON_N now available Updated Pin Definition table (pre/post reset state; power supply domain) - pins C11, C24-C29, C44 Updated 3.4 VGPIO Updated Table 29 PWR_ON_N Managed Timing Updated Table 31 RESET_IN_N Electrical Characteristics Updated 3.20 TX Indictor (TX_ON) Updated Table 50 GPS Performance Updated Figure 24 Antenna Connection Rev 7 October 04, 2019 6 Contents 1. INTRODUCTION ................................................................................................ 13 1.1. Common Flexible Form Factor (CF3) ................................................................................14 1.2. Physical Dimensions .........................................................................................................14 1.3. General Features ...............................................................................................................14 1.4. Architecture........................................................................................................................16 1.5. Interfaces ...........................................................................................................................17 1.6. Connection Interface .........................................................................................................17 1.7. ESD Specifications ............................................................................................................18 1.8. Environmental and Certifications .......................................................................................18 1.8.1. Environmental Specifications...................................................................................18 1.8.2. Frequency Drift Correction.......................................................................................19 1.8.3. ATEX Compliance ...................................................................................................19 1.8.4. Regulatory................................................................................................................19 1.8.5. RoHS Directive Compliance ....................................................................................19 1.8.6. Disposing of the Product..........................................................................................20 1.9. References ........................................................................................................................20 2. PAD DEFINITION ............................................................................................... 21 2.1. Pin Types ...........................................................................................................................25 2.2. Pad Configuration (Top View, Through Module) ...............................................................26 3. DETAILED INTERFACE SPECIFICATIONS ..................................................... 27 3.1. Power Supply.....................................................................................................................27 3.2. Current Consumption ........................................................................................................28 3.3. Power Consumption States ...............................................................................................31 3.3.1. 3GPP Power Saving Features .................................................................................31 3.3.2. Power Modes ...........................................................................................................35 3.3.3. Digital I/O during Hibernate Power Mode ................................................................36 3.4. VGPIO ...............................................................................................................................38 3.5. Real Time Clock (BAT_RTC) ............................................................................................39 3.6. USIM Interface ...................................................................................................................40 3.6.1. UIM1_DET ...............................................................................................................41 3.7. USB Interface ....................................................................................................................41 3.8. Electrical Information for Digital I/O ...................................................................................41 3.9. General Purpose Input/Output (GPIO) ..............................................................................42 3.10. Main Serial Link (UART1) ..................................................................................................43 3.10.1. 8-wire Application ....................................................................................................44 3.10.2. 4-wire Application ....................................................................................................44 3.10.3. 2-wire Application ....................................................................................................44 3.11. Power On Signal (PWR_ON_N) ........................................................................................45 3.11.1. PWR_ON_N Not Managed (Default) .......................................................................45 41111094 Rev 7 October 04, 2019 7 Product Technical Specification 3.11.2. PWR_ON_N Managed ............................................................................................46 3.12. Reset Signal (RESET_IN_N).............................................................................................47 3.13. Analog to Digital Converter (ADC) ....................................................................................48 3.14. Clock Interface ...................................................................................................................49 3.15. PCM ...................................................................................................................................49 3.16. Debug Interfaces ...............................................................................................................49 3.16.1. Command Line Interface (CLI) ................................................................................49 3.16.2. Modem Logs interface .............................................................................................50 3.17. Wake Up Signal (WAKE_UP) ............................................................................................50 3.18. Fast Shutdown Signal (FAST_SHUTDOWN_N) ...............................................................51 3.19. RF Interface .......................................................................................................................51 3.19.1. RF Connection .........................................................................................................51 3.19.2. Maximum Output Power ..........................................................................................52 3.19.3. Rx Sensitivity ...........................................................................................................52 3.20. TX Indicator (TX_ON) ........................................................................................................53 3.21. External RF Voltage Control Indicator ...............................................................................54 3.22. GPS Interface ....................................................................................................................55 3.22.1. GPS Performance ....................................................................................................55 3.22.2. GPS Antenna Indicator (EXT_LNA_GPS_EN) ........................................................55 4. MECHANICAL DRAWINGS ............................................................................... 56 5. DESIGN GUIDELINES ....................................................................................... 59 5.1. Power Supply Design ........................................................................................................59 5.2. Power Cycle.......................................................................................................................59 5.3. ESD Guidelines for USIM ..................................................................................................59 5.4. ESD Guidelines for USB....................................................................................................60 5.5. Radio Frequency Integration .............................................................................................61 6. RELIABILITY SPECIFICATION ......................................................................... 62 6.1. Preconditioning Test ..........................................................................................................62 6.2. Performance Test ..............................................................................................................62 6.3. Aging Tests ........................................................................................................................63 6.4. Characterization Tests.......................................................................................................64 7. LEGAL INFORMATION ..................................................................................... 65 7.1. Japan Radio and Telecom Approval .................................................................................65 7.2. Korean Approval ................................................................................................................65 7.3. FCC Statement ..................................................................................................................65 7.3.1. Radiation Exposure Statement ................................................................................66 7.3.2. End Product Labeling ..............................................................................................66 7.3.3. Manual Information to the End User ........................................................................66 7.3.4. Antenna Installation .................................................................................................66 7.4. IC Statement ......................................................................................................................67 7.4.1. Radiation Exposure Statement / Déclaration d'Exposition aux Radiations .............68 41111094 Rev 7 October 04, 2019 8 Product Technical Specification 7.4.2. 7.4.3. End Product Labeling / Plaque Signalétique du Produit Final .................................69 Manual Information to the End User / Manuel d'Information à l'Utilisateur Final .....69 8. ORDERING INFORMATION .............................................................................. 70 9. TERMS AND ABBREVIATIONS ........................................................................ 71 41111094 Rev 7 October 04, 2019 9 List of Figures Figure 1. Architecture Overview ..................................................................................................... 16 Figure 2. Mechanical Overview (Top View) .................................................................................... 17 Figure 3. Pad Configuration (Top View through Module) ............................................................... 26 Figure 4. PSM Example (Simplified)............................................................................................... 32 Figure 5. eDRX Example (PTW: 4 Paging Occurrences)............................................................... 33 Figure 6. eDRX Power Consumption Profile Interruption ............................................................... 34 Figure 7. PSM I/O Toggling during TAU and the Active Window (T3324) ..................................... 37 Figure 8. eDRX Cycle of 20s sleep and 1.024s of Activity ............................................................. 37 Figure 9. eDRX with Extra Calibration Wakes ................................................................................ 38 Figure 10. Stable eDRX Cycle of 81.92s after Calibration ............................................................... 38 Figure 11. 8-wire UART Application Example .................................................................................. 44 Figure 12. 4-wire UART Application Example .................................................................................. 44 Figure 13. 2-wire UART Application Example .................................................................................. 44 Figure 14. Power Up and Power Down Sequence without PWR_ON_N ......................................... 45 Figure 15. Power Up Sequence with PWR_ON_N Cold Start ......................................................... 46 Figure 16. Power On Sequence with PWR_ON_N .......................................................................... 47 Figure 17. TX_ON State during TX Burst ......................................................................................... 54 Figure 18. VBATT_PA_EN State during RX/TX windows ................................................................ 54 Figure 19. Mechanical Drawing ........................................................................................................ 56 Figure 20. Dimensions Drawing ....................................................................................................... 57 Figure 21. Footprint Drawing ............................................................................................................ 58 Figure 22. EMC and ESD Components Close to the USIM ............................................................. 60 Figure 23. ESD Protection for USB .................................................................................................. 60 Figure 24. Antenna Connection ........................................................................................................ 61 Figure 25. Sample Japan Certification Indication ............................................................................. 65 Figure 26. Sample Korean Approval ................................................................................................ 65 41111094 Rev 7 October 04, 2019 10 List of Tables Table 1. Supported Bands/Connectivity ........................................................................................ 13 Table 2. General Features ............................................................................................................ 14 Table 3. Environmental Specifications .......................................................................................... 18 Table 4. Values for ATEX Compliance .......................................................................................... 19 Table 5. Pin Definition ................................................................................................................... 21 Table 6. Pin Type Codes ............................................................................................................... 25 Table 7. Power Supply Pin Description ......................................................................................... 27 Table 8. Power Supply Electrical Characteristics .......................................................................... 27 Table 9. Maximum Current Consumption...................................................................................... 27 Table 10. Low Current Consumption Mode Cat-M1 ........................................................................ 28 Table 11. Low Current Consumption Mode Cat-NB1 ...................................................................... 29 Table 12. Typical Current Consumption for LTE Cat-M1 in Connected Mode for All Bands .......... 30 Table 13. Expected Typical Current Consumption for NB -1 in Connected Mode for All Bands .... 30 Table 14. eDRX-Related Commands .............................................................................................. 34 Table 15. Low Power Modes ........................................................................................................... 35 Table 16. VGPIO Pin Description .................................................................................................... 39 Table 17. VGPIO Electrical Characteristics..................................................................................... 39 Table 18. BAT_RTC Electrical Characteristics................................................................................ 39 Table 19. USIM1 Pin Description .................................................................................................... 40 Table 20. USIM1 Electrical Characteristics ..................................................................................... 40 Table 21. USB Pin Description ........................................................................................................ 41 Table 22. USB Electrical Characteristics......................................................................................... 41 Table 23. Digital I/O Electrical Characteristics ................................................................................ 42 Table 24. GPIO Pin Description ...................................................................................................... 42 Table 25. UART1 Pin Description ................................................................................................... 43 Table 26. PWR_ON_N Pin Description ........................................................................................... 45 Table 27. PWR_ON_N Electrical Characteristics ........................................................................... 45 Table 28. PWR_ON_N Not Managed Timing.................................................................................. 46 Table 29. PWR_ON_N Managed Timing ........................................................................................ 47 Table 30. RESET_IN_N Pin Description ......................................................................................... 48 Table 31. RESET_IN_N Electrical Characteristics .......................................................................... 48 Table 32. ADC Pin Description ........................................................................................................ 48 Table 33. ADC Electrical Characteristics ........................................................................................ 48 Table 34. Clock Interface Pin Description ....................................................................................... 49 Table 35. CLI Interface Pin Description........................................................................................... 49 Table 36. Modem Logs Interface Pin Description ........................................................................... 50 Table 37. WAKE_UP Pin Description.............................................................................................. 50 41111094 Rev 7 October 04, 2019 11 Product Technical Specification Table 38. WAKE_UP Electrical Characteristics .............................................................................. 50 Table 39. FAST_SHUTDOWN_N Pin Description .......................................................................... 51 Table 40. FAST_SHUTDOWN_N Electrical Characteristics ........................................................... 51 Table 41. RF Main Pin Description.................................................................................................. 51 Table 42. Maximum Output Power .................................................................................................. 52 Table 43. Typical Conducted Cat-M1 RX Sensitivity ...................................................................... 52 Table 44. Typical Conducted NB1 RX Sensitivity ........................................................................... 53 Table 45. TX_ON Pin Description ................................................................................................... 53 Table 46. VBATT_PA_EN Pin Description ...................................................................................... 54 Table 47. VBATT_PA_EN Characteristics ...................................................................................... 55 Table 48. GPS Antenna Specifications ........................................................................................... 55 Table 49. GPS Performance ........................................................................................................... 55 Table 50. Preconditioning Test........................................................................................................ 62 Table 51. Performance Test ............................................................................................................ 62 Table 52. Aging Tests...................................................................................................................... 63 Table 53. Characterization Tests .................................................................................................... 64 Table 54. Ordering Information ....................................................................................................... 70 41111094 Rev 7 October 04, 2019 12 1. Introduction This document is the Product Technical Specification for the AirPrime HL7800 and HL7800-M Embedded Modules designed for M2M and Internet of Things (IoT) markets. It defines the high-level product features and illustrates the interfaces for these features. This document is intended to cover the hardware aspects of the product, including electrical and mechanical. The AirPrime HL7800 and HL7800-M modules belong to the AirPrime HL Series from the Essential Connectivity Module family. These are industrial grade Embedded Wireless Modules that provides data connectivity on LTE (as listed in Table 1 Supported Bands/Connectivity). The AirPrime HL7800 and HL7800-M modules support a large variety of interfaces such as USB FS, UART, ADC, GPIOs, and also support the new ultra-low-power-consumption hibernation modes to provide customers with the highest level of flexibility in implementing high-end solutions. Table 1. Supported Bands/Connectivity Transmit Band (Tx) Receive Band (Rx) Minimum Maximum Minimum Maximum B1 1920 MHz 1980 MHz 2110 MHz B2 1850 MHz 1910 MHz B3 1710 MHz 1785 MHz B4 1710 MHz B5 Cat-M1 (HL7800 and HL7800-M) Cat-NB1 (HL7800 only) 2170 MHz   1930 MHz 1990 MHz   1805 MHz 1880 MHz   1755 MHz 2110 MHz 2155 MHz   824 MHz 849 MHz 869 MHz 894 MHz   B8 880 MHz 915 MHz 925 MHz 960 MHz   B9 1749.9 MHz 1784.9 MHz 1844.9 MHz 1879.9 MHz * * B10 1710 MHz 1770 MHz 2110 MHz 2170 MHz * * B12 699 MHz 716 MHz 729 MHz 746 MHz   B13 777 MHz 787 MHz 746 MHz 756 MHz   B14 788 MHz 798 MHz 758 MHz 768 MHz   B17 704 MHz 716 MHz 734 MHz 746 MHz *  B18 815 MHz 830 MHz 860 MHz 875 MHz   B19 830 MHz 845 MHz 875 MHz 890 MHz   B20 832 MHz 862 MHz 791 MHz 821 MHz   B25 1850 MHz 1915 MHz 1930 MHz 1995 MHz   B26 814 MHz 849 MHz 859 MHz 894 MHz   B27 807 MHz 824 MHz 852 MHz 869 MHz  * B28 703 MHz 748 MHz 758 MHz 803 MHz   B66 1710 MHz 1780 MHz 2110 MHz 2200 MHz   LTE Band * Will be supported in a future release. Note: 41111094 RF bands supported are configurable through AT command. The software-based radio allows for the ability to support extra bands for worldwide connectivity. Rev 7 October 04, 2019 13 Product Technical Specification 1.1. Introduction Common Flexible Form Factor (CF3) The AirPrime HL7800 and HL7800-M modules belong to the Common Flexible Form Factor (CF3) family of modules. This family consists of a series of WWAN modules that share the same mechanical dimensions (same width and length with varying thicknesses) and footprint. The CF3 form factor provides a unique solution to a series of problems faced commonly in the WWAN module space as it: • Accommodates multiple radio technologies (LTE advanced) and band groupings. • Supports bit-pipe (Essential Module Series) and value add (Smart Module Series) solutions. • Offers electrical and functional compatibility. • Provides Direct Mount as well as Socket-ability depending on customer needs. 1.2. Physical Dimensions AirPrime HL7800 and HL7800-M modules are compact, robust, fully shielded modules with the following dimensions: • Length: 18.0 mm • Width: 15.0 mm • Thickness: 2.4 mm • Weight: 1.17 g Note: Dimensions specified above are typical values. 1.3. General Features The table below summarizes the AirPrime HL7800 and HL7800-M’s features. Table 2. General Features Feature Description • Physical Power supply 41111094 • • • Small form factor (86-pad solderable LGA pad) – 15.0mm x 18.0mm x 2.4mm (nominal) Metal shield can RF connection pads (RF main and RF GPS) Baseband signals connection Single or double supply voltage (VBATT and VBATT_PA) – 3.2V – 4.35V Rev 7 October 04, 2019 14 Product Technical Specification Feature Description • • RF • Note: • SIM interface • • • • • Application interface • • • Protocol stack • 41111094 Introduction Cat-M1  Power Class 3 (23dBm)  Software based radio allowing support of extra bands for worldwide operation (will be supported in a future release) Cat-NB1 (not supported on the HL7800-M)  Power Class 3 (23dBm)  Software based radio allowing support of extra bands for worldwide operation (will be supported in a future release) GPS*  1575.42 MHz The GPS receiver shares the same RF resources as the 4G receiver. The end-device target should allow GPS positioning for asset management applications where infrequent and no real-time position updates are required. 1.8V only support (legacy 3V SIM is not supported; this should not have any impact on design) (Note: Modern SIM cards all support 1.8V.) SIM extraction / hot plug detection SIM/USIM support Conforms with ETSI UICC Specifications. Supports SIM application tool kit with proactive SIM commands AT command interface – 3GPP 27.007 standard, plus proprietary extended AT commands CMUX multiplexing over UART USB Full Speed (FS)* Cat-M1  3GPP Rel. 13  Half-duplex  Channel bandwidth 1.4MHz  LTE carrier bandwidth 1.4 / 3 / 5 / 10 / 15 / 20 MHz  Up to 375kbit/s uplink, 300 kbit/s downlink  Extended Coverage Mode A  PSM (Power Save Mode)  I-DRX (Idle Mode Discontinuous Reception)  C-DRX (Connected Mode Discontinuous Reception)  Idle mode mobility  Connected mode mobility  eDRX (Extended Discontinuous Reception)  CiOT optimizations (U-Plane, C-Plan)* Cat-NB1 (not supported on the HL7800-M)  3GPP Rel. 13  Half-duplex  Channel bandwidth 180KHz  LTE carrier bandwidth 1.4 / 3 / 5 / 10 / 15 / 20 MHz  Up to 100 kbit/s in downlink  Operational mode – Inband, Guard band, Standalone  CioT EPS optimizations (Data over NAS)  NIDD over SGi tunneling  NIDD over SCEF  Extended coverage Rev 7 October 04, 2019 15 Product Technical Specification Feature Introduction Description • Flexible selection  Manual system selection across RATs  Dynamic system selection across RATs (preferred RAT)* • • • SMS over SG MO/MT SMS storage to SIM card or ME storage • • • • Multiple cellular packet data profiles Sleep mode for minimum idle power draw Mobile-originated PDP context activation / deactivation Static and Dynamic IP address. The network may assign a fixed IP address or dynamically assign one using DHCP (Dynamic Host Configuration Protocol). PDP context type (IPv4, IPv6, IPv4v6). IP Packet Data Protocol context RFC1144 TCP/IP header compression Protocol stack SMS Connectivity • • Environmental Operating temperature ranges (industrial grade): • Class A: -30°C to +70°C • Class B: -40°C to +85°C RTC Real Time Clock (RTC)* * Will be available in a future release. 1.4. Architecture The figure below presents an overview of the AirPrime HL7800 and HL7800-M’s internal architecture and external interfaces. AirPrime HL7800 and HL7800-M Baseband/Transceiver TX FEM Transceiver VGPIO RF 4G RF GPS* BAT_RTC* USIM LGA86 MCU USB* DSP PMU PWR_ON_N RESET_IN_N 32.768KHz 26MHz Analog Baseband Embedded SIM Peripherals Flash Memory LGA86 PCM* RAM Memory * Will be available in a future release Figure 1. 41111094 Architecture Overview Rev 7 October 04, 2019 16 Product Technical Specification 1.5. Introduction Interfaces The AirPrime HL7800 and HL7800-M modules provide the following interfaces and peripheral connectivity: • 1x – VGPIO (1.8V) • 1x – BAT_RTC backup battery interface (will be available in a future firmware release) • 1x – 1.8V USIM • 1x – USB FS • 12x – GPIOs • 1x – 8-wire UART • 1x – Active Low POWER ON (will be available in a future firmware release) • 1x – Active Low RESET • 2x – ADC • 2x – System clock out (32.768 KHz and 26 MHz) • 1x – PCM (will be available in a future firmware release) • 1x – 4-wire UART for debug interface only • 1x – Wake up signal • 1x – Fast shutdown signal (will be available in a future firmware release) • 1x – Main RF Antenna • 1x – TX indicator • 1x – GPS Antenna (will be available in a future firmware release) 1.6. Connection Interface AirPrime HL7800 and HL7800-M modules are LGA form factor devices. All electrical and mechanical connections are made through the 86 Land Grid Array (LGA) pads on the bottom side of the PCB. Figure 2. Mechanical Overview (Top View) The 86 pads have the following distribution: • 66 inner signal pads, 1x0.5mm, pitch 0.8mm • 16 inner ground pads, 1.0x1.0mm, pitch 1.825mm/1.475mm • 4 outer corner ground pads, 0.85x0.97mm 41111094 Rev 7 October 04, 2019 17 Product Technical Specification 1.7. • Introduction ESD Specifications IEC-61000-4-2 (test carried out on test vehicle including ESD protection)  Contact Voltage: ±2kV, ±4kV, ±6kV  GPS pad C38: ±500V  Air Voltage: ±2kV, ±4kV, ±8kV • JESD22-A114 ± 250V Human Body Model • JESD22-C101C ± 250V Charged Device Model 1.8. Environmental and Certifications 1.8.1. Environmental Specifications The environmental specification for both operating and storage conditions are defined in the table below. Table 3. Environmental Specifications Conditions Range Operating Class A -30°C to +70°C Operating Class B -40°C to +85°C Storage -40°C to +85°C Class A is defined as the operating temperature ranges that the device: • Shall exhibit normal function during and after environmental exposure. • Shall meet the minimum requirements of 3GPP or appropriate wireless standards. Class B is defined as the operating temperature ranges that the device: • Shall remain fully functional during and after environmental exposure • Shall exhibit the ability to establish an SMS or DATA call (emergency call) at all times even when one or more environmental constraint exceeds the specified tolerance. • Unless otherwise stated, full performance should return to normal after the excessive constraint(s) have been removed. 41111094 Rev 7 October 04, 2019 18 Product Technical Specification 1.8.2. Introduction Frequency Drift Correction The HL7800 and HL7800-M are environment-sensitive like any electronic device, but able to correct temperature and aging effects automatically. Parameters to be considered when addressing the environmental effect on the HL7800 and HL7800-M are as follows: • Maximum deviation correction: 20 ppm • Environmental Temperature effect: 0.5 ppm • Factory reflow effect: 1 ppm + 1 ppm / reflow • Aging effect: 1 ppm /year of use For example, if an HL7800 module is mounted on a single side (1 reflow) customer PCB and used for 10 years between -40 and +85°C, the frequency drift will be up to 0.5 + (1 + 1) + (1 * 10) = 12.5 ppm, which is in the limits of the 20 ppm maximum correction. 1.8.3. ATEX Compliance The following table lists the inductor and capacitor values to be considered for ATEX certification of the system hosting the HL7800 and HL7800-M modules. All supplies in the modules are linear LDO except for one 1.3V DC/DC step-down. Table 4. Values for ATEX Compliance Parameter Value Tolerance Total Inductance 2.21 µH 30% Total Capacitance 43.64 µF 20% 1.8.4. Regulatory The AirPrime HL7800 and HL7800-M modules will be compliant with the following regulations: • RED • FCC • IC • RCM • JRF/JPA • KC 1.8.5. RoHS Directive Compliance AirPrime HL7800 and HL7800-M modules are compliant with RoHS Directive 2011/65/EU, including directive 2015/863 amending annex II, which sets limits for the use of certain restricted hazardous substances. This directive states that electrical and electronic equipment put on the market does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB), polybrominated diphenyl ethers (PBDE), Bis (2-ethylhexyl) phthalate (DEHP), Butyl benzyl phthalate (BBP), Dibutyl phthalate (DBP) or Di-isobutyl phthalate (DIBP) above threshold limits. 41111094 Rev 7 October 04, 2019 19 Product Technical Specification 1.8.6. Introduction Disposing of the Product This electronic product is subject to the EU Directive 2012/19/EU for Waste Electrical and Electronic Equipment (WEEE). As such, this product must not be disposed of at a municipal waste collection point. Please refer to local regulations for directions on how to dispose of this product in an environmentally friendly manner. 1.9. [1] References AirPrime HL78xx Customer Process Guidelines Reference Number: 41112095 [2] AirPrime HL78xx AT Commands Interface Guide Reference Number: 41111821 [3] AirPrime HL Series Development Kit User Guide Reference Number: 4114877 [4] AirPrime HL7800 Low Power Modes Application Note Reference Number: 2174229 [5] AirPrime HL7800-M MNO and RF Band Customization at Customer Production Site Application Note Reference Number: 2174213 41111094 Rev 7 October 04, 2019 20 2. Pad Definition AirPrime HL7800 and HL7800-M pins are divided into 2 functional categories. • Core functions and associated pins cover all the mandatory features for M2M connectivity and will be available by default across all CF3 family of modules. These Core functions are always available and always at the same physical pad locations. A customer platform using only these functions and associated pads are guaranteed to be forward and/or backward compatible with the next generation of CF3 modules. • Extension functions and associated pins bring additional capabilities to the customer. Whenever an Extension function is available on a module, it is always at the same pad location. Other pins marked as “not connected” or “reserved” should not be used. Table 5. Pin Definition Pad # Signal Name Function I/O Pre and Post Reset State* Power Supply Domain Recommendation for Unused Pads Type C1 GPIO1 General purpose input/output I/O PU 1.8V (VGPIO) Left open Extension C2 UART1_RI UART1 Ring indicator O PU** 1.8V (VGPIO) Connect to test point Core C3 UART1_RTS UART1 Request to send I PU 1.8V (VGPIO) Connect to test point Core C4 UART1_CTS UART1 Clear to send O PU 1.8V (VGPIO) Connect to test point Core C5 UART1_TX UART1 Transmit data I PU 1.8V (VGPIO) Connect to test point Core C6 UART1_RX UART1 Receive data O PU 1.8V (VGPIO) Connect to test point Core C7 UART1_DTR UART1 Data terminal ready I PU 1.8V (VGPIO) Connect to test point Core C8 UART1_DCD UART1 Data carrier detect O PU 1.8V (VGPIO) Connect to test point Core C9 UART1_DSR UART1 Data set ready O PU 1.8V (VGPIO) Connect to test point Core C10 GPIO2 General purpose input/output I/O PD** 1.8V (VGPIO) Connect to test point Core C11 RESET_IN_N Input reset signal I PU 1.8V Left open Core C12 USB_D- USB Data Negative (Full Speed) I/O 3.3V Connect to test point Extension C13 USB_D+ USB Data Positive (Full Speed) I/O 3.3V Connect to test point Extension 41111094 Rev 7 October 04, 2019 21 Product Technical Specification Pad Definition Recommendation for Unused Pads Type Not Connected Left open Not connected Not Connected Left open Not connected Mandatory connection if USB is used Extension Not Connected Left open Not connected NC Not Connected Left open Not connected C19 NC Not Connected Left open Not Connected C20 NC Not Connected Left open Not Connected C21 BAT_RTC Power supply for RTC backup I Left open Extension C22 26M_CLKOUT 26M System Clock Output O PD 1.8V (VGPIO) Left open Extension C23 32K_CLKOUT 32.768kHz System Clock Output O PU 1.8V (VGPIO) Left open Extension C24 ADC1 Analog to digital converter I PD 1.8V (VGPIO) Left open Extension C25 ADC0 Analog to digital converter I PU C26 UIM1_VCC 1.8V USIM1 Power supply O C27 UIM1_CLK 1.8V USIM1 Clock O C28 UIM1_DATA 1.8V USIM1 Data C29 UIM1_RESET C30 Pad # Signal Name Function C14 NC C15 NC C16 USB_VBUS USB VBUS C17 NC C18 I/O Pre and Post Reset State* I Power Supply Domain 5V 1.8V (VGPIO) Left open Extension 1.8V Mandatory connection Core PD 1.8V (VGPIO) Mandatory connection Core I/O PD 1.8V (VGPIO) Mandatory connection Core 1.8V USIM1 Reset O PD 1.8V (VGPIO) Mandatory connection Core GND Ground 0V 0V Recommended connection but can be left open Extension C31 NC Not Connected C32 GND Ground 0V C33 PCM_OUT PCM data out O C34 PCM_IN PCM data in C35 PCM_SYNC C36 PCM_CLK 41111094 Not connected 0V Recommended connection but can be left open Extension PU 1.8V (VGPIO) Left open Extension I PU 1.8V (VGPIO) Left open Extension PCM sync out I/O PU 1.8V (VGPIO) Left open Extension PCM clock I/O PD 1.8V (VGPIO) Left open Extension Rev 7 October 04, 2019 22 Product Technical Specification Pad Definition Pad # Signal Name Function I/O C37 GND Ground 0V C38 RF_GPS RF_GPS C39 GND Ground 0V C40 GPIO7 General purpose input/output I/O C41 GPIO8 / VBATT_PA_EN General purpose input/output / External RF voltage control I/O C42 NC Not Connected C43 EXT_LNA_GPS_EN External GPS LNA enable C44 WAKE_UP Wake up signal I C45 VGPIO GPIO voltage output O C46 GPIO6 General purpose input/output I/O C47 NC Not Connected C48 GND Ground C49 RF_MAIN RF Input/output C50 GND Ground 0V C51 GPIO14 General purpose input/output I/O C52 GPIO10 General purpose input/output I/O C53 GPIO11 General purpose input/output C54 GPIO15 General purpose input/output C55 UART0_RX Debug Receive data C56 UART0_TX C57 C58 Pre and Post Reset State* Power Supply Domain Recommendation for Unused Pads Type 0V Mandatory connection Core Left open Core 0V Mandatory connection Core PU 1.8V (VGPIO) Left open Core PD 1.8V (VGPIO) Left open Core Not connected Left open Extension 1.8V Mandatory connection Extension 1.8V (VGPIO) Left open Core 1.8V (VGPIO) Left open Core Left open Not connected Mandatory connection Core Mandatory connection Core 0V Mandatory connection Core PU 1.8V (VGPIO) Connect to test point Extension PU 1.8V (VGPIO) Connect to test point Extension I/O PU 1.8V (VGPIO) Connect to test point Extension I/O PU 1.8V (VGPIO) Connect to test point Extension O PU 1.8V (VGPIO) Mandatory connection Extension Debug Transmit data I PU 1.8V (VGPIO) Mandatory connection Extension UART0_CTS Debug Clear to Send O PU 1.8V (VGPIO) Mandatory connection Extension UART0_RTS Debug Request to Send I PD 1.8V (VGPIO) Mandatory connection Extension C59 PWR_ON_N Active Low Power On control signal I 1.8V Mandatory connection Core C60 TX_ON TX transmission indication O 1.8V (VGPIO) Left open Extension 41111094 PU PD 0V Rev 7 0V PU October 04, 2019 23 Product Technical Specification Pad Definition Power Supply Domain Recommendation for Unused Pads Type I 3.2V (min) 3.7V (typ) 4.35V (max) Mandatory connection Core Power supply (refer to section 3.1 Power Supply for more information) I 3.2V (min) 3.7V (typ) 4.35V (max) Mandatory connection Core VBATT Power supply (refer to section 3.1 Power Supply for more information) I 3.2V (min) 3.7V (typ) 4.35V (max) Mandatory connection Core C64 UIM1_DET / GPIO3 USIM1 Detection / General purpose input/output I/O PD 1.8V (VGPIO) Left open Core C65 FAST_SHUTDOWN_N / GPIO4 Fast Shutdown signal / General purpose input/output I/O PU 1.8V (VGPIO) Left open Extension C66 GPIO5 General purpose input/output I/O PU 1.8V (VGPIO) Left open Extension CG1 – CG4, G1 – G16 GND Ground GND Pad # Signal Name Function I/O C61 VBATT_PA Power supply (refer to section 3.1 Power Supply for more information) C62 VBATT_PA C63 Pre and Post Reset State* 0V Core * This refers to the state before and after RESET_IN_N; state is Undefined during Reset, Hibernate or OFF modes. Refer to section 3.12 Reset Signal (RESET_IN_N) for more details. ** During hibernation (not applicable to Lite Hibernate mode), all the pulled up (PU) signals will toggle at the rate of wake events. Therefore, if the RI signal is to be used in a system to warn the main MCU of an incoming network event (like SMS or DATA), this RI signal cannot be used as it will toggle at the rate of the eDRX or PSM recurrent wakes. It is therefore recommended to use GPIO2 with a built-in pull down (PD) instead of RI. This will allow the module to trigger the GPIO instead of the RI safely, without unwanted toggles. 41111094 Rev 7 October 04, 2019 24 Product Technical Specification 2.1. Table 6. Pad Definition Pin Types Pin Type Codes Type Definition I Digital Input O Digital Output I/O Digital Input / Output T Tristate T/PU Tristate with pull-up enabled T/PD Tristate with pull-down enabled PU Pull-up enabled PD Pull-down enabled N/A Not Applicable 41111094 Rev 7 October 04, 2019 25 Product Technical Specification Pad Definition RF_MAIN GND NC GPIO6 VGPIO WAKE_UP EXT_LNA_GPS_EN NC GPIO8/VBATT_PA_EN GPIO7 GND RF_GPS GND PCM_CLK PCM_SYNC PCM_IN C47 C46 C45 C44 C43 C42 C41 C40 C39 C38 C37 C36 C35 C34 GPIO10 GPIO11 C48 CG4 GND GND C49 The following diagram shows the pad configuration from DV2 onwards. C50 Note: GPIO14 Pad Configuration (Top View, Through Module) C51 2.2. Core pin Extension pin CG3 GND C52 C33 C53 C32 PCM_OUT GND GPIO15 C54 C31 NC UART0_RX C55 C30 GND G13 G14 G15 G16 C29 UIM1_RESET C28 G9 G10 G11 G12 C27 UIM1_DATA UIM1_CLK C26 UIM1_VCC G5 G6 G7 G8 C25 ADC0 G1 G2 G3 G4 C24 C23 ADC1 32K_CLKOUT C63 C22 26M_CLKOUT C64 C21 BAT_RTC FAST_SHUTDOWN_N/GPIO4 C65 C20 NC GPIO5 C66 C19 NC GND CG1 CG2 GND Figure 3. 41111094 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 UART1_DTR UART1_DCD UART1_DSR GPIO2 RESET_IN_N USB_DUSB_D+ NC NC USB_VBUS NC NC UIM1_DET/ GPIO3 C6 C62 UART1_TX UART1_RX C61 VBATT_PA VBATT C5 VBATT_PA GND C4 C60 UART1_CTS C59 TX_ON C3 POWER_ON_N C2 C58 UART1_RI UART0_RTS UART1_RTS C57 C1 C56 GPIO1 UART0_TX UART0_CTS Pad Configuration (Top View through Module) Rev 7 October 04, 2019 26 3. Detailed Interface Specifications Note: If not specified, all electrical values are given for VBATT=3.7V and an operating temperature of 25°C. For standard applications, VBATT and VBATT_PA must be tied externally to the same power supply. For some specific applications, the module supports separate VBATT and VBATT_PA connection if the requirements below are fulfilled. 3.1. Power Supply The AirPrime HL7800 and HL7800-M modules are supplied through the VBATT and VBATT_PA signals. Note: The rise of the VBATT power signal initiates the power on sequence of the module. Refer to sections 3.11 Power On Signal (PWR_ON_N) and 3.12 Reset Signal (RESET_IN_N) for additional information. Refer to the following table for the pin description of the Power Supply interface. Table 7. Power Supply Pin Description Pad Number Signal Name I/O Description C63 VBATT I Power supply (base band) C61, C62 VBATT_PA I CG1 – CG4, G1 – G16 GND Power supply (radio frequency) Ground Refer to the following table for the electrical characteristics of the Power Supply interface. Table 8. Power Supply Electrical Characteristics Supply Minimum Typical Maximum VBATT voltage (V) 3.2 3.7 4.35 VBATT_PA voltage (V) Full Specification 3.2 3.7 4.35 VBATT_PA voltage (V) Extended Range 2.8* 3.7 4.35 * No guarantee of 3GPP performances for VBATT_PA from 2.8 to 3.2V. Table 9. Maximum Current Consumption Supply Maximum VBATT 300mA VBATT_PA 400mA Note: If a single PSU is used, the recommended power supply capability is 400 mA + 300 mA = 700 mA. Maximum values are provided for VSWR 2.5:1 with worst conditions among supported ranges of voltages and temperature (including GPS consumption). 41111094 Rev 7 October 04, 2019 27 Product Technical Specification 3.2. Detailed Interface Specifications Current Consumption The following tables list the current consumption of the module at different conditions. Note: Table 10. Typical values are defined for VBATT/VBATT_PA at 3.7V and 25°C, for 50Ω impedance at all RF ports. USIM current consumption is not included. Low Current Consumption Mode Cat-M1 Modem Radio State Lowest Power Mode Configuration Typical Average Value Unit OFF OFF Module is switched off by AT command and VBATs are connected 1.8 µA 1.8 µA 30 µA 175a µA 185a µA 9a µA 35a µA Hibernate Floor current Lite Hibernate PSM Hibernate 1h cycle and T3324 = 20s Lite Hibernate Hibernate 24h cycle and T3324 = 20s Lite Hibernate TAU Occurrence is network dependent 82 µAh Calibration Applies to eDRX 81.92s and more 12 µAh 26 µA 28 µA eDRX cycle (TI-eDRX) = 20.48s and PTW and DRX = 1.28s Refer to section 3.3.1.2 Extended DRX (eDRX) 135c µA 135c µA eDRX cycle (TI-eDRX) = 81.92s and PTW and DRX = 1.28s Refer to section 3.3.1.2 Extended DRX (eDRX) 50c µA 55c µA 50 characters received 120 µAh 1.28s 2.4 (Target: 450 µAd) mA 2.56s 1.9 (Target: 300 µAd) mA 35 mA Hibernate Floor during eDRX Lite Hibernateb eDRX Hibernate Cycle Lite Hibernate Cycleb Hibernate Cycle Lite Hibernate Cycleb SMS Reception DRX Sleep DRX independent, +KSLEEP=2 or Wake active Running a Values are T3324 dependent. b Recommended mode. c Values are PTW and DRX dependent. d Enhancement will be available in a future firmware version. Refer to section 3.3.2 Power Modes for details regarding different low power modes. 41111094 Rev 7 October 04, 2019 28 Product Technical Specification Detailed Interface Specifications The values above assume the following conditions: • Cat-M1 • Good channel conditions (SINR > 5dB) • Static scenario • Cycle includes boot, cell acquisition, network attach, wait for timer expiry and back to sleep Table 11. Low Current Consumption Mode Cat-NB1 Modem Radio State Lowest Power Mode Configuration Typical Average Value Unit OFF OFF Module is switched off by AT command and VBATs are connected 1.8 µA 1.8 µA 30 µA 235a µA 265a µA 10a µA 40a µA Hibernate Floor current Lite Hibernate PSM Hibernate 1h cycle and T3324 = 20s Lite Hibernate Hibernate 24h cycle and T3324 = 20s Lite Hibernate TAU Occurrence is network dependent 100 µAh Calibration Applies to eDRX 81.92s and more 21 µAh 22 µA 27 µA 550c µA 560c µA 145c µA 150c µA 1.28s 10 (Target: 1.3 mAd) mA 2.56s 4.2 (Target: 700 µAd) mA 10.24s 2.5 (Target: 200 µAd) mA 38 mA Hibernate Floor during eDRX Lite Hibernateb eDRX Hibernate Cycle Lite Hibernate Cycleb Hibernate Cycle Lite Hibernate Cycleb Sleep eDRX cycle (TI-eDRX) = 20.48s and PTW and DRX = 1.28s Refer to section 3.3.1.2 Extended DRX (eDRX) eDRX cycle (TI-eDRX) = 81.92s and PTW and DRX = 1.28s Refer to section 3.3.1.2 Extended DRX (eDRX) DRX DRX independent, +KSLEEP=2 or Wake active Running a Values are T3324 dependent. b Recommended mode. c Values are PTW and DRX dependent. d Enhancement will be available in a future firmware version. Refer to section 3.3.2 Power Modes for details regarding different low power modes. 41111094 Rev 7 October 04, 2019 29 Product Technical Specification Detailed Interface Specifications The values above assume the following conditions: • Cat-NB1 • Good channel conditions • Static scenario • Cycle includes boot, cell acquisition, network attachment, wait for timer expiry and back to sleep Hibernate mode assumes the following conditions: • I/Os are not held (I/O state is undefined; VGPIO is off) • Customer application is not allowed to drive the module’s I/Os to level > 0.2V • UICC / USIM is off (ensure using a power saving compliant USIM/UICC) • The module only wakes up by a high level on the WAKE_UP pin Refer to document [4] AirPrime HL7800 Low Power Modes Application Note for additional information. Table 12. Typical Current Consumption for LTE Cat-M1 in Connected Mode for All Bands Parameter Band LTE Cat-M1 • Modem State: Connected (Connection is established) • 4RB_DL and 1RB_UL on 3UL/DL sub frames Table 13. 5, 8, 12, 13, 14, 18, 19, 20, 26, 27, 28 Average Current (Typical Values) 23 dBm 205 mA 0 dBm 115 mA 23 dBm 210 mA 0 dBm 120 mA Expected Typical Current Consumption for NB -1 in Connected Mode for All Bands Parameter Band NB1 DL peak throughput (27.2kbps) 1 NPDCCH, 4 Guard, 3 NPDSCH, 12 Guard, 2 NPUSCH, 3 Guard NB1 UL peak throughput (62.5kbps) 1 NPDCCH, 8 Guard, 4 NPUSCH, 3 Guard 41111094 1, 2, 3, 4, 25, 66 Output Power Rev 7 1, 2, 3, 4, 5, 8, 12, 13, 14, 17, 18, 19, 20, 25, 26, 28, 66 Output Power Average Current (Typical Values) 23 dBm 105 mA 0 dBm 100 mA 23 dBm 165 mA 0 dBm 130 mA October 04, 2019 30 Product Technical Specification 3.3. Detailed Interface Specifications Power Consumption States 3.3.1. 3GPP Power Saving Features This section describes power saving features that are specified by 3GPP and that are supported by the HL7800 and HL7800-M modules. As per 3GPP specification, these features include power states and behaviors that pertain only to the cellular communication part of the module and do not consider memory states, I/O states, etc., of the module overall. 3.3.1.1. Power Saving Mode (PSM) Power Saving Mode (PSM) is a 3GPP feature that allows the HL7800 and HL7800-M to minimize power consumption by registering on a PSM-supporting LTE network and entering PSM state (a very low power ‘dormant’ state). In order for the LTE network to know that the module is still present while it is in PSM state, the network will require the modem to periodically send a TAU (Tracking Area Update). If the module sends any data or does any other type of network transmission, the periodic TAU timer would be restarted. The periodic TAU periodicity is negotiated with the LTE network (i.e. the module will request the desired duration and the network will reply with the value to be used). During the PSM state the module is unreachable by the network until it wakes up to perform the periodic TAU or the module is woken up by the WAKE_UP pin. Host processor can wake up the module using the WAKE_UP and send data to the network at any time during the PSM state. It is not necessary to synchronize the application data transmission periodicity with that of the periodic TAU. While the HL7800 or HL7800-M is in PSM: • Power consumption is significantly reduced with longer dormant periods • Networking layer signaling overhead is reduced • Radio resource signaling is reduced Typical candidates for PSM are systems (such as monitors and sensors) that: • Require long battery life (low power consumption) • Infrequently send mobile originated data (every few hours, days, weeks, etc.), with optional reply data from network • Tolerate modules being inaccessible for long periods of time • Do not use mobile-terminated voice/data/SMS. Some networks may not allow mobile terminated data during PSM but using eDRX is a better option for applications that need mobile terminated (network originated) data. PSM can be activated by the user either before or after the module attaches to the network. If PSM is activated before the attach, then module will request PSM during the attach. If PSM is activated after the attach, the module will immediately request PSM from the network with a TAU message. The user may also modify the requested PSM parameters afterwards, the module will update the network using a TAU. The following example describes how the module uses PSM by requesting PSM after the attach (as shown in Figure 4 PSM Example (Simplified)): 1. Module attaches on an LTE network. 2. User enables PSM via +CPSMS, specifying the desired periodic TAU timer and Active timer periods. 3. The PSM request including the settings (as specified in +CPSMS) are sent to the network by the module within a TAU message. 41111094 Rev 7 October 04, 2019 31 Product Technical Specification Detailed Interface Specifications 4. Network sends a response that indicates if the UE may use PSM and the PSM parameters that should be used. The network may adjust the PSM parameters from those requested by the UE. 5. If the network supports PSM: a. Module enters idle mode (waiting for Rx from network). b. When module has remained idle for the Active timer period, module powers off (except for maintaining timer and interrupts) and enters PSM. c. Module remains in PSM for the specified TAU timer period or until the WAKE_UP pin wakes it. i. If the module does not send any data or does not access the network before the TAU timer period expires, then the module sends a TAU to the network. ii. If the module sends data to the network before the TAU timer period expires, the TAU timer is restarted. The module can be woken with the WAKE_UP in order to send data at any time. The network application server may send data back to the module before the PSM active timer expires. If the module sends data to the network more often than the periodic TAU timer period, the UE would not need to send a TAU. d. Module enters idle mode and cycle repeats. Current (not to scale) Note: Simplified current consumption pattern to illustrate general structure of PSM cycle power state transitions. Module registered on network 1. 2. 3. 4. Module transmits TAU and exchanges data with network User enables PSM. Module requests user-specified TAU-timer period. Network responds with actual TAU-timer period to use. Module enters and stays in idle mode until idle mode remains uninterrupted for the Active timer duration. Data Tx Idle window — Module waits for Rx Wake event: - TAU timer expires - WAKE_UP Pin before timer expires Power off Module enters PSM (Dormant, very low power) Idle (Active timer (T3324)) Power up TAU procedure Periodic TAU — PSM Cycle Timer (T3412) Power off Module returns to dormant state, PSM cycle repeats Time Idle (Active timer (T3324)) PSM Cycle Figure 4. PSM Example (Simplified) Note that: • The PSM Periodic-TAU timer and Active Time values must be carefully selected to match the intended use case(s) for the module:  41111094 Periodic TAU PSM Cycle timer (T3412) – This is the maximum time the module can be away from the network (i.e. without a transmission). The module will automatically send a periodic TAU message to the network when this timer expires. If the module accesses the network (for example for mobile originated data) this timer would restart, and the module does not need to access the network for another T3412 duration. Typically, PSM should be used for applications that originate data from the module so the requested T3412 should be much longer than the expected period of the data originating from the module. Reducing the number of TAU will help reduce current consumption. Note that if the module were to fail to access the network within this time, the module would need to Rev 7 October 04, 2019 32 Product Technical Specification Detailed Interface Specifications reattach to the network. While the module is in PSM the network will not attempt to access the module.  Active Time (T3324) – This is the duration of time that the module and the network are to be idle (without sending/receiving any data) to trigger the module to enter PSM state. This timer starts when the module enters idle state and will restart when there are any data transfers (to/from module). If the module/network do not send any data for T3324 period, the module will enter PSM state. The intent of this timer is to allow for a period of time for the module and the network server to communicate. The value of this timer should be selected to match the expected module to/from network server packet delays (using shorter durations would save more current).  While it may be possible to set a large Active Time (T3324) such that mobile terminated access after a TAU is possible, it may be difficult to reliably send data to the UE as the exact time of the TAU may vary. Instead, the module application should periodically poll the network server if the module is to be accessible. With this approach a shorter Active Time (T3324) can be used and a longer periodic TAU time (T3412) – the timing of when the module is accessible is also more accurate. The polling packet sent by the module would use a similar amount of current as a TAU. It is recommended to use eDRX (as described in the next section) instead of PSM if the module needs to be truly accessible. When using multiple devices, consider scheduling the modules to wake at different times so that the network does not get flooded by all modules waking and transmitting simultaneously. • 3.3.1.2. Extended DRX (eDRX) Current Extended Idle DRX (I-eDRX) is a 3GPP specified feature that reduces the number of Paging Occasions (PO) that the module needs to monitor. Many data module applications are tolerant to delays in downlink data packets so extending the paging cycle would allow for current consumption savings for these applications. The HL7800 and HL7800-M support eDRX and can take advantage of the feature by entering a low power state between the eDRX cycles. The periodicity of the eDRX cycles (TI-eDRX) and the duration of the Paging Transmission Window (PTW) are shown in the diagram below. The module application can negotiate specific eDRX parameter values with the network. Device in C-DRX mode Idle DRX (I-DRX) TI-DRX Current Paging Occurrence 4 Paging Occurrence 4 Time PTW Very long sleep duration TI-eDRX Time Idle eDRX (I-eDRX) Figure 5. eDRX Example (PTW: 4 Paging Occurrences) The HL7800 and HL7800-M enter a very low current consumption state between eDRX cycles. However, for short period of time right after the module enters idle state, the module will have a few extra short wake ups for clock calibration (shorter than an eDRX monitor). The following figure shows 41111094 Rev 7 October 04, 2019 33 Product Technical Specification Detailed Interface Specifications an eDRX power consumption profile with a periodic TAU event. Notice that after the TAU, the eDRX 81.92s cycle is restored slowly by several iterations from 10s to 20s then to 40s before reaching the 81.92s wake. This behavior is mandatory by design and cannot be avoided. Figure 6. eDRX Power Consumption Profile Interruption The following table describes available methods for configuring eDRX. Table 14. eDRX-Related Commands AT Command Description AT+CEDRXS Enable/disable eDRX and configure related settings AT+CEDRXRDP Display current eDRX settings For example: • Use the AT+CEDRXS command to configure the desired TI-eDRX value. • During the network attach or TAU process: •  eDRX request with the settings (as specified in AT+CEDRXS) is sent to the network.  Network responds if the UE may use eDRX and the eDRX parameters that should be used. The network may adjust the eDRX parameters from those requested by the UE. If eDRX is accepted by the network, the UE will only need to monitor during the eDRX paging occurrences. The UE may enter low power mode state between the eDRX paging occurrences (depending on the UE configuration). Note that: • The eDRX parameters must be carefully selected to match the intended use case(s) for the module. The module can only be paged at an eDRX paging occasion, hence, longer eDRX cycles will delay mobile terminated data reception. Selecting shorter eDRX cycles will reduce the latency but if the eDRX cycles are too short then there will be lower power savings. The duration of the eDRX cycle should be appropriately selected for the specific use case. • Network-side store and forward is supported – Packets will be stored until the module’s next eDRX paging occurrence. 41111094 Rev 7 October 04, 2019 34 Product Technical Specification 3.3.1.3. Detailed Interface Specifications Possible Concurrent Modes These two modes may run concurrently in a future firmware release; that is, eDRX may be performed during the active window of PSM. For example, for a PSM of one day (T3412 of 86400s) with an active window (T3324) of 5 minutes (300s), the module may be in an eDRX power saving mode of 82s for 3 cycles then sleep for 23h55 until the next TAU during the 5-minute active window. 3.3.2. Power Modes In addition to the 3GPP power saving features, several low power modes are defined for the AirPrime HL7800 and HL7800-M modules. There are three power modes defined, as follows: • Sleep mode: 26Mhz system clock is OFF, all memories and I/O states are retained. The module can wake-up via the WAKE_UP signal or UART1_DTR. • Lite Hibernate mode: RTC, I/O states and a part of the RAM are ON (RAM is only used for 4G protocol state and data). The module can wake-up via the WAKE_UP signal or UART1_DTR. • Hibernate mode: RTC and optionally part of the RAM (depending on the 4G modem state) are ON. The module can only wake-up only via the WAKE_UP signal. (All I/Os are in undefined state.) These modes can be configured using the +KSLEEP AT command. Note that: • When the module exits from Lite Hibernate or Hibernate mode, the host processor will act as after a module reset (all non-persistent configurations are lost). • Sleep mode is recommended for regular DRX mode. • Hibernate mode is recommended when the module is configured in PSM or eDRX mode. The table below summarizes these low power modes. Table 15. Low Power Modes Power Mode Possible Modem State I/O State Hardware Wake-Up Signal Source Sleep Stack OFF, DRX, eDRX, PSM, No service Retained UART1_DTR WAKE_UP Lite Hibernate Stack OFF, eDRX, PSM, No service Retained UART1_DTR WAKE_UP Hibernate Stack OFF, eDRX, PSM Not retained WAKE_UP Warning: If USB_VBUS is connected, it will not be possible to enter Lite Hibernate or Hibernate mode. Refer to document [4] AirPrime HL7800 Low Power Modes Application Note for additional details, especially on the relationship between 3GPP power saving features and the HL7800 and HL7800-M power modes. Additionally, refer to document [5] AirPrime HL7800-M MNO and RF Band Customization at Customer Production Site Application Note for band selection details since it impacts power consumption. 41111094 Rev 7 October 04, 2019 35 Product Technical Specification 3.3.3. Detailed Interface Specifications Digital I/O during Hibernate Power Mode The following behavior are only applicable to digital I/Os in Hibernate mode in eDRX and PSM; it is not applicable when in Lite Hibernate or Sleep mode. • VGPIO is OFF. • No I/O should be biased as no internal source exists. The maximum allowed voltage is ±0.2V at any I/O. • All I/Os referenced to VGPIO are undefined. • All I/Os referenced to VGPIO are restored to their state at every wake; that also includes their reset state as described in Table 5 Pin Definition. For example, if an I/O has a low state before entering Hibernate mode but has a PU state during reset, the I/O state will be undefined during Hibernate mode and then will be high due to the PU during the few hundred ms reset mode and then restored at its low level; this happens at every wake cycle of hibernate mode. The behavior described above generates a toggling of various I/Os like the UART lines and the GPIOs during the Hibernate mode and can result in unwanted I/O activity from the host processor’s point of view. Every line referenced to VGPIO as described in section 2 Pad Definition is affected by this behavior. 41111094 Rev 7 October 04, 2019 36 Product Technical Specification 3.3.3.1. Detailed Interface Specifications In PSM Mode VGPIO and I/O (with Pull Up by default) are both high for 34.9 s corresponding to the TAU procedure + 30s of activity window, time duration while the module can be reach from the network (T3324). Figure 7. 3.3.3.2. PSM I/O Toggling during TAU and the Active Window (T3324) In eDRX Mode At every eDRX paging wake, the VGPIO is present and so is any GPIO (with Pull Up by default). In the figure below, the eDRX cycle is 20s of sleep and 1.024s of activity. Figure 8. eDRX Cycle of 20s sleep and 1.024s of Activity For eDRX cycles of 81.92 s or longer, that is a 10-minute internal calibration period that repeats at every TAU cycle. In this case, the eDRX wakes are added to the internal calibration wakes and results in thin extra wakes of VGPIO that results in I/O toggling. This may influence the application processor or customers’ interface. Also, these thin internal calibration wakes (that lasts for 10 minutes) repeat every 10 seconds, then every 20 s, then every 40 s before reaching the final 80 seconds wake. 41111094 Rev 7 October 04, 2019 37 Product Technical Specification Figure 9. Detailed Interface Specifications eDRX with Extra Calibration Wakes Eventually, a stable eDRX wake repeats every cycle without extra wakes. In the following figure, a PTW of 1.02 is used with a cycle of 81.92s. Figure 10. Stable eDRX Cycle of 81.92s after Calibration 3.4. VGPIO The VGPIO output can be used to: • Pull-up signals such as I/Os. • Supply the digital transistors driving LEDs. The VGPIO output is available when the module is switched ON. Note that VGPIO is OFF during Hibernate mode. Refer to the following table for the pin description of the VGPIO interface. 41111094 Rev 7 October 04, 2019 38 Product Technical Specification Table 16. Detailed Interface Specifications VGPIO Pin Description Pad Number Signal Name I/O Description C45 VGPIO O GPIO voltage output Refer to the following table for the electrical characteristics of the VGPIO interface. Table 17. VGPIO Electrical Characteristics Parameter Minimum Typical Maximum Remarks Voltage level (V) 1.7 1.8 1.9 Applies to Active, Sleep, and Lite Hibernate modes. VGPIO is turned off during Hibernate mode. Current capability Active Mode (mA) - - 50 The total current from all I/Os combined, and supplied by VGPIO, should not exceed 50 mA. Current capability Sleep Mode (mA) Rise Time (ms) 1 - - 0.5 Start-Up time from 0V 3.5. Real Time Clock (BAT_RTC) Note: This interface will be available in a future firmware release. The AirPrime HL7800 and HL7800-M modules provide an input to connect a Real Time Clock power supply. This pin is used as a back-up power supply for the internal Real Time Clock. The RTC is supported when VBATT is available but a back-up power supply is needed to save date and hour when VBATT is switched off. This pin is input only and is not capable of charging a backup capacitor. Table 18. BAT_RTC Electrical Characteristics Parameter Minimum Typical Maximum Unit Input voltage 2.2 - 4.35 V Input current consumption - 10 µA 41111094 Rev 7 October 04, 2019 39 Product Technical Specification 3.6. Detailed Interface Specifications USIM Interface The AirPrime HL7800 and HL7800-M modules have one physical USIM interface, USIM1, and an optional internal USIM or eUICC. The USIM1 interface allows control of a 1.8V USIM (3V not supported) and is fully compliant with GSM 11.11 recommendations concerning USIM functions. The five signals used by this interface UIM1 are as follows: • UIM1_VCC: Power supply • UIM1_CLK: Clock • UIM1_DATA: I/O port • UIM1_RESET: Reset • UIM1_DET/GPIO3: Hardware SIM detection Refer to the following table for the pad description of the USIM1 interface. Table 19. USIM1 Pin Description Pad Number Signal Name Description C26 UIM1_VCC 1.8V USIM1 Power supply C27 UIM1_CLK 1.8V USIM1 Clock C28 UIM1_DATA 1.8V USIM1 Data C29 UIM1_RESET 1.8V USIM1 Reset C64 UIM1_DET 1.8V USIM1 Detection Multiplex GPIO3 Refer to the following table for the electrical characteristics of the USIM1 interface. Table 20. USIM1 Electrical Characteristics Parameter Minimum Typical Maximum Remarks UIM1 Interface Voltage (V) (VCC, CLK, I/O, RESET) - 1.80 - The appropriate output voltage is auto detected and selected by software. UIM1 Detect - 1.80 - High active UIM1_VCC Current (mA) - - 50 Max output current in sleep mode = 3 mA UIM1_VCC Power-up Setting Time (µs) from power down - 10 - 41111094 Rev 7 October 04, 2019 40 Product Technical Specification 3.6.1. Detailed Interface Specifications UIM1_DET Note: This interface will be available in a future release. UIM1_DET is used to detect and notify the application about the insertion and removal of a USIM device in the USIM socket connected to the main USIM interface (UIM1). When a USIM is inserted, the state of UIM1_DET transitions from logic 0 to logic 1. Inversely, when a USIM is removed, the state of UIM1_DET transitions from logic 1 to logic 0. Enabling or disabling this USIM detect feature can be done using the AT+KSIMDET command. For more information about this command, refer to document [2] AirPrime HL78xx AT Commands Interface Guide. (Note that this command is not yet available.) 3.7. USB Interface The AirPrime HL7800 and HL7800-M modules have one Universal Serial Bus Interface Full Speed. Refer to the following table for the pad description of the USB interface. Table 21. USB Pin Description Pad Number Signal Name I/O Function C12 USB_D- I/O USB Data Negative C13 USB_D+ I/O USB Data Positive C16 USB_VBUS I USB VBUS Refer to the following table for the electrical characteristics of the USB interface. Table 22. USB Electrical Characteristics Parameter Minimum Typical Maximum Unit Input voltage at pins USB_D+ / USB_D- 3.15 3.3 3.45 V USB_VBUS 4.75 5.0 5.25 V Note: USB_VBUS is a mandatory connection to supply the USB interface. When USB is used, the lowest power mode supported is Sleep mode. USB_VBUS must be not be connected if Hibernate or Lite Hibernate mode is used. 3.8. Electrical Information for Digital I/O The table below enumerates the electrical characteristics of the following digital interfaces. • UART • PCM • GPIOs • FAST_SHUTDOWN_N • EXT_LNA_GPS_EN 41111094 Rev 7 October 04, 2019 41 Product Technical Specification Table 23. Detailed Interface Specifications Digital I/O Electrical Characteristics Parameter Description Minimum VIH Logic High Input Voltage VIL Typical Maximum Unit 0.7 x VGPIO ** V Logic Low Input Voltage ** 0.3 x VGPIO V VOH Logic High Output Voltage 0.8 x VGPIO VOL Logic Low Output Voltage V 0.2 x VGPIO V I O* I/O Drive Strength 2 4 mA IIH Input current in Pull Down +10 +35 +45 µA IIL Input Current in Pull up -10 -35 -45 µA RPU Internal Pull-Down Resistor 13 50 65 KΩ RPD Internal Pull-Up Resistor 13 50 65 KΩ * The total current from all I/Os combined, and supplied by VGPIO, should not exceed 50mA. ** The maximum voltage allowed on digital I/O is ±0.2V during Hibernate mode. 3.9. General Purpose Input/Output (GPIO) The AirPrime HL7800 and HL7800-M modules provide 12 GPIOs, 3 of which are multiplexed. The following table describes the pin description of the GPIO interface. Table 24. GPIO Pin Description Pad Number Signal Name C1 Multiplex I/O Power Supply Domain GPIO1 I/O 1.8V C10 GPIO2 I/O 1.8V C40 GPIO7 I/O 1.8V C41 GPIO8 I/O 1.8V C46 GPIO6 I/O 1.8V C51 GPIO14 I/O 1.8V C52 GPIO10 I/O 1.8V C53 GPIO11 I/O 1.8V C54 GPIO15 I/O 1.8V C64 GPIO3 UIM1_DET I/O 1.8V C65 GPIO4* FAST_SHUTDOWN_N I/O 1.8V C66 GPIO5 I/O 1.8V VBATT_PA_EN * GPIO4 will be available in a future release. 41111094 Rev 7 October 04, 2019 42 Product Technical Specification Detailed Interface Specifications 3.10. Main Serial Link (UART1) The main serial link (UART1 up to 921.6Kbps) is used for communication between the module and a PC or host processor. It consists of a flexible 8-wire serial interface that complies with RS-232 interface. The main serial link (UART1) is an asynchronous serial interface; and is also used to upgrade the firmware locally. If possible, it is highly recommended to add 0Ω on every line to help the debug process. This will force the UART signal layout to the top PCB layer and allow access to the signal on the resistors. The signals used by UART1 are as follows: • TX data (UART1_TX) • RX data (UART1_RX) • Request To Send (UART1_RTS) • Clear To Send (UART1_CTS) • Data Terminal Ready (UART1_DTR) • Data Set Ready (UART1_DSR) • Data Carrier Detect (UART1_DCD) • Ring Indicator (UART1_RI) Note: Signal names are according to PC view. Refer to the following table for the pin description of the main serial link (UART1) interface. Table 25. UART1 Pin Description Pad Number Signal Name* I/O* Description C2 UART1_RI O (active low) Signal incoming calls (data only), SMS, etc. C3 UART1_RTS I (active low) Request to send C4 UART1_CTS O (active low) The module is ready to receive AT commands C5 UART1_TX I Transmit data C6 UART1_RX O Receive data C7 UART1_DTR I (active low) Prevents the module from entering sleep mode, switches between data mode and command mode, and wakes the module up. C8 UART1_DCD O (active low) Signal data connection in progress C9 UART1_DSR O (active low) Signal UART interface is ON * DTE (Data Terminal Equipment) convention, i.e. according to PC view. Some customer applications require to wake-up its host processor with the RI signal after SMS or IP reception. When using eDRX mode in combination with Hibernate low power mode, this use case cannot be handled through the standard UART1_RI signal because it is active low and cannot remain high in Hibernate mode. In order to overcome this system issue, several GPIOs can be configured as an inverted RI signal (RI_inverse_gpio; refer to AT+KRIC in documents [2] AirPrime HL78xx AT Commands Interface Guide and [4] AirPrime HL7800 Low Power Modes Application Note for details.) GPIO2 is used by default for this function; however, all GPIOs with an internal Pull Down (see Table 5) can also be used with AT+KRIC (it is recommended to add an external 470kΩ PD to keep the I/O in a defined state during Hibernate mode). 41111094 Rev 7 October 04, 2019 43 Product Technical Specification Detailed Interface Specifications 3.10.1. 8-wire Application AirPrime HL7800 and HL7800-M VGPIO TP UART1_RX TP UART1_CTS TP UART1_DSR TP UART1_DCD TP UART1_RI TP UART1_DTR TP UART1_TX TP UART1_RTS TP Level shifter use R R R R R R R R RXD CTS DSR DCD RI Customer Application DTR TXD RTS Note: R is a 0Ω resistor (default value) Figure 11. 8-wire UART Application Example 3.10.2. 4-wire Application AirPrime HL7800 and HL7800-M VGPIO TP UART1_RX TP UART1_CTS TP UART1_TX TP UART1_RTS TP Level shifter use R R R R RXD CTS TXD Customer Application RTS Note: R is a 0Ω resistor (default value) Figure 12. 4-wire UART Application Example 3.10.3. 2-wire Application AirPrime HL7800 and HL7800-M VGPIO TP UART1_RX TP UART1_TX TP Level shifter use R R RXD TXD Customer Application Note: R is a 0Ω resistor (default value) Figure 13. 41111094 2-wire UART Application Example Rev 7 October 04, 2019 44 Product Technical Specification Detailed Interface Specifications 3.11. Power On Signal (PWR_ON_N) The PWR_ON_N signal is internally pulled-up. Once VBATT is supplied to the module, the internal supply regulator is enabled and so the PWR_ON_N signal is by default at high level. In case the PWR_ON_N pin is not configured as managed by host (default configuration), the module starts regardless of the PWR_ON_N state. In case the RESET_IN_N signal is maintained low, the module will not start until RESET_IN_N is released. In case the PWR_ON_N pin is configured as managed by host, a low-level signal must be provided to switch the module ON. Table 26. PWR_ON_N Pin Description Pad Number Signal Name I/O Description C59 PWR_ON_N I Powers the module ON Table 27. PWR_ON_N Electrical Characteristics Parameter Minimum Typical Maximum Input Voltage-Low (V) Note: 0.3 As PWR_ON_N is internally pulled up, an open collector or open drain transistor must be used for ignition. VGPIO is an output from the module that can be used to check if the module is active. • When VGPIO = 0V, the module is OFF (or in low power mode) • When VGPIO = 1.8V, the module is ON (it can be in idle, communication or sleep mode) Note: PWR_ON_N cannot be used to power the module off. To power the module off, use AT command AT+CPOF or the RESET_IN_N pin. Also, don’t put the PWR_ON_N at low level or the WAKE_UP pin at high level during the power off sequence. 3.11.1. PWR_ON_N Not Managed (Default) COLD START VBATT VBATT_PA SOFT POWER OFF (AT+CPOF) HARD RESET RESTART from RESET_IN_N SOFT RESET (AT+CFUN=1,1) EMERGENCY OFF (HARD) T1 PWR_ON_N not managed (Keep this pin at low level (10µA over consumption) or Open) AT+CFUN=1,1 HW RESET HW RESET RESET_IN_N HW RESET Keep Low T5 T5 AT+CPOF VGPIO T2 UART1_CTS T3 T4 OFF Figure 14. 41111094 T2 T2 ON Module is ready to receive AT commands via UART1 AT 3GPP READY T2 T3 T3 T4 OFF ON AT 3GPP READY T3 T4 OFF ON T4 AT 3GPP READY AT 3GPP READY OFF Power Up and Power Down Sequence without PWR_ON_N Rev 7 October 04, 2019 45 Product Technical Specification Table 28. Detailed Interface Specifications PWR_ON_N Not Managed Timing Parameter Minimum Maximum* Unit T1: delay between VBATT and RESET_IN_N 1 ms T2: delay between RESET_IN_N and VGPIO 5 ms T3: delay between VGPIO and UART1_CTS 100 µs 10 s T4: delay Typical 8 T5: HW RESET delay 1 ms * Any external capacitor or resistor added on the customer application will change these values. 3.11.2. PWR_ON_N Managed Note: This interface will be available in a future firmware release. 3.11.2.1. First Power On On the first battery connection, the first power on sequence (cold start) will appear one time after PWR_ON_N configuration via AT command. Refer to section 3.11.2.2 Power Up and Power Down after the First Cold Start for details. COLD START VBATT VBATT_PA PWR_ON_N CONFIGURATION T1 PWR_ON_N not managed (Keep this pin at low level (10µA over consumption) or Open) RESET_IN_N VGPIO T2 UART1_CTS T3 OFF Figure 15. 41111094 ON T4 Module is ready to receive AT commands via UART1 AT CMD for PWR_ON_N Manage AT 3GPP READY Power Up Sequence with PWR_ON_N Cold Start Rev 7 October 04, 2019 46 Product Technical Specification 3.11.2.2. Detailed Interface Specifications Power Up and Power Down after the First Cold Start HARD RESET PWR_ON_N START SOFT POWER OFF (AT+CPOF) RESTART from PWR_ON_N* SOFT RESET (AT+CFUN=1,1) EMERGENCY OFF (HARD) P VBATT VBATT_PA T6 PWR_ON_N T9 T9 RESET_IN_N AT+CFUN=1,1 HW RESET HW RESET Keep Low T5 VGPIO T7 T8 UART1_CTS AT+CPOF T2 T3 ON T3 T4 AT 3GPP READY OFF ON T8 T3 T4 AT 3GPP READY OFF T4 AT 3GPP READY ON T3 T4 AT 3GPP READY OFF * After AT+CPOF, the module can be woken up by either the PWR_ON_N or WAKE_UP pin Figure 16. Power On Sequence with PWR_ON_N 3.11.2.3. Table 29. Timing PWR_ON_N Managed Timing Parameter Minimum T1: delay between VBATT and RESET_IN_N 0 T2: delay between RESET_IN_N and VGPIO Typical Unit ms 5 T3: delay between VGPIO and UART1_CTS T5: HW RESET delay Maximum* ms 100 1 ms ms T6: delay between VBATT and PWR_ON_N 100 ms T7: delay between VBATT and VGPIO 5 ms T8: delay between PWR_ON_N and VGPIO 5 ms T9: PWR_ON_N assertion time 25 1500 ms * Any external capacitor or resistor added on the customer application will change these values. 3.12. Reset Signal (RESET_IN_N) To reset the module, a low-level pulse must be sent on the RESET_IN_N pad for at least 1 ms. This action will immediately restart the module. During reset, all I/Os will be undefined if no external signal is driven high (if the host processor drives some I/O high, a voltage leakage will appear on VGPIO and on all GPIOs with a pull-up). Warning: It is forbidden to drive any I/Os during reset or Hibernate mode to high electrical level over 0.2V. It is also forbidden to set RESET_IN_N low during a power recycle. VBATT must always be ≥ 3.2V when reset is at low level. 41111094 Rev 7 October 04, 2019 47 Product Technical Specification Detailed Interface Specifications As RESET_IN_N is internally pulled up, an open collector or open drain transistor should be used to control this signal. Refer to the following table for the pad description of the RESET_IN_N interface. Table 30. RESET_IN_N Pin Description Pad Number Signal Name I/O Description C11 RESET_IN_N I Reset signal Refer to the following table for the electrical characteristics of the RESET_IN_N interface. Table 31. RESET_IN_N Electrical Characteristics Parameter Minimum Typical Maximum Input Voltage-Low (V) 0.3V Reset assertion time (ms) Note: 1 ms As RESET_IN_N is internally pulled up, an open collector or open drain transistor must be used for ignition. 3.13. Analog to Digital Converter (ADC) Two Analog to Digital Converter inputs, ADC0 and ADC1, are provided by AirPrime HL7800 and HL7800-M modules. These converters are 12-bit resolution ADCs ranging from 0 to 1.8V. Typical ADC use is for monitoring external voltage, wherein an application is used to safely power OFF an external supply in case of overvoltage. Refer to the following table for the pad description of the ADC interface. Table 32. ADC Pin Description Pad Number Signal Name I/O Description C24 ADC1 I Analog to digital converter C25 ADC0 I Analog to digital converter Refer to the following table for the electrical characteristics of the ADC interface. Table 33. ADC Electrical Characteristics Parameter Minimum ADCx Resolution 6 FCLK 4 Typical 40 FS FCLK / (N+3) Input Voltage Range 1.8 Integral Nonlinearity ± 1.0 Differential Nonlinearity 41111094 ± 1.0 Rev 7 Maximum Unit 12 bits 52 MHz Remarks MSPS Conversion rate per channel* V General purpose input ± 2.0 LSB ± 1.0 LSB October 04, 2019 48 Product Technical Specification Parameter Detailed Interface Specifications Minimum Typical Maximum Unit Remarks Offset Error ± 1.0 ± 2.0 LSB % FS Gain Error ± 1.0 ± 2.0 LSB % FS 0.5 KΩ Input Resistance Input Capacitance during sampling phase 2.6 pF * The general formula for this conversion rate is FS=FCLK / (N+3) / number of sources. 3.14. Clock Interface The AirPrime HL7800 and HL7800-M modules support two digital clock interfaces. Enabling or disabling the clock out feature can be done using AT commands. For more information about AT commands; refer to document [2] AirPrime HL78xx AT Commands Interface Guide. Refer to the following table for the pad description of the clock out interfaces. Table 34. Clock Interface Pin Description Pad Number Signal Name I/O I/O Type Description C22 26M_CLKOUT O 1.8V 26MHz Digital Clock output C23 32K_CLKOUT O 1.8V 32.768kHz Digital Clock output 3.15. PCM Note: This interface will be available in a future release. 3.16. Debug Interfaces The AirPrime HL7800 and HL7800-M modules provide two 4-wire debug port interfaces. The CLI interface and the Modem Logs interface can be used with the AT interface for full debug capability. 3.16.1. Command Line Interface (CLI) Table 35. CLI Interface Pin Description Pad Number Signal Name* I/O* I/O Type Description C55 UART0_RX O 1.8V Debug Receive Data C56 UART0_TX I 1.8V Debug Transmit Data C57 UART0_CTS O 1.8V Debug Clear to Send C58 UART0_RTS I 1.8V Debug Request to Send * According to PC/host view. Note: 41111094 It is highly recommended to provide access through Test Points to this UART0 interface (required to enter in recovery mode; for example, for Flash dump). Rev 7 October 04, 2019 49 Product Technical Specification Detailed Interface Specifications 3.16.2. Modem Logs interface Table 36. Modem Logs Interface Pin Description Pad Number Signal Name* I/O* I/O Type Description C51 GPIO14 O 1.8V UART3_CTS C52 GPIO10 I 1.8V UART3_TX C53 GPIO11 I 1.8V UART3_RTS C54 GPIO15 O 1.8V UART3_RX * According to PC/host view. Note: If there are no constrains on GPIO use, it is highly recommended to provide access through Test Points to these 4 GPIOs to access to the UART3 interface (required to debug modem logs). 3.17. Wake Up Signal (WAKE_UP) The AirPrime HL7800 and HL7800-M modules provide one WAKE_UP signal. The WAKE_UP pin is used to wake up the system from low power modes (from OFF, Sleep modes, FAST_SHUTDOWN, or after a software power off). This signal should be set to high level (external 1.8V) until the system is active to wake the module up from these modes. The system will not be allowed to go into low power or off mode for as long as this signal is kept high. By default, the software waits for a high state to wake up (100KΩ internal pull-down). Refer to the following table for the pad description of the WAKE_UP signal. Table 37. WAKE_UP Pin Description Pad Number Signal Name I/O I/O Type Description C44 WAKE_UP I 1.8V Wakes the module up from low power mode Refer to the following table for the electrical characteristics of the WAKE_UP signal. Table 38. I/O Type Digital 41111094 WAKE_UP Electrical Characteristics Parameter Minimum VIL VIH 1.2 Rev 7 Typical Maximum Unit 0.3 V V October 04, 2019 50 Product Technical Specification Detailed Interface Specifications 3.18. Fast Shutdown Signal (FAST_SHUTDOWN_N) Note: This signal will be available in a future firmware release. The AirPrime HL7800 and HL7800-M modules provide one Fast Shutdown signal, FAST_SHUTDOWN_N. Refer to the following table for the pad description. Table 39. FAST_SHUTDOWN_N Pin Description Pad Number Signal Name I/O I/O Type Description C65 FAST_SHUTDOWN_N I 1.8V Shuts the module down without deregistration from the network Refer to the following table for the electrical characteristics of the FAST_SHUTDOWN_N signal. Table 40. FAST_SHUTDOWN_N Electrical Characteristics I/O Type Parameter Minimum Typical VIL Digital VIH Maximum Unit 0.3xVGPIO V 0.7 x VGPIO V * VGPIO typical = 1.8 V. 3.19. RF Interface The RF interface of the AirPrime HL7800 and HL7800-M modules allow the transmission of RF signals. Contact Sierra Wireless technical support for assistance in integrating the AirPrime HL7800 or HL7800-M on applications with embedded antennas. 3.19.1. RF Connection A 50Ω (with maximum VSWR 1.1:1, and 0.5dB loss) RF track is recommended to be connected to standard RF connectors such as SMA, UFL, etc. for antenna connection. Refer to the following table for the pad description of the RF interface. Table 41. RF Main Pin Description Pad Number RF Signal C48 GND C49 RF_MAIN C50 GND 41111094 Rev 7 Impedance VSWR Rx (max) VSWR Tx (max) 50Ω 2.5:1 2.5:1 October 04, 2019 51 Product Technical Specification Detailed Interface Specifications 3.19.2. Maximum Output Power The maximum transmitter output power of the AirPrime HL7800 and HL7800-M for all bands in normal operation conditions (25°C) is specified in the following table. Table 42. Maximum Output Power Minimum Typical Maximum Units Notes 21.5 23 24.5 dBm Power class 3 3.19.3. Rx Sensitivity The module’s receiver sensitivity is specified in the following table. The test condition used for the following values are those defined in 3GPP TS36.521v13, as follows: • Cat-M1: BW of 5 MHz, on Reference Measurement Channel • NB1: on DL Reference Measurement Channel defined Table 43. Typical Conducted Cat-M1 RX Sensitivity LTE Band Typical Reference Sensitivity Level @ 95% of the Maximum Throughput @+25°C (dBm) @Class A (dBm) 3GPP Limit (dBm) B1 -105 -103.5 -102.3 B2 -105 -104 -100.3 B3 -106 -104.5 -99.3 B4 -105 -103.5 -102.3 B5 -106 -105 -100.8 B8 -106 -104 -99.8 B9 -106 -104.5 B10 -105 -103.5 B12 -106 -104.5 -99.3 B13 -106 -105 -99.3 B14 -106 -105 B17 -106 -104.5 B18 -106 -105 -100.3 B19 -106 -105 -102.3 B20 -106 -105 -99.8 B25 -106 -104 B26 -106 -104.5 -100.3 B27 -106 -105.5 -100.8 B28 -106 -105 -100.8 B66 -105 -103.5 41111094 Rev 7 October 04, 2019 52 Product Technical Specification Table 44. Detailed Interface Specifications Typical Conducted NB1 RX Sensitivity Typical Reference Sensitivity Level @ 95% of the Maximum Throughput LTE Band @+25°C (dBm) @Class A (dBm) 3GPP Limit (dBm) B1 -114 -112.5 -107.5 B2 -114.5 -113.1 -107.5 B3 -115 -113.5 -107.5 B4 -114 -112.6 -107.5 B5 -114.5 -113.3 -107.5 B8 -114 -112.8 -107.5 B9 NA NA NA B10 NA NA NA B12 -113.5 -112.2 -107.5 B13 -114 -112.8 -107.5 B14 -113.5 -112.3 -107.5 B17 -114 -112.7 -107.5 B18 -114.5 -113.2 -107.5 B19 -114.5 -113.2 -107.5 B20 -114 -112.7 -107.5 B25 -114 -112.7 -107.5 B26 -114.8 -113.5 -107.5 B27 NA NA NA B28 -114 -112.7 -107.5 B66 -114 -112.5 -107.5 3.20. TX Indicator (TX_ON) Note: This signal will be available in a future firmware release. The AirPrime HL7800 and HL7800-M modules provide a signal, TX_ON, for TX emission indication. Table 45. TX_ON Pin Description Pad Number Signal Name I/O I/O Type Description C60 TX_ON O 1.8V High during TX emission, low when there is no TX 41111094 Rev 7 October 04, 2019 53 Product Technical Specification TX_ON Detailed Interface Specifications T duration VBATT_PA Voltage drop T advance Figure 17. T delay TX_ON State during TX Burst 3.21. External RF Voltage Control Indicator Note: This signal will be available in a future firmware release. The AirPrime HL7800 and HL7800-M modules provide a signal, VBATT_PA_EN, for RF activity indication. VBATT_PA_EN is used to drive an external LDO or DCDC that provides VBATT_PA power supply. It is recommended to add an external 470kΩ PD to keep the I/O in a defined state during Hibernate mode. Table 46. VBATT_PA_EN Pin Description Pad Number Signal Name I/O I/O Type Description C41 GPIO8 / VBATT_PA_EN O 1.8V High when VBATT_PA is supplied, low if no power supply is required GPIO8 / VBATT_PA_EN T duration VBATT_PA T advance Figure 18. 41111094 T delay VBATT_PA_EN State during RX/TX windows Rev 7 October 04, 2019 54 Product Technical Specification Table 47. Detailed Interface Specifications VBATT_PA_EN Characteristics Parameter Typical* Tadvance 400 µs Tdelay 400 µs * Typical values to be optimized in a future firmware release. 3.22. GPS Interface Note: This interface will be available in a future release. The AirPrime HL7800 and HL7800-M’s GPS supports GPS L1 signal (1575.42 ± 20 MHz) and GLONASS L1 FDMA signals (1597.5 – 1605.8 MHz), with 50Ω connection on the RF_GPS pad. Note: The GPS receiver shares the same RF resources as the 4G receiver. The end-device target should allow GPS positioning for asset management applications where infrequent and no real-time position updates are required. GPS antenna interface specifications are defined in the table below. Table 48. GPS Antenna Specifications Characteristics Frequency (MHz) Value GPS L1 1575.42 ± 20 RF Impedance (Ω) 50 VSWR max 2:1 3.22.1. GPS Performance Refer to the following table for GPS performance details. Table 49. GPS Performance Parameters Sensitivity TTFF 2D Position Error Conditions Typical Value Cold Start -146dBm Hot Start -152dBm (TBC) Tracking -161dBm Cold start, Input power -130dBm 40s Hot start, Input power -130dBm 2s (TBC) Input power -130dBm 2.5m 3.22.2. GPS Antenna Indicator (EXT_LNA_GPS_EN) Note: 41111094 This signal will be available in a future firmware release. Rev 7 October 04, 2019 55 4. Mechanical Drawings Figure 19. 41111094 Mechanical Drawing Rev 7 October 04, 2019 56 Product Technical Specification Figure 20. 41111094 Mechanical Drawings Dimensions Drawing Rev 7 October 04, 2019 57 Product Technical Specification Figure 21. 41111094 Mechanical Drawings Footprint Drawing Rev 7 October 04, 2019 58 5. Design Guidelines 5.1. Power Supply Design The AirPrime HL7800 and HL7800-M should not be supplied with voltage over 4.35V, even temporarily or however briefly. If the system’s main board power supply unit is unstable or supplied with voltage over 4.35V, even in the case of transient voltage presence on the circuit, the module’s power amplifier may be severely damaged. To avoid such issues, add a voltage limiter to the module’s power supply lines so that VBATT and VBATT_PA signal pads will never receive a voltage surge over 4.35V. The voltage limiter can be as simple as a Zener diode. 5.2. Power Cycle In addition to Sierra Wireless’ reliable recovery mechanisms, it is highly recommended that the ability for a power cycle to reboot the module be included in the design in case the module becomes blocked and stops responding to reset commands. 5.3. ESD Guidelines for USIM Decoupling capacitors must be added according to the drawings below as close as possible to the USIM connectors on UIM1_CLK, UIM1_RST, UIM1_VCC, UIM1_DATA and UIM1_DET signals to avoid EMC issues and to comply with the requirements of ETSI and 3GPP standards covering the USIM electrical interface. A typical schematic including USIM detection is provided below. 41111094 Rev 7 October 04, 2019 59 Product Technical Specification Design Guidelines D100 UIM1_VCC UIM1_CLK UIM1_RESET UIM1_DATA UIM1_DET 12pF GND 5 UIM1_RESET 2 RST VPP 6 3 CLK I/O 7 4 C4 C8 8 100nF DNI UIM1_CLK VGPIO 9 SW_A SW_B 10 Figure 22. 1KΩ UIM1_DET 100KΩ CN100 UIM1_DATA DNI 1 VCC 1nF UIM1_VCC EMC and ESD Components Close to the USIM Sierra Wireless recommends using diode ESDALC6V1-5P6 ESD for D100. 5.4. ESD Guidelines for USB CONNECTOR When the USB interface is externally accessible, it is required to have ESD protection on the USB_VBUS, USB_D+ and USB_D- signals. USB_VBUS USB_D+ USB_D- 1 2 2 3 1 AirPrime HL7800 and HL7800-M 3 Figure 23. ESD Protection for USB Note: It is not recommended to have an ESD diode with feedback path from USB_VBUS to either USB_D+ or USB_D-. Sierra Wireless recommends using ESD diode RCLAMP0503N or ESD5V3U2U-03LRH. 41111094 Rev 7 October 04, 2019 60 Product Technical Specification 5.5. Design Guidelines Radio Frequency Integration The AirPrime HL7800 and HL7800-M are equipped with an external antenna. A 50Ω line matching circuit between the module, the customer’s board and the RF antenna is required as shown in the example below. AirPrime HL7800 and HL7800-M RF_GPS TBD RF_MAIN TBD TBD 33pF TBD components are optional circuits for tuning. Figure 24. Antenna Connection Sierra Wireless recommends using ESD diode ESD103-B1-02EL E6327 for RF_MAIN and ESD8011MUT5G for RF_GPS. Note: 41111094 The (optional) antenna detection circuit will be available in a future release. Rev 7 October 04, 2019 61 6. Reliability Specification The AirPrime HL7800 and HL7800-M modules will be tested against the Sierra Wireless Industrial Reliability Specification defined below. 6.1. Preconditioning Test Per JESD22A113, this test the preconditioning of non-hermetic surface mount devices prior to reliability testing. Table 50. Preconditioning Test Designation Condition Preconditioning Test PCRM 2 reflow cycles with Tmax 245-250°C 6.2. Table 51. Performance Test Performance Test Designation Condition Performance Test PT3T & PTRT Standard: N/A Special conditions: • Temperature:  Class A: -30°C to +70°C  Class B: -40°C to +85°C  Rate of temperature change: ± 3°C/min • Recovery time: 3 hours Operating conditions: Powered Duration: 14 days 41111094 Rev 7 October 04, 2019 62 Product Technical Specification 6.3. Table 52. Reliability Specification Aging Tests Aging Tests Designation Condition High Temperature Operating Life test HTOL Standard: IEC 680068-2-2, Test Bb Special conditions: • Temperature: +85°C • Temperature variation: 1°C/min Operating conditions: Powered ON with a power cycle of 45 minutes ON and 15 minutes Idle Duration: 20 days Thermal Shock Test TSKT Standard: IEC 60068-2-14, Test Na Special conditions: • Temperature: -40°C to +85°C • Temperature Variation: less than 30s • Number of cycles: 300 • Dwell Time: 10 minutes Operating conditions: Un-powered Duration: 7 days Humidity Test HUT Standard: IEC 60068-2-3, Test Ca Special conditions: • Temperature: +85°C • RH: 85% Operating conditions: Powered on, DUT is powered up for 15 minutes and OFF for 15 minutes Duration: 10 days 41111094 Rev 7 October 04, 2019 63 Product Technical Specification 6.4. Table 53. Reliability Specification Characterization Tests Characterization Tests Designation Low Temperature and Cold Start Cycles LTCS Condition Special conditions: • Temperature: -40°C • AT commands read or write memory Operating conditions: 5 mins powered ON, 30 mins powered OFF (1 power cycle) Duration: 5 days Component Solder Wettability CSW Standard: JESD22 – B102, Method 1/Condition C, Solderability Test Method Special conditions: • Test method: Surface mount process simulation test (preconditioning 16 h ±30 minutes dry bake) Operating conditions: Un-powered Duration: 1 day Unprotected Free Fall Test FFT 1 Standard: IEC 60068-2-32, Test Ed Special conditions: • Number of drops: 6 drops per unit (1 drop per direction: ±X, ±Y, ±Z) • Height: 1m Operating conditions: Un-powered Duration: 1 day 41111094 Rev 7 October 04, 2019 64 7. Legal Information 7.1. Japan Radio and Telecom Approval The end device embedding the AirPrime HL7800 or HL7800-M should affix the certification indication on its surface following the recommendations below: • The diameter of the Japan Approval mark must be 3mm or bigger. • The size, font and color of the Radio Certification Type number is not regulated but should be easily distinguished. Figure 25. Sample Japan Certification Indication 7.2. Korean Approval The end device embedding the AirPrime HL7800 or HL7800-M should affix the certification indication on its surface following the recommendations below: Figure 26. Sample Korean Approval 7.3. FCC Statement This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: 1. This device may not cause harmful interference, and 2. this device must accept any interference received, including interference that may cause undesired operation. Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. 41111094 Rev 7 October 04, 2019 65 Product Technical Specification 7.3.1. Legal Information Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator and your body. This device is intended only for OEM integrators under the following conditions: 1. The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2. The transmitter module may not be co-located with any other transmitter or antenna. As long as the 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. IMPORTANT NOTE: In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. 7.3.2. End Product Labeling This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: “Contains FCC ID: N7NHL78M”. The grantee's FCC ID can be used only when all FCC compliance requirements are met. 7.3.3. Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as shown in this manual. 7.3.4. Antenna Installation The RF signal must be routed on the application board using tracks with a 50Ω characteristic impedance. Basically, the characteristic impedance depends on the dielectric, the track width and the ground plane spacing. In order to respect this constraint, Sierra Wireless recommends using MicroStrip or StripLine structure and computing the track’s width with a simulation tool (like AppCad shown in the figure below and that is available free of charge at https://www.broadcom.com/appcad). 41111094 Rev 7 October 04, 2019 66 Product Technical Specification Legal Information If a multi-layered PCB is used, the RF path on the board must not cross any signal (digital, analog or supply). If necessary, use StripLine structure and route the digital line(s) "outside" the RF structure. An example of proper routing is shown in the figure below. Stripline and Coplanar design requires having a correct ground plane at both sides. Consequently, it is necessary to add some vias along the RF path. RF tracks must be isolated from any others signals by ground. RF tracks width should be as large as possible to reduce the insertion loss (at least > 250 µm). In many cases, depending on PCB layout structure, it is easier to have a large RF tracks width with Microstrip structure compared to Stripline or Coplanar structure. The RF signal (when transmitting) may interfere with neighboring electronics (AF amplifier, etc.) In the same way, the neighboring electronics (microcontrollers, etc.) may degrade the reception performances. In such cases, Stripline structure can be useful because the RF track is shielded. The GSM/GPRS connector is intended to be directly connected to a 50Ω antenna and no matching is needed. 7.4. IC Statement This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: 1. this device may not cause interference, and 2. this device must accept any interference, including interference that may cause undesired operation of the device. 41111094 Rev 7 October 04, 2019 67 Product Technical Specification Legal Information Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: 1. l'appareil ne doit pas produire de brouillage, et 2. l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. This Class B digital apparatus complies with Canadian ICES-003. Cet appareil numérique de la classe B est conforme à la norme NMB-003 du Canada. This device complies with RSS-310 of Industry Canada. Operation is subject to the condition that this device does not cause harmful interference. Cet appareil est conforme à la norme RSS-310 d'Industrie Canada. L'opération est soumise à la condition que cet appareil ne provoque aucune interférence nuisible. This device and its antenna(s) must not be co-located or operating in conjunction with any other antenna or transmitter, except tested built-in radios. Cet appareil et son antenne ne doivent pas être situés ou fonctionner en conjonction avec une autre antenne ou un autre émetteur, exception faites des radios intégrées qui ont été testées. The County Code Selection feature is disabled for products marketed in the US/ Canada. La fonction de sélection de l'indicatif du pays est désactivée pour les produits commercialisés aux États-Unis et au Canada. 7.4.1. Radiation Exposure Statement / Déclaration d'Exposition aux Radiations This equipment complies with IC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20 cm between the radiator and your body. Cet équipement est conforme aux limites d'exposition aux rayonnements IC établies pour un environnement non contrôlé. Cet équipement doit être installé et utilisé avec un minimum de 20 cm de distance entre la source de rayonnement et votre corps. This device is intended only for OEM integrators under the following conditions: (For module device use) 1. The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2. The transmitter module may not be co-located with any other transmitter or antenna. As long as the 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed. Cet appareil est conçu nt pour les intégrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1. L'antenne doit être installée de telle sorte qu'une distance de 20 cm est respectée entre l'antenne et les utilisateurs, et 2. Le module émetteur peut ne pas être coïmplanté avec un autre émetteur ou antenne. 41111094 Rev 7 October 04, 2019 68 Product Technical Specification Legal Information Tant que les 2 conditions ci-dessus sont remplies, des essais supplémentaires sur l'émetteur ne seront pas nécessaires. Toutefois, l'intégrateur OEM est toujours responsable des essais sur son produit final pour toutes exigences de conformité supplémentaires requis pour ce module installé. IMPORTANT NOTE: In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the Canada authorization is no longer considered valid and the IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate Canada authorization. NOTE IMPORTANTE: Dans le cas où ces conditions ne peuvent être satisfaites (par exemple pour certaines configurations d'ordinateur portable ou de certaines co-localisation avec un autre émetteur), l'autorisation du Canada n'est plus considéré comme valide et l'ID IC ne peut pas être utilisé sur le produit final. Dans ces circonstances, l'intégrateur OEM sera chargé de réévaluer le produit final (y compris l'émetteur) et l'obtention d'une autorisation distincte au Canada. 7.4.2. End Product Labeling / Plaque Signalétique du Produit Final This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: “Contains IC: 2417C-HL78M”. Ce module émetteur est autorisé uniquement pour une utilisation dans un dispositif où l'antenne peut être installée de telle sorte qu'une distance de 20cm peut être maintenue entre l'antenne et les utilisateurs. Le produit final doit être étiqueté dans un endroit visible avec l'inscription suivante: "Contient des IC: 2417C-HL78M". 7.4.3. Manual Information to the End User / Manuel d'Information à l'Utilisateur Final The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. L'intégrateur OEM doit être conscient de ne pas fournir des informations à l'utilisateur final quant à la façon d'installer ou de supprimer ce module RF dans le manuel de l'utilisateur du produit final qui intègre ce module. Le manuel de l'utilisateur final doit inclure toutes les informations réglementaires requises et avertissements comme indiqué dans ce manuel. 41111094 Rev 7 October 04, 2019 69 8. Ordering Information Table 54. Ordering Information Model Name Description Part Number HL7800 HL7800 embedded module Contact Sierra Wireless for the latest SKU HL7800-M HL7800-M embedded module Contact Sierra Wireless for the latest SKU DEV-KIT HL Series Development Kit 6001210 41111094 Rev 7 October 04, 2019 70 9. Terms and Abbreviations Abbreviation Definition ADC Analog to Digital Converter AGC Automatic Gain Control AT Attention (prefix for modem commands) CDMA Code Division Multiple Access CF3 Common Flexible Form Factor CLK Clock CODEC Coder Decoder CPU Central Processing Unit DAC Digital to Analog Converter DTR Data Terminal Ready DRX Discontinuous Reception eDRX Extended DRX EMC Electro-Magnetic Compatibility EMI Electro-Magnetic Interference EN Enable ESD Electro-Static Discharges ETSI European Telecommunications Standards Institute FDMA Frequency-division multiple access GLONASS Global Navigation Satellite System GND Ground GNSS Global Navigation Satellite System GPIO General Purpose Input Output GPRS General Packet Radio Service GPS Global Positioning System GSM Global System for Mobile communications Hi Z High impedance (Z) IC Integrated Circuit IMEI International Mobile Equipment Identification I/O Input / Output LED Light Emitting Diode LNA Low Noise Amplifier MAX Maximum MIN Minimum N/A Not Applicable PA Power Amplifier PC Personal Computer PCB Printed Circuit Board PCL Power Control Level PLL Phase Lock Loop PSM Power Save Mode PSRAM Pseudo Static RAM 41111094 Rev 7 October 04, 2019 71 Product Technical Specification Terms and Abbreviations Abbreviation Definition PSU Power Supply Unit PTW Paging Transmission Window PWM Pulse Width Modulation RF Radio Frequency RFI Radio Frequency Interference RMS Root Mean Square RST Reset RTC Real Time Clock RX Receive SCL Serial Clock SDA Serial Data SIM Subscriber Identification Module SMD Surface Mounted Device/Design SPI Serial Peripheral Interface SW Software TAU Tracking Area Update TBC To Be Confirmed TBD To Be Defined TP Test Point TX Transmit TYP Typical UART Universal Asynchronous Receiver-Transmitter UICC Universal Integrated Circuit Card USB Universal Serial Bus UIM User Identity Module VBATT Main Supply Voltage from Battery or DC adapter VSWR Voltage Standing Wave Ratio 41111094 Rev 7 October 04, 2019 72