SLG3SY3952V

SLG3SY3952 1:3 Clock Buffer 1.8 V VDD operation Current Consumption: 1.0 mA OE for 26M_A, 26M_B and 26M_C Supports Industrial temperature range Improved performance over temperature Smaller package and layout foot print 10-pin STDFN: 1.0 x 2.0 x 0.55 mm, 0.4 mm pitch Pb-Free / Halogen-Free / RoHS compliant 10 9 8 7 6 2 3 4 MODE_OUT 26M_IN 5 OE_26M_C 1 VDD SLG3SY3952 GND • • • • • • • • 26M_C Features OE_26M_B OE_26M_A The SLG3SY3952 uses a single input 26 MHz clock source to provide three 26 MHz clock outputs. 26M_B Pin Configuration 26M_A General Description 10-pin STDFN (Top View) Output Summary • 3x 26 MHz clock outputs Block Diagram VDD 1.0 μF OE_26M_A OE_26M_B OE_26M_C 26M_IN Silego Technology, Inc. 000-003SY3952-04 Power Mode Control Clock Buffer MHz Driver MODE_OUT 26M_A 26M_B 26M_C (clipped sine wave) Rev 0.4 Revised March 22, 2016 SLG3SY3952 Pin Description Pin # Pin Name Type1 Pin Description 1 GND GND Ground 2 VDD PWR Power Supply: 1.8 V as main power supply. 1.0 μF decoupling capacitor is recommended. 3 MODE_OUT O, SE Mode: 1.8 V CMOS output signal that identifies the mode SLG3SY3952 is in. May be used as clock request. PMOS Open Drain output. Requires 100 kΩ pull down resistor. 4 26M_IN I Clock Input: 26 MHz clock input. 5 OE_26M_C I Output Enable: Output enable for the 26M_C output as well as the control signal for the Power Mode switching. 6 26M_C O, SE 7 OE_26M_B I 8 26M_B O, SE Clock Output: 26 MHz output (Stop by OE_26M_B) 9 26M_A O, SE Clock Output: 26 MHz output (Stop by OE_26M_A) 10 OE_26M_A I Clock Output: 26 MHz output (Stop by OE_26M_C) Output Enable: Output enable for the 26M_B output as well as the control signal for the Power Mode switching. Output Enable: Output enable for the 26M_C output as well as the control signal for the Power Mode switching. Notes: 1. Type Definitions • PWR: power • GND: ground • I: input • O: output • SE: single ended signal CMOS Input Specifications (OE1) TA = 25 °C (unless otherwise stated) Symbol Description Conditions Min Typ Max Unit VIH Input Voltage HIGH 1.5 -- -- V VIL Input Voltage LOW -- -- 0.3 V Notes: 1. VOE < VDD + 0.3 V must be met at all times including power up, where VOE is the voltage on OE pin and VDD is the voltage on VDD pin. 000-003SY3952-04 Page 2 of 10 SLG3SY3952 26 MHz Clock Output Characteristics (26M) TA = 25 °C, VDD = 1.8 V (unless otherwise stated) Symbol Description Conditions FINI Initial Frequency DC Duty Cycle 0.5 x VDD VOH Output Voltage HIGH VOL Min Typ Max Unit 5 -- 50 MHz 45 50 55 % IOH = 1 mA 0.8 x VDD -- 2 -- V Output Voltage LOW IOL = -1 mA -- -- 2 0.2 x VDD V tPU3,5 Power Up Delay (tPU,MHz) See Note 3 & 5 -- 3 5 μs tOE4,5 Output Enable Delay (tOE,MHz) See Note 4 & 5 0 1.0 2.0 μs tR Rise Time measured between VOH,min and VOL,max -- TBD -- ns tF Fall Time measured between VOH,min and VOL,max -- TBD -- ns CL Output Load Capacitance -- 8 10 pF Notes: 1. This parameter tracks Reference Crystal characteristics. 2. VOH = 1.0 x VDD (typ) and VOL = 0 V (typ) when driving a fully capacitive load, i.e. IOH = IOL = 0 mA. 3. This parameter is applicable when the device powers up into Active Mode (OE = VDD during power up) or transitions into Active Mode immediately after power up. The delay time is referenced from the point where VDD ≥ VDD,min is met to the 26 MHz output being stable and valid. If OE is left floating, tPU may be longer. 4. This parameter is applicable when the device enters Active Mode from Hibernate Mode during normal operation. The delay time is referenced from the point where OE ≥ VIH,min is met to the 26 MHz output being stable and valid. 5. Both tPU and tOE should be satisfied in order for the 26 MHz output to be stable and valid. 000-003SY3952-04 Page 3 of 10 SLG3SY3952 Power Supply Electrical Specifications (VDD) TA = 25 °C Symbol VDD1 IVDD2 Description Conditions Operating Voltage for VDD VDD current consumption VDD = 1.8 V Min Typ Max Unit 1.7 1.8 1.9 V -- 1.0 -- mA Notes: 1. VOE < VDD + 0.3 V must be met at all times including power up, where VOE is the voltage on OE pin and VDD is the voltage on VDD pin. 2. Average current depends on application and output load. Specified values are for No Load condition. 000-003SY3952-04 Page 4 of 10 SLG3SY3952 Timing Diagrams Output Enable Delay (26 MHz Output) VDD VDD tOE Clock Output Unstable Clock Stable Clock Clock Input 000-003SY3952-04 Page 5 of 10 SLG3SY3952 Package Top Marking System Definition Pin 1 Identifier 000-003SY3952-04 NNN Serial Number Code Page 6 of 10 SLG3SY3952 Package Drawing and Dimensions 10 Lead STDFN Package JEDEC MO-252 000-003SY3952-04 Page 7 of 10 SLG3SY3952 Recommended Land Pattern Units: μm Recommended Reflow Soldering Profile Please see IPC/JEDEC J-STD-020: latest revision for reflow profile based on package volume of 1.10 mm3 (nominal). More information can be found at www.jedec.org. 000-003SY3952-04 Page 8 of 10 SLG3SY3952 Ordering Information Part Number Type Production Flow SLG3SY3952V 10-pin STDFN Industrial, -40 °C to 85 °C SLG3SY3952VTR 10-pin STDFN (Tape and Reel) Industrial, -40 °C to 85 °C 000-003SY3952-04 Page 9 of 10 SLG3SY3952 Silego Website & Support Silego Technology Website Silego Technology provides online support via our website at http://www.silego.com/.This website is used as a means to make files and information easily available to customers. For more information regarding Silego Green products, please visit: http://greenpak.silego.com/ http://greenfet.silego.com/ http://greenpak2.silego.com/ http://greenfet2.silego.com/ http://greenclk.silego.com/ Products are also available for purchase directly from Silego at the Silego Online Store at http://store.silego.com/. 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More information regarding your local representative is available at the Silego website or send a request to info@silego.com Contact Silego Directly Silego can be contacted directly via e-mail at info@silego.com or user submission form, located at the following URL: http://support.silego.com/ Other Information The latest Silego Technology press releases, listing of seminars and events, listings of world wide Silego Technology offices and representatives are all available at http://www.silego.com/ THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. SILEGO TECHNOLOGY DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. SILEGO TECHNOLOGY RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. 000-003SY3952-04 Page 10 of 10