SIT8256AC-33-33E-156.250000

SiT8256 0.3 ps Jitter Oscillator for Networking The Smart Timing Choice The Smart Timing Choice Features Applications  156.250000 MHz, 156.253906 MHz, 156.257800 MHz, 156.257812 MHz, 156.261718 MHz for Ethernet applications  SATA, SAS, Ethernet, 10Gb Ethernet, XAUI  100% pin-to-pin drop-in replacement to quartz-based oscillators  Computing, storage, networking, telecom, industrial control  Ultra low phase jitter: 0.3 ps  Frequency stability as low as ±10 PPM  Industrial or extended commercial temperature range  LVCMOS/LVTTL compatible output  Standby or output enable modes  Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm2  Outstanding silicon reliability of 2 FIT or 500 million hour MTBF  Pb-free, RoHS and REACH compliant  Ultra short lead time Electrical Characteristics Parameter Output Frequency Range Frequency Stability Operating Temperature Range Supply Voltage Current Consumption OE Disable Current Standby Current Duty Cycle Rise/Fall Time Symbol f F_stab T_use Vdd Idd I_OD I_std DC Tr, Tf Min. Typ. Max. 156.250000, 156.253906 156.257800, 156.257812 156.261718 Unit Condition MHz -10 – +10 PPM -20 – +20 PPM -25 – +25 PPM -50 – +50 PPM -20 – +70 °C Extended Commercial -40 – +85 °C Industrial 1.71 1.8 1.89 V 2.25 2.5 2.75 V Supply voltages between 2.5V and 3.3V can be supported. Contact SiTime for additional information. 2.52 2.8 3.08 V 2.97 3.3 3.63 V – 31 33 mA No load condition, Vdd = 2.5V, 2.8V or 3.3V – 29 31 mA No load condition, Vdd = 1.8V – – 31 mA Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled Down – – 30 mA Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down – – 70 A Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled Down – – 10 A Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down 45 – 55 % Inclusive of Initial tolerance at 25 °C, and variations over operating temperature, rated power supply voltage and load – 1.2 2 ns 15 pF load, 10% - 90% Vdd – 2.2 – ns 30 pF load, 10% - 90% Vdd – 3.4 – ns 90% – – Vdd VOL – – 10% Vdd VIH 70% – – Vdd Pin 1, OE or ST Input Voltage Low VIL – – 30% Vdd Pin 1, OE or ST Input Pull-up Impedance Z_in – 100 250 kΩ Pin 1, OE logic high or logic low, or ST logic high 2 – – MΩ Pin 1, ST logic low Measured from the time Vdd reaches its rated minimum value Output Voltage High VOH Output Voltage Low Input Voltage High Startup Time OE Enable/Disable Time Resume Time RMS Period Jitter RMS Phase Jitter (random) First year Aging 10-year Aging T_start – 7 10 ms T_oe – – 150 ns T_resume – 6 10 ms T_jitt 45 pF load, 10% - 90% Vdd IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V) IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V) In standby mode, measured from the time ST pin crosses 50% threshold. Refer to Figure 5. – 1.5 2 ps Vdd = 2.5V, 2.8V or 3.3V – 2 3 ps Vdd = 1.8V T_phj – 0.25 0.3 ps IEEE802.3-2005 10GbE jitter measurement specifications F_aging -1.5 – +1.5 PPM 25°C -5 – +5 PPM 25°C Notes: 1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated. 2. Contact SiTime for custom drive strength to drive higher or multiple load, or SoftEdge™ option for EMI reduction. SiTime Corporation Rev. 1.11 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Revised March 4, 2013 SiT8256 0.3 ps Jitter Oscillator for Networking The Smart Timing Choice The Smart Timing Choice Pin Configuration Pin 1 Symbol Functionality Top View Output Enable H or Open[3]: specified frequency output L: output is high impedance. Only output driver is disabled. Standby H or Open[3]: specified frequency output L: output is low (weak pull down). Device goes to sleep mode. Supply current reduces to I_std. OE/ ST 2 GND Power Electrical ground 3 OUT Output Oscillator output 4 VDD Power Power supply voltage OE/ST 1 4 VDD GND 2 3 OUT Note: 3. A pull-up resistor of