TMP112BIDRLR

UMW R TMP112B Features Temperature SCL • Temperature range: -55°C ~ +150°C 1 • Temperature accuracy: ±0.5°C (-40°C ~ +125°C) GND • Supply voltage range: 1.4V ~ 5.5V 2 Diode Temp. Sensor Control Logic 6 ΔΣ A/D Converter Serial Interface 5 OSC Config. & Temp. Register 4 • Low quiescent current: ALERT Normal operation: ≤10μA (4Hz) 3 Shutdown mode: ≤1μA SDA V+ ADD0 TMP112B • Resolution: 12bits, 0.0625°C • Digital output: SMBusTM and I2C interface compatibility Applications Description The TMP112B is a digital temperature sensor with • Portable and battery-powered applications • Power-supply temperature monitoring • Computer peripheral thermal protection • Notebook computers • Battery management • Office machines • Thermostat controls • Electromechanical device temperatures • General temperature measurements: – Industrial controls – Test equipment – Medical instrumentation high-accuracy, low-power, and NTC/PTC thermistor replacements. It can be used for extended temperature measurement in communication, computer, consumer electro- nics,environmental, industrial and instrumentation applications. The TMP112B provides ≤ ±0.5°C temperature accuracy with good temperature linearity over the normal operating range of -40°C to +125°C.The TMP112B can provide extended temperature measurement mode, extending the temperature measurement range from -55°C to +150°C. The rated working voltage range of the TMP112B is 1.4V~5.5V, and the maximum quiescent current in the entire working rage is 10µA (temperature measurement frequency 4Hz).The on-chip 12-bit ADC offers resolutions down to 0.0625°C. The TMP112B adopts SOT563 is compatible with SMBus and I2C interface, and allows up to four devices on one bus. The device also features an SMBus alert function. www.umw-ic.com 1 友台半导体有限公司 UMW R TMP112B Pin Configuration and Functions SOT563 Package 6-Pin Top View SCL 1 6 SDA GND 2 5 V+ ALERT 3 4 ADD0 Pin Functions PIN DESCRIPTION NO. NAME 1 SCL Serial clock. Open-drain output, requires a pull-up resistor. 2 GND Ground. 3 ALERT 4 ADD0 5 V+ 6 SDA www.umw-ic.com Over temperature alert. Open-drain output, requires a pull-up resistor. Address select. Connect to V+, GND, SCL or SDA. Supply voltage, 1.4V to 5.5V. Serial data input. Open-drain output, requires a pull-up resistor. 2 友台半导体有限公司 UMW R TMP112B Specifications Absolute Maximum Ratings MIN Supply Voltage, V+ Voltage at SCL, SDA, and ADD0 -0.5 Voltage at ALERT -0.5 Operating Temperature -55 UNIT 6 V 6 V ((V+)+0.3) V and ≤5.5 Junction Temperature Storage Temperature MAX -60 160 and ≤4 150 °C 150 °C °C Over opera ting free -air temp erature range (unless ot herwise note d) . Stresses beyond th ose listed und er Absolute Maximum Ratings may cause permanent damage to the device. ESD Ratings Electrostatic Human Body Mode (HBM), per ANSI/ESDA/JEDEC JS-001 Discharge, VESD Machine Mode (MM), per JEDEC-STD Classification SCL Value UNIT ±5000 V 300 V SDA GND V+ CORE ALERT A0 TMP112B Figure 2. TMP112B Internal ESD Equivalent Circuit Recommended Operating Conditions Supply Voltage Operating Temperature V+ TA MIN NOM MAX UNIT 1.4 3.3 5.5 V 150 °C -50 Over operating free-air temperature range (unless otherwise noted). www.umw-ic.com 3 友台半导体有限公司 UMW R TMP112B Electrical Characteristics Electrical characteristics of devices at TA = +25℃ and V+ = 1.4 V to 3.6 V (unless otherwise noted). PARAMETER TEST CONDITONS Operating Temperature Range Extended mode Accuracy (Temperature Error) DC Power Supply Sensitivity MIN MAX UNIT -40 125 °C -55 150 °C +25°C，V+ = 3.3V ±0.1 ±0.5 °C 0°C to +65°C, V+ = 3.3V ±0.25 ±0.5 °C -40°C to +125°C ±0.5 ±1 °C -40°C to +125°C 0.0625 ±0.25 °C/V Resolution Conversion Time Conversion Modes Shutdown Current, ISD www.umw-ic.com °C 12 bits CR1 = 0, CR0 = 0 0.25 CR1 = 0, CR0 = 1 1 CR1 = 1, CR0 = 0 (default) 4 CR1 = 1, CR0 = 1 8 30 35 40 0.001 0.4 High-speed mode 0.001 2.75 1.4 3.3 5.5 Serial bus inactive, CR1=1,CR0=0 (default) 7 10 Serial bus active, SCL frequency=400 kHz 15 Serial bus active, SCL frequency=2.75 MHz 85 Serial bus inactive 0.5 Serial bus active, SCL frequency=400 kHz 10 Serial bus active, SCL frequency=2.75 MHz 80 4 ms conv/s Fast mode Power Supply Voltage Average Quiescent Current, IQ 0.0625 26 Timeout Time Communication Frequency TYP ms MHz V μA 1 μA 友台半导体有限公司 UMW R TMP112B Detailed Description Device Functional Modes Continuous Conversion Mode The default working mode of TMP112B is continuous conversion mode, and the typical conversion time is 26ms. During continuous conversion mode, the ADC performs continuous temperature conversions and stores each results to the temperature register, overwriting the result from the previous conversion. The conversion rate bits, CR1 and CR0, configure the TMP112B for conversion rates of 0.25Hz, 1Hz, 4Hz, or 8Hz. The conversion rate can be changed by configuring CR1 and CR0, the TMP112B makes a conversion and then powers down and waits for the appropriate delay set by CR1 and CR0, as shown in Figure 3. Table 1 lists the settings for CR1 and CR0. Table 1. Conversion Rate Settings CR1 CR0 CONVERSION RATE 0 0 0.25Hz 0 1 1Hz 1 0 4Hz（default） 1 1 8Hz Start of Conversion Startup Delay 26 ms 26 ms Delay is set by CR1 and CR0 Figure 3. Schematic Diagram of Continuous Conversion Extended Mode The temperature measurement range of TMP112B is -40°C to +125°C in normal temperature measurement mode. By setting the EM bit in the configuration register to1, the TMP112B can enter the extended temperature measurement mode. Extended mode (EM = 1) allows measurement of temperatures above 128°C by configuring the temperature register and the temperature limit registers for 13-bit data format. The read-only temperature register in TMP112B uses two bytes to store the temperature measurement results, as shown in Table 8 and Table 9. Byte 1 is the MSB, byte 2 is the LSB, and the upper 12 bits (13 bits in extended mode) are used to indicate the temperature. It is not necessary to read the LSB when the temperature information of the LSB is not required. The data format of the TMP112B temperature measurement results is listed in Table 2 and Table 3, where 1LSB = 0.0625°C, and negative numbers are expressed in binary two's complement format. When powered on or reset, the temperature register of the TMP112B will be set to 00h until the next temperature conversion is complete. Unused bits in the temperature register always read as 0 (not shown in the table below). www.umw-ic.com 5 友台半导体有限公司 UMW R TMP112B Table 2. 12-bit Temperature Data Format in Normal Temperature Measurement Mode TEMPERATURE (°C) DIGITAL OUPUT (BINARY) HEX 128 0111 1111 1111 7FF 127.9375 0111 1111 1111 7FF 100 0110 0100 0000 640 80 0101 0000 0000 500 75 0100 1011 0000 4B0 50 0011 0010 0000 320 25 0001 1001 0000 190 0.25 0000 0000 0100 004 0 0000 0000 0000 000 –0.25 1111 1111 1100 FFC –25 1110 0111 0000 E70 –55 1100 1001 0000 C90 Table 3. 13-bit Temperature Data Format in Extended Temperature Measurement Mode TEMPERATURE (°C) DIGITAL OUPUT (BINARY) HEX 150 0 1001 0110 0000 0960 128 0 1000 0000 0000 0800 127.9375 0 0111 1111 1111 07FF 100 0 0110 0100 0000 0640 80 0 0101 0000 0000 0500 75 0 0100 1011 0000 04B0 50 0 0011 0010 0000 0320 25 0 0001 1001 0000 0190 0.25 0 0000 0000 0100 0004 0 0 0000 0000 0000 0000 –0.25 1 1111 1111 1100 1FFC –25 1 1110 0111 0000 1E70 –55 1 1100 1001 0000 1C90 Shutdown Mode Shutdown mode of the TMP112B device allows the user to conserve power by shutting down all device circuitry except the serial interface, thereby reducing the current of the TMP112B to less than 0.5µA (typical value). Shutdown mode is initiated when the SD bit in the configuration register is set to 1; after configuring the registers in this way, the TMP112B will shut down after completing the current conversion. To exit shutdown mode, write SD bit to 0, the TMP112B will re-enter continuous conversion mode. www.umw-ic.com 6 友台半导体有限公司 UMW R TMP112B One-Shot Mode The TMP112B features a one-shot mode. When the TMP112B is in shutdown mode, writing 1 to the OS bit starts a single temperature conversion. During the conversion, the OS bit reads 0. The TMP112B returns to the shutdown state at the completion of the single conversion, the OS bit reads 1. This feature is useful for reducing power consumption when continuous temperature monitoring is not required. Since the TMP112B only needs 26ms for a single temperature measurement (typical value), it can achieve a higher conversion rate through this mode. When using one-shot mode, 30 or more conversions per second are possible. ALERT The TMP112B has a temperature alarm function, by writing the TM bit in the configuration register as 0 or 1, the TMP112B can be configured as comparator mode or interrupt mode to achieve different alarm functions. Figure 4. Status of the ALERT Pin in Different Modes In comparison mode (TM=0), when the number of times the temperature measurement result continuously equals or exceeds the temperature upper limit register value T HIGH reaches the value defined by the F1/F0 bits in the configuration register (as shown in Table 4), the ALERT pin will be activated. The ALERT pin will remain active until the number of times the temperature measurement result is continuously lower than the temperature lower limit register value TLOW reaches the value defined by F1/F0. www.umw-ic.com 7 友台半导体有限公司 UMW R TMP112B In interrupt mode (TM=1), the ALERT pin will be activated when the temperature measurement result equals or exceeds THIGH continuously for a number of times to the value defined by F1/F0 (as shown in Table 4). The ALERT pin remains active until it is cleared by one of three events: a read of any register, a successful SMBus alert response, or a shutdown command. After the ALERT pin is cleared, the device starts to compare temperature readings with the TLOW. The ALERT pin becomes active again only when the temperature drops below T LOW for a consecutive number of conversions as set by F1/F0 bits. The ALERT pin remains active until cleared by any of the same three clearing events. The user can also reset the TMP112B to clear the ALERT pin state by using the global response reset command (General Call). This operation also resets other internal registers in the TMP112B and returns the device to compare mode (TM=0). Table 4 shows the specific configuration of the F1/F0 bits. Table 4. Number of Over-Temperature Required to Activate the ALERT Pin F1 F0 REQUIRED NUMBER (TIMES) 0 0 1 (Default) 0 1 2 1 0 4 1 1 6 The polarity bit (POL) in the configuration register allows the user to adjust the polarity of the ALERT pin output. If the POL bit is set to 0 (default), the ALERT pin becomes active low. When POL bit is set to 1, the ALERT pin becomes active high. The above situations are shown in Figure 4. Serial Interface Bus Overview The TMP112B is compatible with SMBus and I2C interfaces. In the SUMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. To address a specific device, a START condition is initiated, indicated by pulling the data line (SDA) from a high- to low-logic level when the SCL pin is high. All slaves on the bus receive the 8-bits slave address on the rising edge of the clock, and the last bit indicates whether a read or write operation is intended. During the ninth clock pulse, the addressed slave generates an acknowledge and pulls the SDA pin low to respond to the master. A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. When all data are transferred, the master generate a STOP signal to end the communication by pulling SDA from low to high when SCL is high. During the data transfer, the SDA pin must remain stable when the SCL pin is high because any change in the SDA pin when the SCL pin is high is interpreted as a START or STOP signal. www.umw-ic.com 8 友台半导体有限公司 UMW R TMP112B Serial Bus Address To communicate with the TMP112B, the master must first address slave devices through an address byte. The address byte has seven address bits and a read-write (R/W) bit that indicates the intent of executing a read or write operation. The TMP112B features an address pin to allow up to four devices to be addressed on a single bus. Table 5 shows the connection mode of the ADD0 pins corresponding to each slave address. Table 5. Address Pin and Slave Addresses DEVICE TWO-WIRE ADDRESS ADD0 PIN CONNECTION 1001000 GND 1001001 V+ 1001010 SDA 1001011 SCL 6.2.3 Writing and Reading Operation 1 9 1 9 SCL SDA 1 0 0 1 0 A1 A0 0 R/W START by Master 0 0 0 0 0 P1 P0 ACK by ACK by Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte 1 9 1 9 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 ACK by STOP by Master ACK by Frame 3 Data-Byte 1 Frame 4 Data-Byte 2 Figure 5. Two-wire Write Command Timing Diagram 1 9 1 9 SCL SDA 1 0 0 1 0 A1 A0 0 R/W START by Master 0 0 0 0 0 P1 P0 ACK by ACK by Frame 1 Two-Wire Slave Address Byte STOP By Master Frame 2 Pointer Register Byte 1 9 1 9 SCL (Continued) SDA (Continued) 1 0 0 1 0 A1 A0 START by Master R/W D7 ACK by D5 D4 D3 D2 D1 D0 From ACK by Master Frame 4 Data-Byte 1 Read Register Frame 3 Two-Wire Slave Address Byte www.umw-ic.com D6 9 友台半导体有限公司 UMW R TMP112B 1 9 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0 From ACK by Master STOP By Master Frame 5 Data-Byte 2 Read Register Figure 6. Two-wire Read Command Timing Diagram When writing data to the TMP112B , after the slave address byte is sent, accessing a particular register on the TMP112B is accomplished by writing the appropriate value to the pointer register. Every write operation to the TMP112B requires a value for the pointer register. When reading from the TMP112B device, after the slave address byte is sent, the corresponding pointer register byte also needs to be sent. Unlike the write operation, if the user need to repeatedly read data from the same register, it is not required to send the pointer register byte separately each time, the last value stored in the pointer register will be read by the device automatically; to change the register pointer for a read operation, a new value must be written to the pointer register. The action is accomplished by issuing a slave-address byte with the R/W bit low, followed by the pointer register byte. The master can then generate a START condition and send the slave address byte with the R/W bit high to initiate the read command. Register bytes are sent with the MSB first, followed by the LSB. Figure 5 and Figure 6 show schematic diagrams of the above read and write operations. SMBus Alert Function The TMP112B supports the SMBus alert function. When the TMP112B operates in interrupt mode (TM=1), the master can send out and SMBus ALERT command (19h) to the bus. If the ALERT pin is active, the device acknowledges the SMBus ALERT command and responds by returning the slave address. The eighth bit (LSB) of the slave address byte indicates if the alert condition is caused by the temperature exceeding T HIGH or falling below TLOW . This bit is equal to POL if the temperature is greater than or equal to T HIGH; this bit is equal to POL if the temperature is less than TLOW. If multiple devices on the bus respond to the SMBus ALERT command, the bus will return the lowest two-wire address. The TMP112B ALERT pin becomes inactive at the completion of the SMBus ALERT command; the ALERT pin of the TMP112B that does not return an address will remain active. Sending the SMBus ALERT command again can continue to clear the ALERT pin of the TMP112B with the current lowest address. The above process is detailed in Figure 7. www.umw-ic.com 10 友台半导体有限公司 UMW R TMP112B ALERT 1 9 1 9 SCL SDA 0 0 0 1 1 0 0 START by Master R/W 1 0 0 1 0 A1 A0 STATUS NACK by Master ACK by STOP by Master Frame 2 Slave Address From TMP112B Frame 1 SMBus ALERT Response Address Byte Figure 7. SMBus Alert Timing Diagram General Call Reset The TMP112B responds to the two-wire general call address 00h. The device acknowledges the general call address and responds to commands in the second byte. If the second byte is 06h, the TMP112B resets the internal registers to the power-up reset values, and aborts the current temperature conversion. If the second byte is other value, the TMP112B will not respond. High-Speed Mode For the two-wire bus to operate at frequencies above 400kHz, the host device must issue a High-Speed mode host code (0000 1xxxb) as the first byte after a START condition to switch the bus to high-speed operation. The TMP112B device does not acknowledge this byte, but it does switch the input filters on the SDA and SCL and the output filters on the SDA to operate in High-Speed mode, allowing the bus to transmit data at frequencies up to 2.75MHz. After the High-Speed mode host code is issued, the host transmits a two-wire device address to initiate a data transfer operation. The bus continues to operate in High-Speed mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP112B switches the input and output filters back to fast-mode operation. Time-Out Function The TMP112B resets the serial interface if SCL is held low for 30ms (typical) between a START and STOP condition, the TMP112B releases the SDA bus and waits for a START condition. To avoid activating the Time-Out function, a communication speed of at least 1kHz must be maintained. www.umw-ic.com 11 友台半导体有限公司 UMW R TMP112B Register Descriptions Pointer Register Figure 8 shows the internal register structure of the TMP112B device. The 8-bit Pointer Register of the device is used to address a given data register. The Pointer Register uses the two LSBs (see Table 6) to identify which of the data registers must respond to a read or write command. The power-up reset value of P1/P0 is '00'. By default, the TMP112B reads the temperature on power-up. Figure 8. Internal Register Structure Table 6 lists the pointer address of the registers available in the TMP112B device. During a write command, bytes P2 through P7 must always be 0. Table 6. Pointer Address P1 P0 REGISTER 0 0 Temperature Register (Read Only) 0 1 Configuration Register (Read/Write) 1 0 TLOW Register (Read/Write) 1 1 THIGH Register (Read/Write) Table 7. Pointer Register Byte P7 P6 P5 P4 P3 P2 0 0 0 0 0 0 www.umw-ic.com 12 P1 P0 Register Bits 友台半导体有限公司 UMW R TMP112B Temperature Register The Temperature Register of the TMP112B device is configured as a 12-bit or 13-bit read-only register (setting the EM bit to 0 or 1) that stores the output of the most recent conversion. Two bytes must be read to obtain data and are listed in Table 8 and Table 9. Byte 1 is the most significant byte (MSB), followed by byte 2, the least significant byte (LSB). The T11~T0 bits (T12~T0 bits in extended mode) are used to indicate temperature. Byte 2 does not have to be read if that information is not needed. The D0 bit of byte 2 in the temperature register indicates whether the device is in normal mode (D0=0) or extended mode (D0=1) at this time, which can be used to distinguish the format of the two temperature register data. Table 8. Byte 1 of Temperature Register BYTE 1 D7 D6 D5 D4 D3 D2 D1 D0 T11 T10 T9 T8 T7 T6 T5 T4 （T12） （T11） （T10） （T9） （T8） （T7） （T6） （T5） Table 9. Byte 2 of Temperature Register BYTE 1 D7 D6 D5 D4 D3 D2 D1 D0 T3 T2 T1 T0 0 0 0 0 （T4） （T3） （T2） （T1） （T0） （0） （0） （1） Temperature Limit Register The temperature limits are stored in the T HIGH and TLOW registers in the same format as the temperature result, and can be configured as 12-bit or 13-bit according to the value of the EM bit. Table 10 and Table 11 list the format for the THIGH and TLOW registers, the configuration in extended mode is in brackets. The power-up reset values for THIGH and TLOW are:  THIGH = +80℃；TLOW = +75℃ Table 10. Byte 1 and 2 of THIGH Register BYTE 1 2 D7 D6 D5 D4 D3 D2 D1 D0 H11 H10 H9 H8 H7 H6 H5 H4 （H12） （H11） （H10） （H9） （H8） （H7） （H6） （H5） H3 H2 H1 H0 0 0 0 0 （H4） （H3） （H2） （H1） （H0） （0） （0） （0） Table 11. Byte 1 and 2 of TLOW Register BYTE 1 2 www.umw-ic.com D7 D6 D5 D4 D3 D2 D1 D0 L11 L10 L9 L8 L7 L6 L5 L4 （L12） （L11） （L10） （L9） （L8） （L7） （L6） （L5） L3 L2 L1 L0 0 0 0 0 （L4） （L3） （L2） （L1） （L0） （0） （0） （0） 13 友台半导体有限公司 UMW R TMP112B ConfigurationRegister The Configuration Register is a 16-bit read/write register used to store bits that control the operational modes of the temperature sensor. Read/write operations are performed MSB first. Table 12 and Table 13 list the format and power-up and reset values of the configuration register. Table 12. Configuration Register High Byte BIT FIELD DEFAULT DESCRIPTION One-Shot and Conversion Completion Flag 7 OS（R） 0 1 = Temperature not converting 0 = Temperature is converting 6 R1（R） 1 Set to 11 on Power-up 5 R0（R） 1 Temperature measurement resolution is 12bits 4 F1（R/W） 0 Flag Bit for the Number of Over-Temperature Required to Activate the ALERT Pin 00 = 1 time（Default） 01 = 2 times 3 F0（R/W） 0 10 = 4 times 11 = 6 times ALERT Pin Polarity Flag 2 POL（R/W） 0 1 = ALERT pin is high when activated 0 = ALERT pin is low when activated Device Working Mode Flag Bit 1 TM（R/W） 0 1 = Interrupt mode 0 = Comparator mode Shutdown Mode Flag 0 SD（R/W） 0 1 = Shutdown mode 0 = Continuous conversion mode www.umw-ic.com 14 友台半导体有限公司 UMW R TMP112B Table 13. Configuration Register Low Byte BIT FIELD DEFAULT 7 CR1（R/W） 1 DESCRIPTION Continuous Conversion Rate Flag 00 = 0.25Hz 01 = 1Hz 6 CR0（R/W） 10 = 4Hz (Default) 0 11 = 8Hz Alarm Function Fag Bit in Compare Mode When the POL bit equals 0, the AL bit reads as 1 until the temperature equals or exceeds T HIGH for the programmed number of consecutive faults, causing the AL bit to read as 0. The AL bit continues to read as 0 5 AL（R） 1 until the temperature falls below TLOW for the programmed number of consecutive faults, when it again reads as 1. If POL=1, the behavior of the AL bit is the opposite of the above. The status of the TM bit does not affect the status of the AL bit. Extended Mode Flag 4 EM（R/W） 0 1 = Extended mode 0 = Normal mode 3 0 0 / 2 0 0 / 1 0 0 / 0 0 0 / www.umw-ic.com 15 友台半导体有限公司 UMW R TMP112B Application and Implementation NOTE The following contents are the precautions for TMP112B recommended by UTD Semiconductor Co.,Limited . in practical applications. Customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. Figure 9. Typical Connections of the TMP112B The TMP112B device requires pull-up resistors on the SCL, SDA, and ALERT pins, as shown in Figure 9, the recommended value for the pull-up resistors is 5kΩ. In some applications the pull-up resistor can be lower or higher than 5kΩ but must not exceed 3mA of current on any of those pins. The TMP112B device is a very low-power device and generates very low noise on the supply bus. Applying an RC filter to the V+ pin of the TMP112B device can further reduce any noise that the device might propagate to other components. RF in Figure 10 must be less than 5kΩ and CF must be greater than 10nF. Figure 10. Noise Reduction Techniques Place the device in close proximity to the heat source that must be monitored, with a proper layout for good thermal coupling. This placement ensures that temperature changes are captured within the shortest possible time interval. To maintain accuracy in applications that require air or surface temperature measurement, take care to isolate the package and leads from ambient air temperature. A thermally-conductive adhesive is helpful in achieving accurate surface temperature measurement. www.umw-ic.com 16 友台半导体有限公司 UMW R TMP112B Encapsulating Information SOT-563 Marking 1B8 ORDERING INFORMATION Order code Package Baseqty Deliverymode UMW TMP112BIDRLR SOT-563 3000 Tape and reel www.umw-ic.com 17 友台半导体有限公司