SLM2103SCA-13GTR

SLM2103S 600V Half-Bridge Driver PRODUCT SUMMARY • • • • • VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) FEATURES • 600 V max. 130 mA/270 mA 10 V - 20 V 680 ns/150 ns 520 ns • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout 3.3 V, 5 V, and 15 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Internal set deadtime High-side output in phase with HIN input • • • Low-side output out of phase with LIN input RoHS compliant SOP8 package • • GENERAL DESCRIPTION The SLM2103S is a high voltage, high speed power MOSFET and IGBT drivers with dependent highand low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. TYPICAL APPLICATION CIRCUIT up to 600V VCC VCC VB H IN H IN HO LIN LIN VS CO M LO to load S LM 2103S Refer to Pin Configuration for correct configuration. This diagram shows electrical connections only. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 1 SLM2103S PIN CONFIGURATION Package Pin Configuration (Top View) 1 VCC VB 8 2 HIN HO 7 3 LIN VS 6 4 COM LO 5 SOP8 PIN DESCRIPTION No. Pin Description 1 VCC Low-side and logic fixed supply 2 HIN Logic input for high-side gate driver output (HO), in phase 3 Logic input for low-side gate driver output (LO), out of phase 4 LIN COM 5 LO Low-side gate drive output 6 VS High-side floating supply return 7 HO High-side gate drive output 8 VB High-side floating supply Low-side return ORDERING INFORMATION Industrial Range: -40°C to +125°C Order Part No. Package QTY SLM2103SCA-13GTR SOP8, Pb-Free 2500/Reel Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 2 SLM2103S FUNCTIONAL BLOCK DIAGRAM VB UV DETECT R Pulse Filter HIN S Pulse Gen VCC Dead time & Shoot-Through Prevention R Q HO VS VCC UVLO VCC LO LIN COM Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 3 SLM2103S ABSOLUTE MAXIMUM RATINGS Symbol Definition Min. Max. -0.3 625 Units VB High-side floating absolute voltage VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage -0.3 VCC + 0.3 VIN Logic input voltage (HIN & LIN ) -0.3 VCC + 0.3 Allowable offset supply voltage transient --- 50 V/ns PD Package power dissipation @ TA ≤ +25°C --- 0.625 W θJA Thermal resistance, junction to ambient --- 200 °C/W TJ Junction temperature --- 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) --- 300 dVS/dt V °C Note: Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. RECOMMENDED OPERATION CONDITIONS Symbol Definition Min. Max. VB High-side floating absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 VLO Low-side output voltage 0 VCC VIN Logic input voltage (HIN & LIN ) 0 VCC TA Ambient temperature - 40 125 Units 600 V °C Note: The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 4 SLM2103S DYNAMIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. ton Turn-on propagation delay VS = 0 V --- 680 820 toff Turn-off propagation delay VS =0 V --- 150 260 tr Turn-on rise time --- 70 170 tf Turn-off fall time --- 35 90 400 520 750 --- --- 155 DT Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off MT Delay matching, HS & LS turn-on/off Unit ns STATIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Parameter Condition Min. Typ. Max. VIH Logic “1” (HIN) & Logic “0” ( LIN ) input voltage 2.5 --- --- Logic “0” (HIN) & Logic “1” ( LIN ) input voltage VIL --- --- 0.8 VOH High level output voltage, VBIAS - VO --- 0.05 0.2 VOL Low level output voltage, VO --- 0.02 0.1 ILK Offset supply leakage current --- --- 50 IQBS Quiescent VBS supply current --- 60 75 --- 220 280 Unit VCC = 10 V to 20V V IO = 2 mA VB = VS = 600 V VIN = 0 V IQCC Quiescent VCC supply current IIN+ HIN logic “1” input bias current HIN = 5 V, LIN = 0 V --- 8 15 IIN- HIN logic “0” input bias current HIN = 0 V, LIN = 5 V --- --- 5 8 8.9 9.8 VCCUV+ VBSUV+ VCCUVVBSUV- VCC and VBS supply positive going threshold undervoltage VCC and VBS supply negative going threshold undervoltage µA V Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 7.4 8.2 9 5 SLM2103S Symbol Parameter Condition Min. Typ. 130 290 Max. Unit VO = 0 V, VIN = VIH IO+ Output high short circuit pulsed current PW ≤ 10 µs mA VO = 15 V, VIN = VIL IO- Output low short circuit pulsed current 270 PW ≤ 10 µs HIN 600 50% 50% HIN LIN tr ton tf toff HO 90% HO 90% 10% 10% LO Figure 1. Input/Output Timing Diagram HIN Figure 2. High Side Switching Time Waveform LIN 50% 50% 50% 50% LIN 90% ton tf toff 10% HO DT LO tr DT 90% 90% 90% LO 10% 10% 10% Figure 3. Dead Time Waveform Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 Figure 4. Low Side Switching Time Waveform 6 SLM2103S PACKAGE CASE OUTLINES Figure 5. SOP8 Outline Dimensions Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 7 SLM2103S REVISION HISTORY Note: page numbers for previous revisions may differ from page numbers in current version Page or Item Subjects (major changes since previous revision) Rev 1.0 datasheet, 2019-8-27 Whole document New company logo released Page 1 Removed “Fig 1.” and “May 2019” Rev 1.1 datasheet, 2021-9-7 Whole datasheet Update the Logo and format Page 1 Remove package option PDIP-8 Page 2 Removed the order part No. SLM2103SCA-GT SLM2103SDA-GT in the ordering information Page 3 Updated the Functional Block Diagram Page 5 Updated the DT max value in the Dynamic Electrical Characteristics. Update the IQCC and IIN+ value in the Static Electrical Characteristics. Rev 1.2 datasheet, 2022-12-19 Whole datasheet Change package name from SOIC-8 to SOP8 and update the package case outlines Rev 1.3 datasheet, 2023-03-09 Page 5 Update the Electrical Characteristics Table，toff and MT parameter. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3, Mar 2023 8