ASDM100N34KQ
100V N-Channel MOSFET
Product Summary
General Features
● Advanced Trench Technology
● Lead free product is acquired
● Provide Excellent RDS(ON) and Low Gate Charge
VDSS
100
V
RDS(ON)-Typ
24
mΩ
ID
34
A
Application
● Load Switch
● PWM Application
● Power management
D
G
S
TO-252
Absolute Maximum Ratings (TC=25℃ unless otherwise specified)
Symbol
Parameter
Max.
Units
VDSS
Drain-Source Voltage
100
V
VGSS
Gate-Source Voltage
±20
V
TC = 25℃
34
A
TC = 100℃
20
A
120
A
110
mJ
63
W
2.5
℃/W
-55 to +175
℃
ID
IDM
EAS
PD
RθJC
TJ, TSTG
Continuous Drain Current
Pulsed Drain Current
note1
Single Pulsed Avalanche
Power Dissipation
Energy note2
TC = 25℃
Thermal Resistance, Junction to Case
Operating and Storage Temperature Range
DEC 2018 Version1.0
1/8
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
Electrical Characteristics (TJ=25℃ unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
Off Characteristic
V(BR)DSS
Drain-Source Breakdown Voltage
VGS=0V, ID=250μA
100
-
-
V
IDSS
Zero Gate Voltage Drain Current
VDS=100V, VGS=0V,
-
-
1.0
μA
IGSS
Gate to Body Leakage Current
VDS=0V, VGS=±20V
-
-
±100
nA
Gate Threshold Voltage
VDS=VGS, ID=250μA
1.0
1.5
2.5
V
Static Drain-Source on-Resistance
VGS=10V, ID=20A
-
24
32
mΩ
note2
VGS=4.5V, ID=10A
-
26
36
mΩ
-
1500
-
pF
-
380
-
pF
-
252
-
pF
-
23
-
nC
-
5
-
nC
-
4
-
nC
-
12.6
-
ns
-
6
-
ns
-
22
-
ns
-
5.3
-
ns
On Characteristics
VGS(th)
RDS(on)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain(“Miller”) Charge
VDS=25V, VGS=0V,
f=1.0MHz
VDS=30V, ID=15A,
VGS=10V
Switching Characteristics
td(on)
Turn-on Delay Time
tr
Turn-on Rise Time
td(off)
Turn-off Delay Time
tf
VDS=30V, ID=15A,
RG=1.8Ω, VGS=10V
Turn-off Fall Time
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain to Source Diode Forward
Current
-
-
30
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
-
-
120
A
VSD
Drain to Source Diode Forward
Voltage
-
-
1.2
V
-
71
-
ns
-
145
-
nC
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery
Charge
VGS=0V, IS=30A
IF=15A,dI/dt=100A/μs
Notes:1. Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
2. EAS condition : TJ=25℃,VDD=50V,VG=10V,L=0.5mH,Rg=25Ω
3. Pulse Test: Pulse Width≤300μs, Duty Cycle≤0.5%
DEC 2018 Version1.0
2/8
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
Test Circuit
Figure1:Gate Charge Test Circuit & Waveform
Figure 2: Resistive Switching Test Circuit & Waveforms
Figure 3:Unclamped Inductive Switching Test Circuit & Waveforms
DEC 2018 Version1.0
3/8
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
Typical Electrical and Thermal Characteristics (Curves)
40
ID (A)
40
ID (A)
4.5V
30
30
3V
10V
125℃
20
20
10
10
25℃
1.5V
0
0
2
VDS(V)
6
4
8
10
0
12
0
VGS(V)
3.0
2.0
4.0
5.0
6.0
Figure 2: Typical Transfer Characteristics
Figure1: Output Characteristics
IS(A)
RDS(ON) (mΩ)
30
1.0
103
28
VGS=4.5V
102
26
TJ=125℃
24
TJ=25℃
101
VGS=10V
22
VGS=0V
ID(A)
20
0
10
20
30
100
0.2
40
Figure 3:On-resistance vs. Drain Current
0.8
VSD(V)
1.0
1.2
1.4
1.6
1.8
C(pF)
VDS=30V
ID=15A
8
0.6
Figure 4: Body Diode Characteristics
VGS(V)
10
0.4
104
Ciss
103
6
Coss
4
Crss
102
2
0
0
Qg(nC)
5
10
20
25
0
Figure 5: Gate Charge Characteristics
DEC 2018 Version1.0
VDS(V)
101
15
5
10
15
20
25
30
Figure 6: Capacitance Characteristics
4/8
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
VBR(DSS)
1.3
R DS(on)
2.5
1.2
2.0
1.1
1.5
1.0
1.0
0.9
Tj (℃)
0
-100
-50
0
50
100
150
0.5
-100
200
ID(A)
36
102
Limited by R DS(on)
100
150
200
ID(A)
24
10μs
100μs
100
50
30
1μs
10
0
Figure 8: Normalized on Resistance vs.
Junction Temperature
Figure 7: Normalized Breakdown Voltage vs.
Junction Temperature
1
Tj (℃)
-50
18
1ms
12
10ms
10-1
TA=25 ℃
Single pulse
10-2
0.1
DC
6
VDS (V)
10
1
0
100
25
50
T C (℃)
75
100
125
150
175
Figure 10: Maximum Continuous Drain Current
vs. Case Temperature
Figure 9: Maximum Safe Operating Area
101
0
Zth J-C(℃ /W)
10-1
D=0.5
D=0.2
D=0.1
D=0.05
D=0.02
D=0.01
Single pulse
-2
10
-3
10
10-6
10-5
10-4
10-3
TP(s)
10-2
PDM
100
t1
t2
Notes:
1.Duty factor D=t1/t2
2.Peak T J=PDM *ZthJC+T C
10-1
100
101
Figure.11: Maximum Effective Transient Thermal
Impedance, Junction-to-Case
DEC 2018 Version1.0
5/8
.
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
Ordering and Marking Information
Ordering Device No.
Marking
Package
Packing
Quantity
ASDM100N34KQ-R
100N34
TO-252
Tape&Reel
2500
MARKING
PACKAGE
TO-252
DEC 2018 Version1.0
100N34
6/8
Ascend Semicondutor Co.,Ltd
ASDM100N34KQ
100V N-Channel MOSFET
TO-252 PACKAGE IN FORMATION
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