TSP740MR

TSP740MR/TSF740MR TSP740MR/TSF740MR 400V N-Channel MOSFET Features General Description - 10.5A, 400V, RDS(on)typ. = 0.46Ω@VGS = 10 V - Low gate charge ( typical 15.7nC) - High ruggedness - Fast switching - 100% avalanche tested - Improved dv/dt capability This Power MOSFET is produced using Truesemi‘s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology. TO-220 TO-220F G D S G D S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS TC = 25°C unless otherwise noted TSP740MR Parameter TSF740MR Drain-Source Voltage Drain Current - Continuous (TC = 25℃) - Continuous (TC = 100℃) Drain Current - Pulsed (Note 1) Units V 400 10.5 6.6 40 10.5 * 6.6 * 40 *　 A A A EAS IAR Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current (Note 1) ±25 360 11 EAR Repetitive Avalanche Energy (Note 1) 19.36 mJ dv/dt Peak Diode Recovery dv/dt Power Dissipation (TC = 25℃) (Note 3) 4.5 -55 to +150 V/ns W W/℃ ℃ 300 ℃ 2500 V PD TJ, TSTG TL VESD(G-S) (Note 2) - Derate above 25℃ Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds V mJ A 193.6 1.55 Gate Source ESD (HBM – C = 100pF, R = 1.5KΩ) 39.8 0.32 * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter TSP740MR TSF740MR RθJC Thermal Resistance, Junction-to-Case 0.65 3.15 ℃/W RθJS Thermal Resistance, Case-to-Sink Typ. 0.5 -- ℃/W RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 ℃/W © 2018 Truesemi Semiconductor Corporation Ver.B2 Units www.truesemi.com Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 400 -- -- V -- 0.40 -- V/℃ Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 uA △BVDSS / △TJ Breakdown Voltage Temperature Coefficient ID = 250 uA, Referenced to 25℃ IDSS Zero Gate Voltage Drain Current IGSSF IGSSR VDS = 400 V, VGS = 0 V -- -- 1 uA VDS = 320 V, TC = 125℃ -- -- 10 uA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 uA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 5.5 A -- 460 510 mΩ -- 9.8 -- S gFS Forward Transconductance VDS = 10 V, ID = 4 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 1500 -- pF -- 150 -- pF -- 2.8 -- pF -------- 33.5 31.5 83 56 15.7 4.6 4.5 -------- ns ns ns ns nC nC nC Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 200 V, ID = 11 A, RG = 20 Ω (Note 4, 5) VDS = 320 V, ID = 11 A, VGS = 10 V (Note 4, 5) Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 11 A ISM Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 11 A Drain-Source Diode Forward Voltage -- -- 44 A -- -- 1.4 V -- 430 -- ns -- 3.8 -- uC VSD trr Reverse Recovery Time VGS = 0 V, IS = 11 A, Qrr Reverse Recovery Charge dIF / dt = 100 A/us (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 5.5 mH, IAS = 11A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C 3. ISD  11A, di/dt  100A/us, VDD  BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width  300us, Duty cycle  2% 5. Essentially independent of operating temperature © 2018 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com TSP740MR/TSF740MR Electrical Characteristics TSP740MR/TSF740MR Typical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : ID, Drain Current [A] 1 10 ID, Drain Current [A] 1 10 0 10 o 150 C o 25 C o -55 C 0 10 ∝ Notes : 1. 250レs Pulse Test 2. TC = 25∩ -1 10 ∝ Notes : 1. VDS = 40V 2. 250レs Pulse Test -1 0 10 1 10 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics IDR, Reverse Drain Current [A] RDS(ON) [ヘ ], Drain-Source On-Resistance 2.0 1.5 VGS = 10V 1.0 0.5 VGS = 20V 1 10 0 10 150∩ 25∩ ∝ Notes : 1. VGS = 0V 2. 250レs Pulse Test ∝ Note : TJ = 25∩ 0.0 0 5 10 15 20 25 30 35 -1 10 40 ID, Drain Current [A] 0.2 0.8 1.0 1.4 12 ∝ Notes ; 1. VGS = 0 V 2. f = 1 MHz Ciss 1000 Coss 500 VGS, Gate-Source Voltage [V] Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 10 VDS = 320V 8 6 4 2 Crss 0 -1 10 1.2 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 2000 Capacitance [pF] 0.6 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage 1500 0.4 ∝ Note : ID = 11 A 0 0 10 1 10 5 10 15 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics © 2018 Truesemi Semiconductor Corporation 0 Ver.B2 Figure 6. Gate Charge Characteristics www.truesemi.com (Continued) 3.0 1.1 1.0 ∝ Notes : 1. VGS = 0 V 2. ID = 250 レA 0.9 0.8 -100 -50 0 50 100 150 2.5 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 2.0 1.5 1.0 0.0 -100 200 o TJ, Junction Temperature [ C] 0 50 100 150 200 o Figure 8. On-Resistance Variation vs Temperature Operation in This Area is Limited by R DS(on) 2 -50 TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature 10 ∝ Notes : 1. VGS = 10 V 2. ID = 5.5 A 0.5 TSP740MR/TSF740MR Typical Characteristics Operation in This Area is Limited by R DS(on) 2 10 u ID, Drain Current [A] ID, Drain Current [A] 100 s 1 ms 1 10 10 ms 100 ms DC 0 10 ∝ Notes : -1 10 100 us 1 10 1 ms 10 ms 100 ms 0 10 DC -1 ∝ Notes : 10 o 1. TC = 25 C o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse o 2. TJ = 150 C 3. Single Pulse -2 -2 10 0 1 10 2 10 3 10 10 10 0 10 1 10 2 10 Figure 9-1. Maximum Safe Operating Area for TSP740MR Figure 9-2. Maximum Safe Operating Area for TSF740MR 12 ID, Drain Current [A] 10 8 6 4 2 0 25 50 75 100 3 10 VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V] 125 150 TC, Case Temperature [∩ ] Figure 10. Maximum Drain Current vs Case Temperature © 2018 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com TSP740MR/TSF740MR Typical Characteristics (Continued) 0 Zヨ JC(t), Thermal Response 10 D=0.5 0.2 ∝ Notes : 1. Zヨ JC(t) = 0.65 ∩ /W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * Zヨ JC(t) -1 10 0.1 0.05 PDM 0.02 0.01 t1 t2 single pulse -2 10 -5 -4 10 -3 10 10 -2 10 -1 0 10 10 1 10 t1, Square Wave Pulse Duration [sec] Zヨ JC(t), Thermal Response Figure 11-1. Transient Thermal Response Curve for TSP740MR D=0.5 0 10 0.2 ∝ Notes : 1. Zヨ JC(t) = 3.15 ∩ /W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * Zヨ JC(t) 0.1 0.05 PDM 0.02 0.01 -1 10 t1 t2 single pulse -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 t1, Square Wave Pulse Duration [sec] Figure 11-2. Transient Thermal Response Curve for TSF740MR © 2018 Truesemi Semiconductor Corporation http://www.maplesemi.com www.truesemi.com TSP740MR/TSF740MR Gate Charge Test Circuit & Waveform Current Regulator 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS Qgs VGS Qgd DUT 3mA R1 R2 Charge Current Sampling (IG) Current Sampling (ID) Resistor Resistor Resistive Switching Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT Vin 10% 10V td(on) tr td(off) t f t off t on Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID BVDSS ID RG IAS C ID (t) VDD DUT VDS (t) VDD 10V tp tp © 2018 Truesemi Semiconductor Corporation Ver.B2 Time Rev. 00 November. 2015 + DUT VDS -IS L Driver VGS Same Type as DUT RG dv/dtcontrolled controlledby by밨 RGG ••dv/dt controlled pulse perio밆? ••IISSDcontrolled byby Duty Factor d VGS VGS ( Driver ) VDD Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop © 2018 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com TSP740MR/TSF740MR Peak Diode Recovery dv/dt Test Circuit & Waveforms