SLM2101SCA-13GTR

SLM2101S 600V Half Bridge Driver PRODUCT SUMMARY      VOFFSET IO+/- (min) VOUT ton/off (typ.) Delay Matching FEATURES  600 V max. 130 mA/270 mA 10 V - 20 V 160 ns/220 ns 60 ns           GENERAL DESCRIPTION The SLM2101S is a high voltage, high speed power MOSFET and IGBT drivers. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout 3.3 V, 5 V, and 15 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Outputs in phase with inputs RoHS compliant SOP8 package TYPICAL APPLICATION CIRCUIT up to 600V VCC VCC VB HIN HIN HO LIN LIN VS COM LO to load SLM2101S Refer to Lead Assignments for correct configuration. This diagram shows electrical connections only. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 1 SLM2101S PIN CONFIGURATION Package Pin Configuration (Top View) 1 VCC VB 8 2 HIN HO 7 3 LIN VS 6 4 COM LO 5 SOP8 PIN DESCRIPTION No. Pin Description 1 VCC Low-side and logic fixed supply 2 HIN Logic input for high-side gate driver output (HO), in phase 3 LIN Logic input for low-side gate driver output (LO), in phase 4 COM Low-side return 5 LO Low-side gate drive output 6 VS High-side floating supply return 7 HO High-side gate drive output 8 VB High-side floating supply ORDERING INFORMATION INDUSTRIAL RANGE: -40°C TO +125°C Order Part No. Package QTY SLM2101SCA-13GTR SOP8, Pb-Free 2500/Reel Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 2 SLM2101S FUNCTIONAL BLOCK DIAGRAM VB VBS UVLO R Pulse Filter R Q HO HIN LIN Noise Filter Noise Filter shoot-through protection S Pulse Gen VS UVLO Delay VCC LO COM Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 3 SLM2101S ABSOLUTE MAXIMUM RATINGS Symbol Definition Min. Max. -0.3 625 Units VB High-side floating absolute voltage VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage -0.3 VCC + 0.3 VIN Logic input voltage (HIN & LIN) -0.3 VCC + 0.3 Allowable offset supply voltage transient --- 50 V/ns PD Package power dissipation @ TA ≤ +25°C --- 0.625 W θJA Thermal resistance, junction to ambient --- 200 °C/W TJ Junction temperature --- 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) --- 300 dVS/dt V °C Note: Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. RECOMMENDED OPERATION CONDITIONS Symbol Definition Min. Max. VS + 10 VS + 20 VB High-side floating absolute voltage VS High-side floating supply offset voltage VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 VLO Low-side output voltage 0 VCC VIN Logic input voltage (HIN & LIN) 0 VCC TA Ambient temperature - 40 125 Units 600 V °C Note: The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 4 SLM2101S DYNAMIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. ton Turn-on propagation delay VS = 0 V --- 160 220 toff Turn-off propagation delay VS = 0 V --- 220 280 tr Turn-on rise time --- 70 170 tf Turn-off fall time --- 35 90 Delay matching, HS & LS turn-on/off --- --- 60 MT Unit ns STATIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM and are applicable to all logic input leads: HIN and LIN. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH Parameter Condition Logic “1” input voltage Min. Typ. Max. 2.5 --- --- --- --- 0.8 Unit VCC = 10 V to 20V VIL Logic “0” input voltage V VOH High level output voltage, VBIAS - VO --- 0.05 0.2 --- 0.02 0.1 --- --- 50 --- 60 78 --- 230 280 IO = 2 mA VOL Low level output voltage, VO ILK Offset supply leakage current IQBS Quiescent VBS supply current VB = VS = 600 V VIN = 0 V IQCC Quiescent VCC supply current IIN+ Logic “1” input bias current VIN = 5V --- 8 15 IIN- Logic “0” input bias current VIN = 0V --- --- 5 8 8.9 9.8 VCCUV+ VBSUV+ VCC & VBS supply undervoltage positive going threshold VCCUV- VCC & VBS supply undervoltage negative going threshold VBSUVIO+ µA V Output high short circuit pulsed current VO = 15 V, VIN = Logic “1”, PW ≤ 10 µs Output low short circuit pulsed current VO = 0 V, VIN = Logic “0”, PW ≤ 10 µs 7.4 8.2 130 290 9 mA IO- Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 270 600 5 SLM2101S 50% 50% HIN LIN HIN LIN ton HO LO Figure 1. Input/Output Timing Diagram 10% 90% 10% Figure 2. Switching Time Waveform 50% 50% LO tf toff 90% HO LO HIN LIN tr HO 10% MT MT 90% LO HO Figure 3. Delay Matching Waveform Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 6 SLM2101S TYPICAL PERFORMANCE CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, and TA = 25°C unless otherwise specified. 300 Low Side High Side 250 Turn On Progation Delay (ns) Turn On Progation Delay (ns) 300 200 150 100 Low Side High Side 250 200 150 100 50 50 0 -40 -20 0 20 40 60 80 100 0 10 120 12 14 Figure 4. Turn On Delay vs. Temperature Low Side High Side 250 Turn Off Progation Delay (ns) Turn On Progation Delay (ns) 20 500 200 150 100 50 4 6 8 10 12 14 16 18 Low Side High Side 400 300 200 100 0 -40 20 -20 0 Input Voltage (V) 20 40 60 80 100 120 Temperature (oC) Figure 6. Turn On Delay vs. Input Voltage Figure 7. Turn Off Delay vs. Temperature 500 500 Low Side High Side Turn Off Progation Delay (ns) Turn Off Progation Delay (ns) 18 Figure 5. Turn On Delay vs. Supply Voltage 300 0 2 16 Supply Voltage (V) Temperature (oC) 400 300 200 100 0 10 12 14 16 18 20 Supply Voltage (V) Figure 8. Turn Off Delay vs. Supply Voltage Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 Low Side High Side 400 300 200 100 0 2 4 6 8 10 12 14 16 18 20 Input Voltage (V) Figure 9. Turn Off Delay vs. Input Voltage 7 SLM2101S 180 180 160 Low Side High Side 140 120 100 80 60 120 100 80 60 40 40 20 20 0 -40 -20 0 20 40 60 80 100 Low Side High Side 140 Turn On Rise Time (ns) Turn On Rise Time (ns) 160 0 10 120 12 o Figure 10. Turn On Rise Time vs. Temperature 18 20 70 Low Side High Side 60 Turn Off Fall Time (ns) 60 Turn Off Fall Time (ns) 16 Figure 11. Turn On Rise Time vs. Supply Voltage 70 50 40 30 20 10 Low Side High Side 50 40 30 20 10 0 -40 -20 0 20 40 60 80 100 0 10 120 12 o Temperature ( C) 16 18 20 Figure 13. Turn Off Fall Time vs. Supply Voltage 5 5 LIN HIN LIN HIN Logic 1 Input Voltage (V) 4 3 2 1 0 -40 14 Supply Voltage (V) Figure 12. Turn Off Fall Time vs. Temperature Logic 1 Input Voltage (V) 14 Supply Voltage (V) Temperature ( C) 4 3 2 1 -20 0 20 40 60 80 100 120 Temperature (oC) Figure 14. Logic “1” Input Voltage vs. Temperature Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 0 10 12 14 16 18 20 Supply Voltage (V) Figure 15. Logic “1” Input Voltage vs. Supply Voltage 8 SLM2101S 5 5 LIN HIN 4 Logic 0 Input Voltage (V) Logic 0 Input Voltage (V) LIN HIN 3 2 1 0 -40 4 3 2 1 -20 0 20 40 60 80 100 0 10 120 12 o Figure 16. Logic “0” Input Voltage vs. Temperature High Level Output Voltage (V) High Level Output Voltage (V) 0.09 Low Side High Side 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 20 Low Side High Side 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 -20 0 20 40 60 80 100 0.00 10 120 12 Temperature (oC) 14 16 18 20 Supply Voltage (V) Figure 18. High Level Output vs. Temperature Figure 19. High Level Output vs. Supply Voltage 0.10 0.10 0.09 0.09 Low Side High Side Low Level Output Voltage (V) Low Level Output Voltage (V) 18 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 Low Side High Side 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.01 0.00 -40 16 Figure 17. Logic “0” Input Voltage vs. Supply Voltage 0.10 0.00 -40 14 Supply Voltage (V) Temperature ( C) -20 0 20 40 60 80 100 120 o Temperature ( C) Figure 20. Low Level Output vs. Temperature Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 0.00 10 12 14 16 18 20 Supply Voltage (V) Figure 21. Low Level Output vs. Supply Voltage 9 SLM2101S 2.0 Offset Supply Leakage Current (uA) Offset Supply Leakage Current (uA) 30 25 20 15 10 5 0 -40 -20 0 20 40 60 80 100 1.6 1.2 0.8 0.4 0.0 500 120 520 o Figure 22. Offset Supply Current vs. Temperature VIN=5 VIN=0 VBS Supply Current (uA) VBS Supply Current (uA) 700 600 500 400 300 200 600 VIN=5 VIN=0 600 500 400 300 200 100 100 -20 0 20 40 60 80 100 0 10 120 12 14 16 18 20 VBS Supply Voltage (V) Temperature (oC) Figure 24. VBS Supply Current vs. Temperature Figure 25. VBS Supply Current vs. Supply Voltage 1000 1000 900 900 VIN=5 VIN=0 VIN=5 VIN=0 800 VCC Supply Current (uA) 800 VCC Supply Current (uA) 580 800 700 700 600 500 400 300 700 600 500 400 300 200 200 100 100 0 -40 560 Figure 23. Offset Supply Current vs. VB Voltage 800 0 -40 540 VB Voltage (V) Temperature ( C) -20 0 20 40 60 80 100 120 o Temperature ( C) Figure 26. VCC Supply Current vs. Temperature Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 0 10 12 14 16 18 20 VCC Supply Voltage (V) Figure 27. VCC Supply Current vs. Supply Voltage 10 SLM2101S 30 30 LIN HIN 20 15 10 5 0 -40 LIN HIN 25 Logic 1 Input Current (uA) Logic 1 Input Current (uA) 25 20 15 10 5 -20 0 20 40 60 80 100 0 10 120 12 14 Temperature (oC) Figure 28. Logic “1” Input Current vs. Temperature 10.5 20 Figure 29. Logic “1” Input Current vs. Supply Voltage 10.5 Fall Rise 10.0 10.0 9.5 9.5 VBS UVLO (V) VCC UVLO (V) 18 11.0 11.0 9.0 8.5 8.0 8.5 8.0 7.5 7.0 7.0 6.5 6.5 -20 0 20 40 60 80 100 120 Temperature (oC) Figure 30. VCC UVLO Threshold vs. Temperature Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 Fall Rise 9.0 7.5 6.0 -40 16 VCC Supply Voltage (V) 6.0 -40 -20 0 20 40 60 80 100 120 Temperature (oC) Figure 31. VBS UVLO Threshold vs. Temperature 11 SLM2101S PACKAGE CASE OUTLINES Figure 32. SOP8 Outline Dimensions Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 12 SLM2101S REVISION HISTORY Note: page numbers for previous revisions may differ from page numbers in current version Page or Item Subjects (major changes since previous revision) Rev 1.0 datasheet, 2019-8-29 Whole document new company logo released Page 1 Removed “Fig 1. ” Rev 1.1 datasheet, 2019-10-21 Page 1 Change “high side and low side driver” to “half-bridge driver” Page 1 Change “independent” to “dependent” Rev 1.2 datasheet, 2020-5-15 Page 5 IQBS and IQCC change Rev 1.3 datasheet, 2020-9-23 Page 5 VOH and VOL test condition change IIN+ parameter change Rev 1.4 datasheet, 2021-10-29 Whole datasheet Update the Logo and format Page 1 Remove the DIP 8 package Page 2 Remove the SLM2101SCA-GT, SLM2101SDA-GT in the ordering information. Page 5 Update the VOH, VOL and IQCC in the static electrical characteristics table Rev 1.5 datasheet, 2022-12-19 Whole datasheet Change package name from SOIC-8 to SOP8 and update the package case outlines Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.5 Dec 2022 13