SLM2106SCA-13GTR

SLM2106S 600V Half Bridge Driver PRODUCT SUMMARY      VOFFSET IO+/- (min) VOUT ton/off (typ.) Delay Matching FEATURES  600 V max. 130 mA/270 mA 10 V - 20 V 160 ns/220 ns 30 ns           GENERAL DESCRIPTION The SLM2106S is a high voltage, high speed power MOSFET and IGBT drivers. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout 3.3 V, 5 V, and 15 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Outputs in phase with inputs RoHS compliant SOP8 and SOP14 package TYPICAL APPLICATION CIRCUIT up to 600V VCC VCC VB HIN HIN HO LIN LIN VS COM LO to load SLM2106S Refer to Lead Assignments for correct configuration. This diagram shows electrical connections only. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 1 SLM2106S PIN CONFIGURATION Package SOP8 Pin Configuration (Top View) SOP14 1 VCC VB 8 2 HIN HO 7 3 LIN VS 6 4 COM LO 5 1 NC NC 14 2 VCC NC 13 3 HIN VB 12 4 LIN HO 11 5 COM VS 10 6 LO NC 9 7 NC NC 8 PIN DESCRIPTION Pin No. Pin Name Description 2 VCC Low-side and logic fixed supply 2 3 HIN Logic input for high-side gate driver output (HO), in phase 3 4 LIN Logic input for low-side gate driver output (LO), in phase 4 5 COM Low-side return 5 6 LO Low-side gate drive output 6 10 VS High-side floating supply return 7 11 HO High-side gate drive output 8 12 VB High-side floating supply 1,7,8,9,13 ,14 NC Not connected SOP8 SOP14 1 ORDERING INFORMATION Industrial Range: -40°C to +125°C Order Part No. Package QTY SLM2106SCA-13GTR SOP8, Pb-Free 2500/Reel SLM2106SCJ-13GTR SOP14,Pb-Free 4000/Reel Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 2 SLM2106S FUNCTIONAL BLOCK DIAGRAM VB UV DETECT PULSE FILTER HIN R R S Q HO PULSE GENERATOR VS VCC UV DETECT LO LIN DELAY COM Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 3 SLM2106S ABSOLUTE MAXIMUM RATINGS Symbol Definition Min. Max. -0.3 625 Units VB High-side floating absolute voltage VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage -0.3 VCC + 0.3 VIN Logic input voltage (HIN & LIN) -0.3 VCC + 0.3 Allowable offset supply voltage transient --- 50 V/ns PD Package power dissipation @ TA ≤ +25°C --- 0.625 W θJA Thermal resistance, junction to ambient --- 200 °C/W TJ Junction temperature --- 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) --- 300 dVS/dt V °C Note: Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. RECOMMENDED OPERATION CONDITIONS Symbol Definition Min. Max. VS + 10 VS + 20 VB High-side floating absolute voltage VS High-side floating supply offset voltage VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 VLO Low-side output voltage 0 VCC VIN Logic input voltage (HIN & LIN) 0 VCC TA Ambient temperature - 40 125 Units 600 V °C Note: The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 4 SLM2106S DYNAMIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. ton Turn-on propagation delay VS = 0 V --- 160 220 toff Turn-off propagation delay VS = 0 V --- 220 280 tr Turn-on rise time --- 70 170 tf Turn-off fall time --- 35 90 Delay matching, HS & LS turn-on/off --- --- 30 MT Unit ns STATIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM and are applicable to all logic input leads: HIN and LIN. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH Parameter Condition Logic “1” input voltage Min. Typ. Max. 2.5 --- --- Unit VCC = 10 V to 20V VIL Logic “0” input voltage --- --- 0.8 VOH High level output voltage, VBIAS - VO --- 0.05 0.2 --- 0.02 0.1 --- --- 50 --- 60 78 --- 220 280 V IO = 2 mA VOL Low level output voltage, VO ILK Offset supply leakage current IQBS Quiescent VBS supply current VB = VS = 600 V VIN = 0 V IQCC Quiescent VCC supply current IIN+ Logic “1” input bias current VIN = 5V --- 8 15 IIN- Logic “0” input bias current VIN = 0V --- --- 5 8 8.9 9.8 VCCUV+ VBSUV+ VCC & VBS supply undervoltage positive going threshold VCCUV- VCC & VBS supply undervoltage negative going threshold VBSUVIO+ µA V Output high short circuit pulsed current VO = 15 V, VIN = Logic “1”, PW ≤ 10 µs Output low short circuit pulsed current VO = 0 V, VIN = Logic “0”, PW ≤ 10 µs 7.4 8.2 130 290 9 mA IO- Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 270 600 5 SLM2106S 50% 50% HIN LIN HIN LIN ton HO LO Figure 1. Input/Output Timing Diagram 10% 90% 10% Figure 2. Switching Time Waveform 50% 50% LO tf toff 90% HO LO HIN LIN tr HO 10% MT MT 90% LO HO Figure 3. Delay Matching Waveform Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 6 SLM2106S PACKAGE CASE OUTLINES Figure 4. SOP8 Outline Dimensions Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 7 SLM2106S Figure 5. SOP14 Outline Dimensions Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 8 SLM2106S REVISION HISTORY Note: page numbers for previous revisions may differ from page numbers in current version Page or Item Subjects (major changes since previous revision) Rev 1.0 datasheet, 2019-8-29 Whole document new company logo released Page 1 Removed “Fig 1. ” Rev 1.1 datasheet, 2019-10-21 Page 1 Change “high side and low side driver” to “600V half-bridge driver” Rev 1.2 datasheet, 2021-Oct-29 Whole datasheet Update the Logo and format Page 1 Remove PDIP-8 package Page 2 Remove SLM2106SCA-GT and SLM2106SDA-GT in ordering information Page 3 Update the functional block diagram Page 5 Update the VOH, VOL and IQCC in static electrical characteristics table Rev 1.3 datasheet, 2022-May-10 Whole datasheet Change package name from SOIC-8 to SOP8, SOIC-14 to SOP14, and update the package case outlines Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.3 May 2022 9