LPM2302B3F

Preliminary Datasheet LPM2302 LPM2302 20V/3.5A N-Channel Enhancement Mode Field Effect Transistor General Description Features The LPM2302 is N-channel logic enhancement mode ■ 20V/3.5A, RDS(ON)=50mΩ(Typ.)@VGS=4.5V power field effect transistor, which are produced by ■ 20V/3.0A, RDS(ON)=75mΩ(Typ.)@VGS=2.5V using high cell density, DMOS trench technology. This high density process is especially tailored to ■ Super high density cell design for extremely low RDS(ON) minimize on-state resistance. ■ SOT23 Package These devices are particularly suitable for low voltage applications, notebook computer power management Applications and other battery powered circuits where high-side switching are needed. Ordering Information LPM2302- □ □     Portable Media Players Cellular and Smart mobile phone LCD DSC Sensor  Wireless Card  □ Marking Information F: Pb-Free Package Type Device Marking Package Shipping LPM2302B3F A2sHB SOT23-3 3K/REEL B3: SOT23-3 Pin Configurations D (SOT-23) TOP VIEW G D G S S LPM2302 – 00 Jun.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 5 Preliminary Datasheet LPM2302 Functional Pin Description Name Description G Gate Electrode S Source D Drain Electrode Absolute Maximum Ratings Absolute Maximum Ratings TA=25℃ Unless Otherwise noted Parameter Symbol Maximum Units Drain-Source Voltage VDS 20 V Gate-Source Voltage VGS ±12 V ID 3.5 Continuous Drain TA=25℃ Current A TA=70℃ 2.4 Pulsed Drain Current E Power Dissipation IDM TA=25℃ A 8 1.25 PO TA=70℃ W 0.8 Junction and Storage Temperature Range TJ, TSTG -55 to 150 ℃ Thermal Characteristics Parameter Maximum Junction-to-Ambient Symbol t ≤ 10S Typ. Units 130 ℃/W 160 ℃/W 80 ℃/W RθJA Maximum Junction-to-Ambient Steady-state Maximum Junction-to-Lead Steady-state LPM2302 – 00 Jun.-2018 Email: marketing@lowpowersemi.com RθJL www.lowpowersemi.com Page 2 of 5 Preliminary Datasheet LPM2302 Electrical Characteristics Symbol Parameter Condition Min. Typ. Max. Units STATIC PARAMETER BVDSS Drain-Source Breakdown Voltage IDSS Zero-Gate Voltage Drain Current IGSS ID=250μ A，VGS=0V 20 V VDS=16V,VGS=0V 1 TJ=55℃ 5 Gate-Body Leakage Current VDS=0V,VGS=±12V 1 uA VGS(th) Gate Threshold Voltage VDS=VGS,ID=250μA 1 V RDS(ON) Static Drain-Source On-Resistance gFS VSD 0.4 0.7 μ A VGS=4.5V, ID=3.5A 50 mΩ VGS=2.5V, ID=3A 75 mΩ Forward Transconductance VDS=5V,ID=3A 12 S Diode Forward Voltage IS=1A,VGS=0V 0.75 1 V DYNAMIC PARAMETERS Ciss Input Capacitance VDS=10V,VGS=0V 330 pF CDSS Output Capacitance f = 1MHz 110 pF Crss Reverse Transfer Capacitance 30 pF Rg Gate Resistance 4 Ω 4.2 nC 1 nC 0.5 nC 10 nS VDS=0V,VGS=0V f = 1MHz SWITCHING PARAMETERS Qg Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge t D(ON) Turn-On Delay Time tr Turn-On Rise Time VDS=10V,VGS=5V 8 nS t D(OFF) Turn-Off Delay Time RL=2.7Ω,RGEN=1Ω 35 nS tf Turn-Off Fall Time 10 nS trr Body-Diode Reverse Recovery Time IF=3A,d I/dt=100A/μS 12.3 nS Qrr Body-Diode Reverse Recovery Charge IF=3A,d I/dt=100A/μS 2.5 nC LPM2302 – 00 Jun.-2018 VDS=10V,VGS=4.5V ID=3.5A Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 5 Preliminary Datasheet LPM2302 – 00 Jun.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com LPM2302 Page 4 of 5 Preliminary Datasheet LPM2302 Packaging Information LPM2302 – 00 Jun.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 5