SL15N10A
N-Channel Enhancement Mode Field Effect Transistor
Product Summary
● VDS
● ID
● RDS(ON)( at VGS= 10V)
● RDS(ON)( at VGS= 4.5V)
● 100% UIS Tested
● 100% ▽VDS Tested
100V
15A
<115mohm
<1 0mohm
General Description
● Trench Power MV MOSFET technology
● Excellent package for heat dissipation
● High density cell design for low RDS(ON)
Applications
● DC-DC Converters
● Power management functions
■ Absolute Maximum Ratings (TA=25℃unless otherwise noted)
Parameter
Symbol
Limit
Drain-source Voltage
VDS
100
V
Gate-source Voltage
VGS
±20
V
Drain Current
TC=25℃
ID
TC=100℃
15
10.5
Unit
A
Pulsed Drain Current A
IDM
60
A
Single Pulse Avalanche Energy B
EAS
9
mJ
34
W
17
W
RθJC
4.4
℃/ W
TJ ,TSTG
-55~+175
℃
TC=25℃
Total Power Dissipation
PD
TC=100℃
Thermal Resistance Junction-to-Case C
Junction and Storage Temperature Range
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SL15N10A
■ Electrical Characteristics (TJ=25℃ unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Static Parameter
Drain-Source Breakdown Voltage
BVDSS
VGS= 0V, ID=250μA
Zero Gate Voltage Drain Current
IDSS
VDS=100V,VGS=0V
1
μA
IGSS
VGS= ±20V, VDS=0V
±100
nA
VGS(th)
VDS= VGS, ID=250μA
1.8
3.0
V
VGS= 10V, ID=8A
68
115
VGS= 4.5V, ID=8A
75
1 0
IS=15A,VGS=0V
0.8
1.2
V
15
A
Gate-Body Leakage Current
Gate Threshold Voltage
Static Drain-Source On-Resistance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
100
1.1
V
RDS(ON)
mΩ
VSD
IS
Dynamic Parameters
1070
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
30
Total Gate Charge
Qg
26
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Reverse Recovery Charge
Qrr
VDS=50V,VGS=0V,f=1MHZ
33
pF
Switching Parameters
VGS=10V,VDS=50V,ID=10A
5.4
nC
5.8
30.1
IF=10A, di/dt=100A/us
Reverse Recovery Time
trr
40
Turn-on Delay Time
tD(on)
7
Turn-on Rise Time
tr
Turn-off Delay Time
tD(off)
Turn-off fall Time
VGS=10V,VDD=50V,RL=6.4Ω
RGEN=3Ω
tf
24
ns
24
31
A. Pulse Test: Pulse Width≤300us,Duty cycle ≤2%.
B. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented
here is based on mounting on a 1 in 2 pad of 2oz copper
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SL15N10A
■ Typical Performance Characteristics
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
Figure 3. On-Resistance vs. Drain Current
and Gate Voltage
Figure 4. On-Resistance vs. Junction Temperature
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge
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SL15N10A
Figure 7. Safe Operation Area
Figure 8. Maximum Continuous Drain Current
vs Case Temperature
Figure 9. Normalized Maximum Transient Thermal Impedance
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SL15N10A
■ TO 252 Package information
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