FQD4N50
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Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
650
2.1
VGS = 10 V
Qg (Max.) (nC)
48
Qgs (nC)
12
Qgd (nC)
19
Configuration
Single
• Low Gate Charge Qg Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Available
RoHS*
COMPLIANT
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Compliant to RoHS directive 2002/95/EC
D
TO-252
G
G
D
S
S
N-Channel MOSFET
Top View
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Currente
TC = 25 °C
VGS at 10 V
Continuous Drain Current
TC = 100 °C
Pulsed Drain Currenta
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d
for 10 s
Mounting Torque
6-32 or M3 screw
SYMBOL
LIMIT
UNIT
VDS
VGS
650
± 30
V
ID
4.5
4.2
IDM
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
18
0.48
325
4
6
60
2.8
- 55 to + 150
300
10
1.1
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 24 mH, RG = 25 Ω, IAS = 3.2 A (see fig. 12).
c. ISD ≤ 3.2 A, dI/dt ≤ 90 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. Drain current limited by maximum junction temperature.
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
65
Maximum Junction-to-Case (Drain)
RthJC
-
2.1
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
VDS
VGS = 0 V, ID = 250 µA
MIN.
TYP.
MAX.
UNIT
650
-
-
V
-
670
-
mV/°C
2.5
-
5.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
ΔVDS/TJ
VGS(th)
Reference to 25 °C, ID = 1
VDS = VGS, ID = 250 µA
IGSS
IDSS
RDS(on)
gfs
mAd
VGS = ± 30 V
-
-
± 100
VDS = 650 V, VGS = 0 V
-
-
25
VDS = 520 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
2.1
-
Ω
3.9
-
-
S
-
1417
-
-
177
-
-
7.0
-
VDS = 1.0 V, f = 1.0 MHz
-
1912
-
VDS = 520 V, f = 1.0 MHz
-
48
-
-
84
-
-
-
48
-
-
12
-
-
19
-
14
-
-
20
-
-
34
-
-
18
-
-
-
4
-
-
21
ID = 3.1 Ab
VGS = 10 V
VDS = 50 V, ID = 3.1 A
µA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Coss
Effective Output Capacitance
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Turn-Off Delay Time
Fall Time
VGS = 0 V
Coss eff.
Total Gate Charge
Rise Time
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
tr
td(off)
VDS = 0 V to 520
VGS = 10 V
Vc
ID = 3.2 A, VDS = 400 V
see fig. 6 and 13b
VDD = 325 V, ID = 3.2 A
RG = 9.1 Ω, RD = 62 Ω,
see fig. 10b
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 3.2 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 3.2 A, dI/dt = 100 A/µsb
-
-
1.5
V
-
493
739
ns
-
2.1
3.2
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.
d. t = 60 s, f = 60 Hz.
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TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
5
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
20µs PULSE WIDTH
4.5V TJ = 25 °C
0.1
0.1
1
10
5
TJ = 150 ° C
TJ = 25 ° C
1
0.1
4.0
100
VDS , Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
4.5V
1
20µs PULSE WIDTH
TJ = 150 ° C
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
8.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1
6.0
7.0
8.0
9.0
Fig. 3 - Typical Transfer Characteristics
TOP
5
5.0
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
10
V DS = 100V
20µs PULSE WIDTH
ID = 3.2A
5.5
5.0
3.5
2.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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2000
10
ISD , Reverse Drain Current (A)
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
1600
C, Capacitance (pF)
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iss
1200
oss
800
400
rss
0
10
100
TJ = 150 ° C
1
TJ = 25 ° C
0.1
0.2
A
1
5
1000
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
0.8
1.0
1.2
Fig. 7 - Typical Source-Drain Diode Forward Voltage
10
ID = 3.2 A
OPERATION IN THIS AREA LIMITED
BY RDS(on)
VDS = 520V
VDS = 325V
VDS = 130V
16
10us
ID , Drain Current (A)
VGS , Gate-to-Source Voltage (V)
0.6
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
20
V GS = 0 V
0.4
12
8
5
100us
1ms
1
10ms
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30
40
50
0.1
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
10000
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RD
VDS
6.0
VGS
D.U.T.
RG
5.0
+
ID , Drain Current (A)
- VDD
4.0
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
3.0
Fig. 10a - Switching Time Test Circuit
2.0
VDS
90 %
1.0
0.0
25
50
75
100
125
150
10 %
VGS
TC , Case Temperature ( ° C)
t d(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
tr
t d(off) t f
Fig. 10b - Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
PDM
0.05
0.1
t1
0.02
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
V DS
tp
15 V
L
VDS
D.U.T.
RG
IAS
20 V
tp
Driver
+
A
- VDD
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
A
I AS
Fig. 12b - Unclamped Inductive Waveforms
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EAS , Single Pulse Avalanche Energy (mJ)
FQD4N50
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800
TOP
BOTTOM
600
ID
2.3A
3.3A
4A
QG
10 V
QGS
400
Q GD
VG
Charge
200
Fig. 13a - Basic Gate Charge Waveform
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Current regulator
Same type as D.U.T.
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
50 kΩ
12 V
0.2 µF
0.3 µF
800
+
V DSav , Avalanche Voltage (V)
D.U.T.
780
-
VDS
VGS
3 mA
760
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
740
720
700
A
0
1
2
3
4
5
6
I av , Avalanche Current (A)
Fig. 12d - Typical Drain-to Source Voltage vs. Avalanche
Current
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Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor crurent
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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TO-252AA CASE OUTLINE
E
MILLIMETERS
A
C2
e
b2
D1
e1
E1
L
gage plane height (0.5 mm)
L4
b
L5
H
D
L3
b3
C
A1
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
A
2.18
2.38
0.086
0.094
A1
-
0.127
-
0.005
b
0.64
0.88
0.025
0.035
b2
0.76
1.14
0.030
0.045
b3
4.95
5.46
0.195
0.215
C
0.46
0.61
0.018
0.024
C2
0.46
0.89
0.018
0.035
D
5.97
6.22
0.235
0.245
D1
5.21
-
0.205
0.265
E
6.35
6.73
0.250
E1
4.32
-
0.170
-
H
9.40
10.41
0.370
0.410
e
2.28 BSC
0.090 BSC
e1
4.56 BSC
0.180 BSC
L
1.40
1.78
0.055
0.070
L3
0.89
1.27
0.035
0.050
L4
-
1.02
-
0.040
L5
1.14
1.52
0.045
0.060
ECN: X12-0247-Rev. M, 24-Dec-12
DWG: 5347
Note
• Dimension L3 is for reference only.
8
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